1 // RUN: %clang_cc1 -no-enable-noundef-analysis -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s
2 // RUN: %clang_cc1 -no-enable-noundef-analysis -triple x86_64-apple-darwin10 -target-cpu core2 -emit-llvm -o - %s | FileCheck %s --check-prefix=X86-64
3 // RUN: %clang_cc1 -no-enable-noundef-analysis -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -no-enable-noundef-analysis -triple arm64-apple-ios9 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=ARM64
6 // REQUIRES: aarch64-registered-target,x86-registered-target
8 #define SWIFTCALL __attribute__((swiftcall))
9 #define SWIFTASYNCCALL __attribute__((swiftasynccall))
10 #define OUT __attribute__((swift_indirect_result))
11 #define ERROR __attribute__((swift_error_result))
12 #define CONTEXT __attribute__((swift_context))
13 #define ASYNC_CONTEXT __attribute__((swift_async_context))
15 // CHECK-DAG: %struct.atomic_padded = type { { %struct.packed, [7 x i8] } }
16 // CHECK-DAG: %struct.packed = type <{ i64, i8 }>
18 /*****************************************************************************/
19 /****************************** PARAMETER ABIS *******************************/
20 /*****************************************************************************/
22 SWIFTCALL
void indirect_result_1(OUT
int *arg0
, OUT
float *arg1
) {}
23 // CHECK-LABEL: define {{.*}} void @indirect_result_1(ptr noalias sret(ptr) align 4 dereferenceable(4){{.*}}, ptr noalias align 4 dereferenceable(4){{.*}})
25 // TODO: maybe this shouldn't suppress sret.
26 SWIFTCALL
int indirect_result_2(OUT
int *arg0
, OUT
float *arg1
) { __builtin_unreachable(); }
27 // CHECK-LABEL: define {{.*}} i32 @indirect_result_2(ptr noalias align 4 dereferenceable(4){{.*}}, ptr noalias align 4 dereferenceable(4){{.*}})
29 typedef struct { char array
[1024]; } struct_reallybig
;
30 SWIFTCALL struct_reallybig
indirect_result_3(OUT
int *arg0
, OUT
float *arg1
) { __builtin_unreachable(); }
31 // CHECK-LABEL: define {{.*}} void @indirect_result_3(ptr dead_on_unwind noalias writable sret(%struct.struct_reallybig) {{.*}}, ptr noalias align 4 dereferenceable(4){{.*}}, ptr noalias align 4 dereferenceable(4){{.*}})
33 SWIFTCALL
void context_1(CONTEXT
void *self
) {}
34 // CHECK-LABEL: define {{.*}} void @context_1(ptr swiftself
36 SWIFTASYNCCALL
void async_context_1(ASYNC_CONTEXT
void *ctx
) {}
37 // CHECK-LABEL: define {{.*}} void @async_context_1(ptr swiftasync
39 SWIFTCALL
void context_2(void *arg0
, CONTEXT
void *self
) {}
40 // CHECK-LABEL: define {{.*}} void @context_2(ptr{{.*}}, ptr swiftself
42 SWIFTASYNCCALL
void async_context_2(void *arg0
, ASYNC_CONTEXT
void *ctx
) {}
43 // CHECK-LABEL: define {{.*}} void @async_context_2(ptr{{.*}}, ptr swiftasync
45 SWIFTCALL
void context_error_1(CONTEXT
int *self
, ERROR
float **error
) {}
46 // CHECK-LABEL: define {{.*}} void @context_error_1(ptr swiftself{{.*}}, ptr swifterror %0)
47 // CHECK: [[TEMP:%.*]] = alloca ptr, align 8
48 // CHECK: [[T0:%.*]] = load ptr, ptr [[ERRORARG:%.*]], align 8
49 // CHECK: store ptr [[T0]], ptr [[TEMP]], align 8
50 // CHECK: [[T0:%.*]] = load ptr, ptr [[TEMP]], align 8
51 // CHECK: store ptr [[T0]], ptr [[ERRORARG]], align 8
52 void test_context_error_1() {
55 context_error_1(&x
, &error
);
57 // CHECK-LABEL: define{{.*}} void @test_context_error_1()
58 // CHECK: [[X:%.*]] = alloca i32, align 4
59 // CHECK: [[ERROR:%.*]] = alloca ptr, align 8
60 // CHECK: [[TEMP:%.*]] = alloca swifterror ptr, align 8
61 // CHECK: [[T0:%.*]] = load ptr, ptr [[ERROR]], align 8
62 // CHECK: store ptr [[T0]], ptr [[TEMP]], align 8
63 // CHECK: call [[SWIFTCC:swiftcc]] void @context_error_1(ptr swiftself [[X]], ptr swifterror [[TEMP]])
64 // CHECK: [[T0:%.*]] = load ptr, ptr [[TEMP]], align 8
65 // CHECK: store ptr [[T0]], ptr [[ERROR]], align 8
67 SWIFTCALL
void context_error_2(short s
, CONTEXT
int *self
, ERROR
float **error
) {}
68 // CHECK-LABEL: define {{.*}} void @context_error_2(i16{{.*}}, ptr swiftself{{.*}}, ptr swifterror %0)
70 /*****************************************************************************/
71 /********************************** LOWERING *********************************/
72 /*****************************************************************************/
74 typedef float float3
__attribute__((ext_vector_type(3)));
75 typedef float float4
__attribute__((ext_vector_type(4)));
76 typedef float float8
__attribute__((ext_vector_type(8)));
77 typedef double double2
__attribute__((ext_vector_type(2)));
78 typedef double double4
__attribute__((ext_vector_type(4)));
79 typedef int int3
__attribute__((ext_vector_type(3)));
80 typedef int int4
__attribute__((ext_vector_type(4)));
81 typedef int int5
__attribute__((ext_vector_type(5)));
82 typedef int int8
__attribute__((ext_vector_type(8)));
83 typedef char char16
__attribute__((ext_vector_type(16)));
84 typedef short short8
__attribute__((ext_vector_type(8)));
85 typedef long long long2
__attribute__((ext_vector_type(2)));
88 SWIFTCALL TYPE return_##TYPE(void) { \
92 SWIFTCALL void take_##TYPE(TYPE v) { \
94 void test_##TYPE() { \
95 take_##TYPE(return_##TYPE()); \
98 /*****************************************************************************/
99 /*********************************** STRUCTS *********************************/
100 /*****************************************************************************/
105 // CHECK-LABEL: define {{.*}} @return_struct_empty()
107 // CHECK-LABEL: define {{.*}} @take_struct_empty()
118 // CHECK-LABEL: define{{.*}} swiftcc { i64, i64 } @return_struct_1() {{.*}}{
119 // CHECK: [[RET:%.*]] = alloca [[STRUCT1:%.*]], align 4
120 // CHECK: call void @llvm.memset
121 // CHECK: [[GEP0:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr %retval, i32 0, i32 0
122 // CHECK: [[T0:%.*]] = load i64, ptr [[GEP0]], align 4
123 // CHECK: [[GEP1:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr %retval, i32 0, i32 1
124 // CHECK: [[T1:%.*]] = load i64, ptr [[GEP1]], align 4
125 // CHECK: [[R0:%.*]] = insertvalue { i64, i64 } poison, i64 [[T0]], 0
126 // CHECK: [[R1:%.*]] = insertvalue { i64, i64 } [[R0]], i64 [[T1]], 1
127 // CHECK: ret { i64, i64 } [[R1]]
129 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_1(i64 %0, i64 %1) {{.*}}{
130 // CHECK: [[V:%.*]] = alloca [[STRUCT1:%.*]], align 4
131 // CHECK: [[GEP0:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[V]], i32 0, i32 0
132 // CHECK: store i64 %0, ptr [[GEP0]], align 4
133 // CHECK: [[GEP1:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[V]], i32 0, i32 1
134 // CHECK: store i64 %1, ptr [[GEP1]], align 4
137 // CHECK-LABEL: define{{.*}} void @test_struct_1() {{.*}}{
138 // CHECK: [[AGG:%.*]] = alloca [[STRUCT1:%.*]], align 4
139 // CHECK: [[RET:%.*]] = call swiftcc { i64, i64 } @return_struct_1()
140 // CHECK: [[GEP0:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[AGG]], i32 0, i32 0
141 // CHECK: [[E0:%.*]] = extractvalue { i64, i64 } [[RET]], 0
142 // CHECK: store i64 [[E0]], ptr [[GEP0]], align 4
143 // CHECK: [[GEP1:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[AGG]], i32 0, i32 1
144 // CHECK: [[E1:%.*]] = extractvalue { i64, i64 } [[RET]], 1
145 // CHECK: store i64 [[E1]], ptr [[GEP1]], align 4
146 // CHECK: [[GEP2:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[AGG]], i32 0, i32 0
147 // CHECK: [[V0:%.*]] = load i64, ptr [[GEP2]], align 4
148 // CHECK: [[GEP3:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[AGG]], i32 0, i32 1
149 // CHECK: [[V1:%.*]] = load i64, ptr [[GEP3]], align 4
150 // CHECK: call swiftcc void @take_struct_1(i64 [[V0]], i64 [[V1]])
157 __attribute__((aligned(2))) char c1
;
162 // CHECK-LABEL: define{{.*}} swiftcc { i64, i64 } @return_struct_2() {{.*}}{
163 // CHECK: [[RET:%.*]] = alloca [[STRUCT2:%.*]], align 4
164 // CHECK: call void @llvm.memset
165 // CHECK: [[GEP0:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[RET]], i32 0, i32 0
166 // CHECK: [[T0:%.*]] = load i64, ptr [[GEP0]], align 4
167 // CHECK: [[GEP1:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[RET]], i32 0, i32 1
168 // CHECK: [[T1:%.*]] = load i64, ptr [[GEP1]], align 4
169 // CHECK: [[R0:%.*]] = insertvalue { i64, i64 } poison, i64 [[T0]], 0
170 // CHECK: [[R1:%.*]] = insertvalue { i64, i64 } [[R0]], i64 [[T1]], 1
171 // CHECK: ret { i64, i64 } [[R1]]
173 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_2(i64 %0, i64 %1) {{.*}}{
174 // CHECK: [[V:%.*]] = alloca [[STRUCT2]], align 4
175 // CHECK: [[GEP0:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[V]], i32 0, i32 0
176 // CHECK: store i64 %0, ptr [[GEP0]], align 4
177 // CHECK: [[GEP1:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[V]], i32 0, i32 1
178 // CHECK: store i64 %1, ptr [[GEP1]], align 4
181 // CHECK-LABEL: define{{.*}} void @test_struct_2() {{.*}} {
182 // CHECK: [[TMP:%.*]] = alloca [[STRUCT2]], align 4
183 // CHECK: [[CALL:%.*]] = call swiftcc { i64, i64 } @return_struct_2()
184 // CHECK: [[GEP:%.*]] = getelementptr inbounds nuw {{.*}} [[TMP]], i32 0, i32 0
185 // CHECK: [[T0:%.*]] = extractvalue { i64, i64 } [[CALL]], 0
186 // CHECK: store i64 [[T0]], ptr [[GEP]], align 4
187 // CHECK: [[GEP:%.*]] = getelementptr inbounds nuw {{.*}} [[TMP]], i32 0, i32 1
188 // CHECK: [[T0:%.*]] = extractvalue { i64, i64 } [[CALL]], 1
189 // CHECK: store i64 [[T0]], ptr [[GEP]], align 4
190 // CHECK: [[GEP:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[TMP]], i32 0, i32 0
191 // CHECK: [[R0:%.*]] = load i64, ptr [[GEP]], align 4
192 // CHECK: [[GEP:%.*]] = getelementptr inbounds nuw { i64, i64 }, ptr [[TMP]], i32 0, i32 1
193 // CHECK: [[R1:%.*]] = load i64, ptr [[GEP]], align 4
194 // CHECK: call swiftcc void @take_struct_2(i64 [[R0]], i64 [[R1]])
198 // There's no way to put a field randomly in the middle of an otherwise
199 // empty storage unit in C, so that case has to be tested in C++, which
200 // can use empty structs to introduce arbitrary padding. (In C, they end up
201 // with size 0 and so don't affect layout.)
203 // Misaligned data rule.
206 __attribute__((packed
)) float f
;
207 } struct_misaligned_1
;
208 TEST(struct_misaligned_1
)
209 // CHECK-LABEL: define{{.*}} swiftcc i64 @return_struct_misaligned_1()
210 // CHECK: [[RET:%.*]] = alloca [[STRUCT:%.*]], align 1
211 // CHECK: call void @llvm.memset{{.*}}(ptr align 1 [[RET]], i8 0, i64 5
212 // CHECK: [[GEP:%.*]] = getelementptr inbounds nuw { i64 }, ptr [[RET]], i32 0, i32 0
213 // CHECK: [[R0:%.*]] = load i64, ptr [[GEP]], align 1
214 // CHECK: ret i64 [[R0]]
216 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_misaligned_1(i64 %0) {{.*}}{
217 // CHECK: [[V:%.*]] = alloca [[STRUCT:%.*]], align 1
218 // CHECK: [[GEP:%.*]] = getelementptr inbounds nuw { i64 }, ptr [[V]], i32 0, i32 0
219 // CHECK: store i64 %0, ptr [[GEP]], align 1
222 // CHECK: define{{.*}} void @test_struct_misaligned_1() {{.*}}{
223 // CHECK: [[AGG:%.*]] = alloca [[STRUCT:%.*]], align 1
224 // CHECK: [[CALL:%.*]] = call swiftcc i64 @return_struct_misaligned_1()
225 // CHECK: [[T1:%.*]] = getelementptr inbounds nuw { i64 }, ptr [[AGG]], i32 0, i32 0
226 // CHECK: store i64 [[CALL]], ptr [[T1]], align 1
227 // CHECK: [[T1:%.*]] = getelementptr inbounds nuw { i64 }, ptr [[AGG]], i32 0, i32 0
228 // CHECK: [[P:%.*]] = load i64, ptr [[T1]], align 1
229 // CHECK: call swiftcc void @take_struct_misaligned_1(i64 [[P]])
239 // CHECK-LABEL: define {{.*}} void @return_struct_big_1(ptr dead_on_unwind noalias writable sret
241 // Should not be byval.
242 // CHECK-LABEL: define {{.*}} void @take_struct_big_1(ptr{{( %.*)?}})
244 /*****************************************************************************/
245 /********************************* TYPE MERGING ******************************/
246 /*****************************************************************************/
253 // CHECK-LABEL: define{{.*}} swiftcc i64 @return_union_het_fp()
254 // CHECK: [[RET:%.*]] = alloca [[UNION:%.*]], align 8
255 // CHECK: call void @llvm.memset{{.*}}(ptr align 8 [[RET]]
256 // CHECK: [[GEP:%.*]] = getelementptr inbounds nuw { i64 }, ptr [[RET]], i32 0, i32 0
257 // CHECK: [[R0:%.*]] = load i64, ptr [[GEP]], align 8
258 // CHECK: ret i64 [[R0]]
259 // CHECK-LABEL: define{{.*}} swiftcc void @take_union_het_fp(i64 %0) {{.*}}{
260 // CHECK: [[V:%.*]] = alloca [[UNION:%.*]], align 8
261 // CHECK: [[GEP:%.*]] = getelementptr inbounds nuw { i64 }, ptr [[V]], i32 0, i32 0
262 // CHECK: store i64 %0, ptr [[GEP]], align 8
265 // CHECK-LABEL: define{{.*}} void @test_union_het_fp() {{.*}}{
266 // CHECK: [[AGG:%.*]] = alloca [[UNION:%.*]], align 8
267 // CHECK: [[CALL:%.*]] = call swiftcc i64 @return_union_het_fp()
268 // CHECK: [[T1:%.*]] = getelementptr inbounds nuw { i64 }, ptr [[AGG]], i32 0, i32 0
269 // CHECK: store i64 [[CALL]], ptr [[T1]], align 8
270 // CHECK: [[T1:%.*]] = getelementptr inbounds nuw { i64 }, ptr [[AGG]], i32 0, i32 0
271 // CHECK: [[V0:%.*]] = load i64, ptr [[T1]], align 8
272 // CHECK: call swiftcc void @take_union_het_fp(i64 [[V0]])
282 // CHECK-LABEL: define{{.*}} void @test_union_hom_fp()
283 // CHECK: [[TMP:%.*]] = alloca [[REC:%.*]], align 4
284 // CHECK: [[CALL:%.*]] = call [[SWIFTCC]] float @return_union_hom_fp()
285 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float }, ptr [[TMP]], i32 0, i32 0
286 // CHECK: store float [[CALL]], ptr [[T0]], align 4
287 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float }, ptr [[TMP]], i32 0, i32 0
288 // CHECK: [[FIRST:%.*]] = load float, ptr [[T0]], align 4
289 // CHECK: call [[SWIFTCC]] void @take_union_hom_fp(float [[FIRST]])
295 } union_hom_fp_partial
;
296 TEST(union_hom_fp_partial
)
297 // CHECK: define{{.*}} void @test_union_hom_fp_partial()
298 // CHECK: [[AGG:%.*]] = alloca [[UNION:%.*]], align 16
299 // CHECK: [[CALL:%.*]] = call swiftcc { float, float, float, float } @return_union_hom_fp_partial()
300 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float, float, float, float }, ptr [[AGG]], i32 0, i32 0
301 // CHECK: [[T1:%.*]] = extractvalue { float, float, float, float } [[CALL]], 0
302 // CHECK: store float [[T1]], ptr [[T0]], align 16
303 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float, float, float, float }, ptr [[AGG]], i32 0, i32 1
304 // CHECK: [[T1:%.*]] = extractvalue { float, float, float, float } [[CALL]], 1
305 // CHECK: store float [[T1]], ptr [[T0]], align 4
306 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float, float, float, float }, ptr [[AGG]], i32 0, i32 2
307 // CHECK: [[T1:%.*]] = extractvalue { float, float, float, float } [[CALL]], 2
308 // CHECK: store float [[T1]], ptr [[T0]], align 8
309 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float, float, float, float }, ptr [[AGG]], i32 0, i32 3
310 // CHECK: [[T1:%.*]] = extractvalue { float, float, float, float } [[CALL]], 3
311 // CHECK: store float [[T1]], ptr [[T0]], align 4
312 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float, float, float, float }, ptr [[AGG]], i32 0, i32 0
313 // CHECK: [[V0:%.*]] = load float, ptr [[T0]], align 16
314 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float, float, float, float }, ptr [[AGG]], i32 0, i32 1
315 // CHECK: [[V1:%.*]] = load float, ptr [[T0]], align 4
316 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float, float, float, float }, ptr [[AGG]], i32 0, i32 2
317 // CHECK: [[V2:%.*]] = load float, ptr [[T0]], align 8
318 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { float, float, float, float }, ptr [[AGG]], i32 0, i32 3
319 // CHECK: [[V3:%.*]] = load float, ptr [[T0]], align 4
320 // CHECK: call swiftcc void @take_union_hom_fp_partial(float [[V0]], float [[V1]], float [[V2]], float [[V3]])
325 struct { int x
, y
; } f1
;
327 } union_het_fpv_partial
;
328 TEST(union_het_fpv_partial
)
329 // CHECK-LABEL: define{{.*}} void @test_union_het_fpv_partial()
330 // CHECK: [[AGG:%.*]] = alloca [[UNION:%.*]], align 16
331 // CHECK: [[CALL:%.*]] = call swiftcc { i64, float, float } @return_union_het_fpv_partial()
332 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { i64, float, float }, ptr [[AGG]], i32 0, i32 0
333 // CHECK: [[T1:%.*]] = extractvalue { i64, float, float } [[CALL]], 0
334 // CHECK: store i64 [[T1]], ptr [[T0]], align 16
335 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { i64, float, float }, ptr [[AGG]], i32 0, i32 1
336 // CHECK: [[T1:%.*]] = extractvalue { i64, float, float } [[CALL]], 1
337 // CHECK: store float [[T1]], ptr [[T0]], align 8
338 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { i64, float, float }, ptr [[AGG]], i32 0, i32 2
339 // CHECK: [[T1:%.*]] = extractvalue { i64, float, float } [[CALL]], 2
340 // CHECK: store float [[T1]], ptr [[T0]], align 4
341 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { i64, float, float }, ptr [[AGG]], i32 0, i32 0
342 // CHECK: [[V0:%.*]] = load i64, ptr [[T0]], align 16
343 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { i64, float, float }, ptr [[AGG]], i32 0, i32 1
344 // CHECK: [[V1:%.*]] = load float, ptr [[T0]], align 8
345 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw { i64, float, float }, ptr [[AGG]], i32 0, i32 2
346 // CHECK: [[V2:%.*]] = load float, ptr [[T0]], align 4
347 // CHECK: call swiftcc void @take_union_het_fpv_partial(i64 [[V0]], float [[V1]], float [[V2]])
351 /*****************************************************************************/
352 /****************************** VECTOR LEGALIZATION **************************/
353 /*****************************************************************************/
356 // CHECK-LABEL: define {{.*}} <4 x i32> @return_int4()
357 // CHECK-LABEL: define {{.*}} @take_int4(<4 x i32>
360 // CHECK-LABEL: define {{.*}} @return_int8()
361 // CHECK: [[RET:%.*]] = alloca [[REC:<8 x i32>]], align 16
362 // CHECK: [[VAR:%.*]] = alloca [[REC]], align
366 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG:.+]], ptr [[RET]], i32 0, i32 0
367 // CHECK: [[FIRST:%.*]] = load <4 x i32>, ptr [[T0]], align
368 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[RET]], i32 0, i32 1
369 // CHECK: [[SECOND:%.*]] = load <4 x i32>, ptr [[T0]], align
370 // CHECK: [[T0:%.*]] = insertvalue [[UAGG:{ <4 x i32>, <4 x i32> }]] poison, <4 x i32> [[FIRST]], 0
371 // CHECK: [[T1:%.*]] = insertvalue [[UAGG]] [[T0]], <4 x i32> [[SECOND]], 1
372 // CHECK: ret [[UAGG]] [[T1]]
373 // CHECK-LABEL: define {{.*}} @take_int8(<4 x i32> %0, <4 x i32> %1)
374 // CHECK: [[V:%.*]] = alloca [[REC]], align
375 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[V]], i32 0, i32 0
376 // CHECK: store <4 x i32> %0, ptr [[T0]], align
377 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[V]], i32 0, i32 1
378 // CHECK: store <4 x i32> %1, ptr [[T0]], align
380 // CHECK-LABEL: define{{.*}} void @test_int8()
381 // CHECK: [[TMP1:%.*]] = alloca [[REC]], align
382 // CHECK: [[TMP2:%.*]] = alloca [[REC]], align
383 // CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int8()
384 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[TMP1]], i32 0, i32 0
385 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0
386 // CHECK: store <4 x i32> [[T1]], ptr [[T0]], align
387 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[TMP1]], i32 0, i32 1
388 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 1
389 // CHECK: store <4 x i32> [[T1]], ptr [[T0]], align
390 // CHECK: [[V:%.*]] = load [[REC]], ptr [[TMP1]], align
391 // CHECK: store [[REC]] [[V]], ptr [[TMP2]], align
392 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[TMP2]], i32 0, i32 0
393 // CHECK: [[FIRST:%.*]] = load <4 x i32>, ptr [[T0]], align
394 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[TMP2]], i32 0, i32 1
395 // CHECK: [[SECOND:%.*]] = load <4 x i32>, ptr [[T0]], align
396 // CHECK: call [[SWIFTCC]] void @take_int8(<4 x i32> [[FIRST]], <4 x i32> [[SECOND]])
400 // CHECK-LABEL: define {{.*}} @return_int5()
401 // CHECK: [[RET:%.*]] = alloca [[REC:<5 x i32>]], align 16
402 // CHECK: [[VAR:%.*]] = alloca [[REC]], align
406 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG:.+]], ptr [[RET]], i32 0, i32 0
407 // CHECK: [[FIRST:%.*]] = load <4 x i32>, ptr [[T0]], align
408 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[RET]], i32 0, i32 1
409 // CHECK: [[SECOND:%.*]] = load i32, ptr [[T0]], align
410 // CHECK: [[T0:%.*]] = insertvalue [[UAGG:{ <4 x i32>, i32 }]] poison, <4 x i32> [[FIRST]], 0
411 // CHECK: [[T1:%.*]] = insertvalue [[UAGG]] [[T0]], i32 [[SECOND]], 1
412 // CHECK: ret [[UAGG]] [[T1]]
413 // CHECK-LABEL: define {{.*}} @take_int5(<4 x i32> %0, i32 %1)
414 // CHECK: [[V:%.*]] = alloca [[REC]], align
415 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[V]], i32 0, i32 0
416 // CHECK: store <4 x i32> %0, ptr [[T0]], align
417 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[V]], i32 0, i32 1
418 // CHECK: store i32 %1, ptr [[T0]], align
420 // CHECK-LABEL: define{{.*}} void @test_int5()
421 // CHECK: [[TMP1:%.*]] = alloca [[REC]], align
422 // CHECK: [[TMP2:%.*]] = alloca [[REC]], align
423 // CHECK: [[CALL:%.*]] = call [[SWIFTCC]] [[UAGG]] @return_int5()
424 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[TMP1]], i32 0, i32 0
425 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 0
426 // CHECK: store <4 x i32> [[T1]], ptr [[T0]], align
427 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[TMP1]], i32 0, i32 1
428 // CHECK: [[T1:%.*]] = extractvalue [[UAGG]] [[CALL]], 1
429 // CHECK: store i32 [[T1]], ptr [[T0]], align
430 // CHECK: [[V:%.*]] = load [[REC]], ptr [[TMP1]], align
431 // CHECK: store [[REC]] [[V]], ptr [[TMP2]], align
432 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[TMP2]], i32 0, i32 0
433 // CHECK: [[FIRST:%.*]] = load <4 x i32>, ptr [[T0]], align
434 // CHECK: [[T0:%.*]] = getelementptr inbounds nuw [[AGG]], ptr [[TMP2]], i32 0, i32 1
435 // CHECK: [[SECOND:%.*]] = load i32, ptr [[T0]], align
436 // CHECK: call [[SWIFTCC]] void @take_int5(<4 x i32> [[FIRST]], i32 [[SECOND]])
441 int3 v
__attribute__((packed
));
443 TEST(misaligned_int3
)
444 // CHECK-LABEL: define{{.*}} swiftcc void @take_misaligned_int3(i64 %0, i64 %1)
450 // CHECK-LABEL: define{{.*}} swiftcc float @return_struct_f1()
451 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_f1(float %0)
458 // CHECK-LABEL: define{{.*}} swiftcc { float, float } @return_struct_f2()
459 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_f2(float %0, float %1)
467 // CHECK-LABEL: define{{.*}} swiftcc { float, float, float } @return_struct_f3()
468 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_f3(float %0, float %1, float %2)
477 // CHECK-LABEL: define{{.*}} swiftcc { float, float, float, float } @return_struct_f4()
478 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_f4(float %0, float %1, float %2, float %3)
485 // CHECK-LABEL: define{{.*}} swiftcc double @return_struct_d1()
486 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_d1(double %0)
494 // CHECK-LABEL: define{{.*}} swiftcc { double, double } @return_struct_d2()
495 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_d2(double %0, double %1)
502 // CHECK-LABEL: define{{.*}} swiftcc { double, double, double } @return_struct_d3()
503 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_d3(double %0, double %1, double %2)
512 // CHECK-LABEL: define{{.*}} swiftcc { double, double, double, double } @return_struct_d4()
513 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_d4(double %0, double %1, double %2, double %3)
523 // CHECK: define{{.*}} swiftcc void @return_struct_d5(ptr dead_on_unwind noalias writable sret([[STRUCT5:.+]])
524 // CHECK: define{{.*}} swiftcc void @take_struct_d5(ptr
530 // CHECK-LABEL: define{{.*}} swiftcc i8 @return_struct_c1()
531 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_c1(i8 %0)
538 // CHECK-LABEL: define{{.*}} swiftcc i16 @return_struct_c2()
539 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_c2(i16 %0)
548 // CHECK-LABEL: define{{.*}} swiftcc i32 @return_struct_c3()
549 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_c3(i32 %0)
558 // CHECK-LABEL: define{{.*}} swiftcc i32 @return_struct_c4()
559 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_c4(i32 %0)
569 // CHECK-LABEL: define{{.*}} swiftcc i64 @return_struct_c5()
570 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_c5(i64 %0)
584 // CHECK-LABEL: define{{.*}} swiftcc { i64, i8 } @return_struct_c9()
585 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_c9(i64 %0, i8 %1)
591 // CHECK-LABEL: define{{.*}} swiftcc i16 @return_struct_s1()
592 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_s1(i16 %0)
599 // CHECK-LABEL: define{{.*}} swiftcc i32 @return_struct_s2()
600 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_s2(i32 %0)
609 // CHECK-LABEL: define{{.*}} swiftcc i64 @return_struct_s3()
610 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_s3(i64 %0)
619 // CHECK-LABEL: define{{.*}} swiftcc i64 @return_struct_s4()
620 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_s4(i64 %0)
630 // CHECK-LABEL: define{{.*}} swiftcc { i64, i16 } @return_struct_s5()
631 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_s5(i64 %0, i16 %1)
638 // CHECK-LABEL: define{{.*}} swiftcc i32 @return_struct_i1()
639 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_i1(i32 %0)
646 // CHECK-LABEL: define{{.*}} swiftcc i64 @return_struct_i2()
647 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_i2(i64 %0)
655 // CHECK-LABEL: define{{.*}} swiftcc { i64, i32 } @return_struct_i3()
656 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_i3(i64 %0, i32 %1)
665 // CHECK-LABEL: define{{.*}} swiftcc { i64, i64 } @return_struct_i4()
666 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_i4(i64 %0, i64 %1)
672 // CHECK-LABEL: define{{.*}} swiftcc i64 @return_struct_l1()
673 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_l1(i64 %0)
680 // CHECK-LABEL: define{{.*}} swiftcc { i64, i64 } @return_struct_l2()
681 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_l2(i64 %0, i64 %1)
689 // CHECK-LABEL: define{{.*}} swiftcc { i64, i64, i64 } @return_struct_l3()
690 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_l3(i64 %0, i64 %1, i64 %2)
699 // CHECK-LABEL: define{{.*}} swiftcc { i64, i64, i64, i64 } @return_struct_l4()
700 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_l4(i64 %0, i64 %1, i64 %2, i64 %3)
710 // CHECK: define{{.*}} swiftcc void @return_struct_l5(ptr dead_on_unwind noalias writable sret([[STRUCT5:.+]])
711 // CHECK: define{{.*}} swiftcc void @take_struct_l5(ptr
717 // CHECK-LABEL: define{{.*}} swiftcc <16 x i8> @return_struct_vc1()
718 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vc1(<16 x i8> %0)
725 // CHECK-LABEL: define{{.*}} swiftcc { <16 x i8>, <16 x i8> } @return_struct_vc2()
726 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vc2(<16 x i8> %0, <16 x i8> %1)
734 // CHECK-LABEL: define{{.*}} swiftcc { <16 x i8>, <16 x i8>, <16 x i8> } @return_struct_vc3()
735 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vc3(<16 x i8> %0, <16 x i8> %1, <16 x i8> %2)
744 // CHECK-LABEL: define{{.*}} swiftcc { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @return_struct_vc4()
745 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vc4(<16 x i8> %0, <16 x i8> %1, <16 x i8> %2, <16 x i8> %3)
755 // CHECK: define{{.*}} swiftcc void @return_struct_vc5(ptr dead_on_unwind noalias writable sret([[STRUCT:.+]])
756 // CHECK: define{{.*}} swiftcc void @take_struct_vc5(ptr
762 // CHECK-LABEL: define{{.*}} swiftcc <8 x i16> @return_struct_vs1()
763 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vs1(<8 x i16> %0)
770 // CHECK-LABEL: define{{.*}} swiftcc { <8 x i16>, <8 x i16> } @return_struct_vs2()
771 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vs2(<8 x i16> %0, <8 x i16> %1)
779 // CHECK-LABEL: define{{.*}} swiftcc { <8 x i16>, <8 x i16>, <8 x i16> } @return_struct_vs3()
780 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vs3(<8 x i16> %0, <8 x i16> %1, <8 x i16> %2)
789 // CHECK-LABEL: define{{.*}} swiftcc { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @return_struct_vs4()
790 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vs4(<8 x i16> %0, <8 x i16> %1, <8 x i16> %2, <8 x i16> %3)
800 // CHECK: define{{.*}} swiftcc void @return_struct_vs5(ptr dead_on_unwind noalias writable sret([[STRUCT:.+]])
801 // CHECK: define{{.*}} swiftcc void @take_struct_vs5(ptr
807 // CHECK-LABEL: define{{.*}} swiftcc <4 x i32> @return_struct_vi1()
808 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vi1(<4 x i32> %0)
815 // CHECK-LABEL: define{{.*}} swiftcc { <4 x i32>, <4 x i32> } @return_struct_vi2()
816 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vi2(<4 x i32> %0, <4 x i32> %1)
824 // CHECK-LABEL: define{{.*}} swiftcc { <4 x i32>, <4 x i32>, <4 x i32> } @return_struct_vi3()
825 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vi3(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2)
834 // CHECK-LABEL: define{{.*}} swiftcc { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @return_struct_vi4()
835 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vi4(<4 x i32> %0, <4 x i32> %1, <4 x i32> %2, <4 x i32> %3)
845 // CHECK: define{{.*}} swiftcc void @return_struct_vi5(ptr dead_on_unwind noalias writable sret([[STRUCT:.+]])
846 // CHECK: define{{.*}} swiftcc void @take_struct_vi5(ptr
852 // CHECK-LABEL: define{{.*}} swiftcc <2 x i64> @return_struct_vl1()
853 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vl1(<2 x i64> %0)
862 // CHECK-LABEL: define{{.*}} swiftcc { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @return_struct_vl4()
863 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vl4(<2 x i64> %0, <2 x i64> %1, <2 x i64> %2, <2 x i64> %3)
873 // CHECK: define{{.*}} swiftcc void @return_struct_vl5(ptr dead_on_unwind noalias writable sret([[STRUCT:.+]])
874 // CHECK: define{{.*}} swiftcc void @take_struct_vl5(ptr
880 // CHECK-LABEL: define{{.*}} swiftcc <2 x double> @return_struct_vd1()
881 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vd1(<2 x double> %0)
890 // CHECK-LABEL: define{{.*}} swiftcc { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @return_struct_vd4()
891 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vd4(<2 x double> %0, <2 x double> %1, <2 x double> %2, <2 x double> %3)
901 // CHECK: define{{.*}} swiftcc void @return_struct_vd5(ptr dead_on_unwind noalias writable sret([[STRUCT:.+]])
902 // CHECK: define{{.*}} swiftcc void @take_struct_vd5(ptr
908 // CHECK-LABEL: define{{.*}} swiftcc { <2 x double>, <2 x double> } @return_struct_vd41()
909 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vd41(<2 x double> %0, <2 x double> %1)
916 // CHECK-LABEL: define{{.*}} swiftcc { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @return_struct_vd42()
917 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vd42(<2 x double> %0, <2 x double> %1, <2 x double> %2, <2 x double> %3)
925 // CHECK: define{{.*}} swiftcc void @return_struct_vd43(ptr dead_on_unwind noalias writable sret([[STRUCT:.+]])
926 // CHECK: define{{.*}} swiftcc void @take_struct_vd43(ptr
932 // CHECK-LABEL: define{{.*}} swiftcc <4 x float> @return_struct_vf1()
933 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vf1(<4 x float> %0)
940 // CHECK-LABEL: define{{.*}} swiftcc { <4 x float>, <4 x float> } @return_struct_vf2()
941 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vf2(<4 x float> %0, <4 x float> %1)
950 // CHECK-LABEL: define{{.*}} swiftcc { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @return_struct_vf4()
951 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vf4(<4 x float> %0, <4 x float> %1, <4 x float> %2, <4 x float> %3)
961 // CHECK: define{{.*}} swiftcc void @return_struct_vf5(ptr dead_on_unwind noalias writable sret([[STRUCT:.+]])
962 // CHECK: define{{.*}} swiftcc void @take_struct_vf5(ptr
968 // CHECK-LABEL: define{{.*}} swiftcc { <4 x float>, <4 x float> } @return_struct_vf81()
969 // CHECK-LABEL: define{{.*}} swiftcc void @take_struct_vf81(<4 x float> %0, <4 x float> %1)
985 TEST(union_het_vecint
)
986 // CHECK: define{{.*}} swiftcc { i64, i64, i64, i64 } @return_union_het_vecint()
987 // CHECK: define{{.*}} swiftcc void @take_union_het_vecint(i64 %0, i64 %1, i64 %2, i64 %3)
993 // ARM64-LABEL: define{{.*}} swiftcc { <2 x float>, float } @return_struct_v1f3()
994 // ARM64-LABEL: define{{.*}} swiftcc void @take_struct_v1f3(<2 x float> %0, float %1)
998 unsigned long long val
;
999 } __attribute__((packed
)) padded_alloc_size_vector
;
1000 TEST(padded_alloc_size_vector
)
1001 // X86-64-LABEL: take_padded_alloc_size_vector(<3 x i32> %0, i64 %1)
1002 // X86-64-NOT: [4 x i8]
1008 } union_hom_fp_partial2
;
1009 TEST(union_hom_fp_partial2
)
1010 // X86-64-LABEL: take_union_hom_fp_partial2(float %0, float %1, float %2)
1011 // ARM64-LABEL: take_union_hom_fp_partial2(float %0, float %1, float %2)
1013 // At one point, we emitted lifetime.ends without a matching lifetime.start for
1014 // CoerceAndExpanded args. Since we're not performing optimizations, neither
1015 // intrinsic should be emitted.
1016 // CHECK-LABEL: define{{.*}} void @no_lifetime_markers
1017 void no_lifetime_markers() {
1018 // CHECK-NOT: call void @llvm.lifetime.
1019 take_int5(return_int5());
1023 unsigned long long a
;
1024 unsigned long long b
;
1028 _Atomic(double_word
) a
;
1029 } atomic_double_word
;
1031 // CHECK-LABEL: use_atomic(i64 %0, i64 %1)
1032 SWIFTCALL
void use_atomic(atomic_double_word a
) {}
1035 unsigned long long a
;
1037 } __attribute__((packed
)) packed
;
1043 // CHECK-LABEL: use_atomic_padded(i64 %0, i64 %1)
1044 SWIFTCALL
void use_atomic_padded(atomic_padded a
) {}
1060 // CHECK-LABEL: define swiftcc { float, float, float, float } @return_vector_union()
1061 // CHECK-LABEL: define swiftcc void @take_vector_union(float %0, float %1, float %2, float %3)