1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: aarch64-registered-target
3 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
4 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
5 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s
6 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64 -target-feature +sve -target-feature +bf16 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
8 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
9 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64 -target-feature +sme -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
13 #if defined __ARM_FEATURE_SME
14 #define MODE_ATTR __arm_streaming
19 #ifdef SVE_OVERLOADED_FORMS
20 // A simple used,unused... macro, long enough to represent any SVE builtin.
21 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
23 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
26 // CHECK-LABEL: @test_svclasta_bf16(
28 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
29 // CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.clasta.nxv8bf16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x bfloat> [[FALLBACK:%.*]], <vscale x 8 x bfloat> [[DATA:%.*]])
30 // CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]
32 // CPP-CHECK-LABEL: @_Z18test_svclasta_bf16u10__SVBool_tu14__SVBfloat16_tS0_(
33 // CPP-CHECK-NEXT: entry:
34 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
35 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.clasta.nxv8bf16(<vscale x 8 x i1> [[TMP0]], <vscale x 8 x bfloat> [[FALLBACK:%.*]], <vscale x 8 x bfloat> [[DATA:%.*]])
36 // CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP1]]
38 svbfloat16_t
test_svclasta_bf16(svbool_t pg
, svbfloat16_t fallback
, svbfloat16_t data
) MODE_ATTR
{
39 // expected-warning@+1 {{implicit declaration of function 'svclasta_bf16'}}
40 return SVE_ACLE_FUNC(svclasta
, _bf16
, , )(pg
, fallback
, data
);
43 // CHECK-LABEL: @test_svclasta_n_bf16(
45 // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
46 // CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16(<vscale x 8 x i1> [[TMP0]], bfloat [[FALLBACK:%.*]], <vscale x 8 x bfloat> [[DATA:%.*]])
47 // CHECK-NEXT: ret bfloat [[TMP1]]
49 // CPP-CHECK-LABEL: @_Z20test_svclasta_n_bf16u10__SVBool_tu6__bf16u14__SVBfloat16_t(
50 // CPP-CHECK-NEXT: entry:
51 // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
52 // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16(<vscale x 8 x i1> [[TMP0]], bfloat [[FALLBACK:%.*]], <vscale x 8 x bfloat> [[DATA:%.*]])
53 // CPP-CHECK-NEXT: ret bfloat [[TMP1]]
55 bfloat16_t
test_svclasta_n_bf16(svbool_t pg
, bfloat16_t fallback
, svbfloat16_t data
) MODE_ATTR
{
56 // expected-warning@+1 {{implicit declaration of function 'svclasta_n_bf16'}}
57 return SVE_ACLE_FUNC(svclasta
, _n_bf16
, , )(pg
, fallback
, data
);