clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_cntd.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s
   4 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -passes=mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   5 // RUN: %clang_cc1 -triple aarch64 -target-feature +sve -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   6 // RUN: %clang_cc1 -triple aarch64 -target-feature +sme -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
   7
   8 #include <arm_sve.h>
   9
  10 #if defined __ARM_FEATURE_SME
  11 #define MODE_ATTR __arm_streaming
  12 #else
  13 #define MODE_ATTR
  14 #endif
  15
  16 // CHECK-LABEL: @test_svcntd(
  17 // CHECK-NEXT:  entry:
  18 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
  19 // CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
  20 // CHECK-NEXT:    ret i64 [[TMP1]]
  21 //
  22 // CPP-CHECK-LABEL: @_Z11test_svcntdv(
  23 // CPP-CHECK-NEXT:  entry:
  24 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
  25 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
  26 // CPP-CHECK-NEXT:    ret i64 [[TMP1]]
  27 //
  28 uint64_t test_svcntd(void) MODE_ATTR
  29 {
  30   return svcntd();
  31 }
  32
  33 // CHECK-LABEL: @test_svcntd_pat(
  34 // CHECK-NEXT:  entry:
  35 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 0)
  36 // CHECK-NEXT:    ret i64 [[TMP0]]
  37 //
  38 // CPP-CHECK-LABEL: @_Z15test_svcntd_patv(
  39 // CPP-CHECK-NEXT:  entry:
  40 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 0)
  41 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  42 //
  43 uint64_t test_svcntd_pat(void) MODE_ATTR
  44 {
  45   return svcntd_pat(SV_POW2);
  46 }
  47
  48 // CHECK-LABEL: @test_svcntd_pat_1(
  49 // CHECK-NEXT:  entry:
  50 // CHECK-NEXT:    ret i64 1
  51 //
  52 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_1v(
  53 // CPP-CHECK-NEXT:  entry:
  54 // CPP-CHECK-NEXT:    ret i64 1
  55 //
  56 uint64_t test_svcntd_pat_1(void) MODE_ATTR
  57 {
  58   return svcntd_pat(SV_VL1);
  59 }
  60
  61 // CHECK-LABEL: @test_svcntd_pat_2(
  62 // CHECK-NEXT:  entry:
  63 // CHECK-NEXT:    ret i64 2
  64 //
  65 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_2v(
  66 // CPP-CHECK-NEXT:  entry:
  67 // CPP-CHECK-NEXT:    ret i64 2
  68 //
  69 uint64_t test_svcntd_pat_2(void) MODE_ATTR
  70 {
  71   return svcntd_pat(SV_VL2);
  72 }
  73
  74 // CHECK-LABEL: @test_svcntd_pat_3(
  75 // CHECK-NEXT:  entry:
  76 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 3)
  77 // CHECK-NEXT:    ret i64 [[TMP0]]
  78 //
  79 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_3v(
  80 // CPP-CHECK-NEXT:  entry:
  81 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 3)
  82 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  83 //
  84 uint64_t test_svcntd_pat_3(void) MODE_ATTR
  85 {
  86   return svcntd_pat(SV_VL3);
  87 }
  88
  89 // CHECK-LABEL: @test_svcntd_pat_4(
  90 // CHECK-NEXT:  entry:
  91 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 4)
  92 // CHECK-NEXT:    ret i64 [[TMP0]]
  93 //
  94 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_4v(
  95 // CPP-CHECK-NEXT:  entry:
  96 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 4)
  97 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
  98 //
  99 uint64_t test_svcntd_pat_4(void) MODE_ATTR
 100 {
 101   return svcntd_pat(SV_VL4);
 102 }
 103
 104 // CHECK-LABEL: @test_svcntd_pat_5(
 105 // CHECK-NEXT:  entry:
 106 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 5)
 107 // CHECK-NEXT:    ret i64 [[TMP0]]
 108 //
 109 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_5v(
 110 // CPP-CHECK-NEXT:  entry:
 111 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 5)
 112 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 113 //
 114 uint64_t test_svcntd_pat_5(void) MODE_ATTR
 115 {
 116   return svcntd_pat(SV_VL5);
 117 }
 118
 119 // CHECK-LABEL: @test_svcntd_pat_6(
 120 // CHECK-NEXT:  entry:
 121 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 6)
 122 // CHECK-NEXT:    ret i64 [[TMP0]]
 123 //
 124 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_6v(
 125 // CPP-CHECK-NEXT:  entry:
 126 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 6)
 127 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 128 //
 129 uint64_t test_svcntd_pat_6(void) MODE_ATTR
 130 {
 131   return svcntd_pat(SV_VL6);
 132 }
 133
 134 // CHECK-LABEL: @test_svcntd_pat_7(
 135 // CHECK-NEXT:  entry:
 136 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 7)
 137 // CHECK-NEXT:    ret i64 [[TMP0]]
 138 //
 139 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_7v(
 140 // CPP-CHECK-NEXT:  entry:
 141 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 7)
 142 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 143 //
 144 uint64_t test_svcntd_pat_7(void) MODE_ATTR
 145 {
 146   return svcntd_pat(SV_VL7);
 147 }
 148
 149 // CHECK-LABEL: @test_svcntd_pat_8(
 150 // CHECK-NEXT:  entry:
 151 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 8)
 152 // CHECK-NEXT:    ret i64 [[TMP0]]
 153 //
 154 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_8v(
 155 // CPP-CHECK-NEXT:  entry:
 156 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 8)
 157 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 158 //
 159 uint64_t test_svcntd_pat_8(void) MODE_ATTR
 160 {
 161   return svcntd_pat(SV_VL8);
 162 }
 163
 164 // CHECK-LABEL: @test_svcntd_pat_9(
 165 // CHECK-NEXT:  entry:
 166 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 9)
 167 // CHECK-NEXT:    ret i64 [[TMP0]]
 168 //
 169 // CPP-CHECK-LABEL: @_Z17test_svcntd_pat_9v(
 170 // CPP-CHECK-NEXT:  entry:
 171 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 9)
 172 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 173 //
 174 uint64_t test_svcntd_pat_9(void) MODE_ATTR
 175 {
 176   return svcntd_pat(SV_VL16);
 177 }
 178
 179 // CHECK-LABEL: @test_svcntd_pat_10(
 180 // CHECK-NEXT:  entry:
 181 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 10)
 182 // CHECK-NEXT:    ret i64 [[TMP0]]
 183 //
 184 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_10v(
 185 // CPP-CHECK-NEXT:  entry:
 186 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 10)
 187 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 188 //
 189 uint64_t test_svcntd_pat_10(void) MODE_ATTR
 190 {
 191   return svcntd_pat(SV_VL32);
 192 }
 193
 194 // CHECK-LABEL: @test_svcntd_pat_11(
 195 // CHECK-NEXT:  entry:
 196 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 11)
 197 // CHECK-NEXT:    ret i64 [[TMP0]]
 198 //
 199 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_11v(
 200 // CPP-CHECK-NEXT:  entry:
 201 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 11)
 202 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 203 //
 204 uint64_t test_svcntd_pat_11(void) MODE_ATTR
 205 {
 206   return svcntd_pat(SV_VL64);
 207 }
 208
 209 // CHECK-LABEL: @test_svcntd_pat_12(
 210 // CHECK-NEXT:  entry:
 211 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 12)
 212 // CHECK-NEXT:    ret i64 [[TMP0]]
 213 //
 214 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_12v(
 215 // CPP-CHECK-NEXT:  entry:
 216 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 12)
 217 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 218 //
 219 uint64_t test_svcntd_pat_12(void) MODE_ATTR
 220 {
 221   return svcntd_pat(SV_VL128);
 222 }
 223
 224 // CHECK-LABEL: @test_svcntd_pat_13(
 225 // CHECK-NEXT:  entry:
 226 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 13)
 227 // CHECK-NEXT:    ret i64 [[TMP0]]
 228 //
 229 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_13v(
 230 // CPP-CHECK-NEXT:  entry:
 231 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 13)
 232 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 233 //
 234 uint64_t test_svcntd_pat_13(void) MODE_ATTR
 235 {
 236   return svcntd_pat(SV_VL256);
 237 }
 238
 239 // CHECK-LABEL: @test_svcntd_pat_14(
 240 // CHECK-NEXT:  entry:
 241 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 29)
 242 // CHECK-NEXT:    ret i64 [[TMP0]]
 243 //
 244 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_14v(
 245 // CPP-CHECK-NEXT:  entry:
 246 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 29)
 247 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 248 //
 249 uint64_t test_svcntd_pat_14(void) MODE_ATTR
 250 {
 251   return svcntd_pat(SV_MUL4);
 252 }
 253
 254 // CHECK-LABEL: @test_svcntd_pat_15(
 255 // CHECK-NEXT:  entry:
 256 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 30)
 257 // CHECK-NEXT:    ret i64 [[TMP0]]
 258 //
 259 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_15v(
 260 // CPP-CHECK-NEXT:  entry:
 261 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sve.cntd(i32 30)
 262 // CPP-CHECK-NEXT:    ret i64 [[TMP0]]
 263 //
 264 uint64_t test_svcntd_pat_15(void) MODE_ATTR
 265 {
 266   return svcntd_pat(SV_MUL3);
 267 }
 268
 269 // CHECK-LABEL: @test_svcntd_pat_16(
 270 // CHECK-NEXT:  entry:
 271 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
 272 // CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
 273 // CHECK-NEXT:    ret i64 [[TMP1]]
 274 //
 275 // CPP-CHECK-LABEL: @_Z18test_svcntd_pat_16v(
 276 // CPP-CHECK-NEXT:  entry:
 277 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call i64 @llvm.vscale.i64()
 278 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = shl nuw nsw i64 [[TMP0]], 1
 279 // CPP-CHECK-NEXT:    ret i64 [[TMP1]]
 280 //
 281 uint64_t test_svcntd_pat_16(void) MODE_ATTR
 282 {
 283   return svcntd_pat(SV_ALL);
 284 }