clang/test/CodeGen/AArch64/sve2-intrinsics/acle_sve2_revd.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \
   4 // RUN:   -target-feature +bf16 -target-feature +sme -target-feature +sme2 -O1 -Werror -emit-llvm -o - %s | FileCheck %s
   5 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu \
   6 // RUN:   -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -emit-llvm -o - %s | FileCheck %s
   7 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu \
   8 // RUN:   -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
   9 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu \
  10 // RUN:   -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
  11 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 -target-feature +bf16 -S -disable-O0-optnone -Werror -o /dev/null %s
  12 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sme2 -target-feature +bf16 -S -disable-O0-optnone -Werror -o /dev/null %s
  13 #include <arm_sve.h>
  14
  15 #if defined __ARM_FEATURE_SME
  16 #define MODE_ATTR __arm_streaming
  17 #else
  18 #define MODE_ATTR
  19 #endif
  20
  21 #ifdef SVE_OVERLOADED_FORMS
  22 // A simple used,unused... macro, long enough to represent any SVE builtin.
  23 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
  24 #else
  25 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
  26 #endif
  27
  28 // CHECK-LABEL: @test_svrevd_s8_z(
  29 // CHECK-NEXT:  entry:
  30 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  31 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  32 //
  33 // CPP-CHECK-LABEL: @_Z16test_svrevd_s8_zu10__SVBool_tu10__SVInt8_t(
  34 // CPP-CHECK-NEXT:  entry:
  35 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  36 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  37 //
  38 svint8_t test_svrevd_s8_z(svbool_t pg, svint8_t op) MODE_ATTR {
  39   return SVE_ACLE_FUNC(svrevd, _s8, _z, )(pg, op);
  40 }
  41
  42 // CHECK-LABEL: @test_svrevd_s16_z(
  43 // CHECK-NEXT:  entry:
  44 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  45 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  46 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  47 //
  48 // CPP-CHECK-LABEL: @_Z17test_svrevd_s16_zu10__SVBool_tu11__SVInt16_t(
  49 // CPP-CHECK-NEXT:  entry:
  50 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
  51 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
  52 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
  53 //
  54 svint16_t test_svrevd_s16_z(svbool_t pg, svint16_t op) MODE_ATTR {
  55   return SVE_ACLE_FUNC(svrevd, _s16, _z, )(pg, op);
  56 }
  57
  58 // CHECK-LABEL: @test_svrevd_s32_z(
  59 // CHECK-NEXT:  entry:
  60 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  61 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  62 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  63 //
  64 // CPP-CHECK-LABEL: @_Z17test_svrevd_s32_zu10__SVBool_tu11__SVInt32_t(
  65 // CPP-CHECK-NEXT:  entry:
  66 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
  67 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
  68 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
  69 //
  70 svint32_t test_svrevd_s32_z(svbool_t pg, svint32_t op) MODE_ATTR {
  71   return SVE_ACLE_FUNC(svrevd, _s32, _z, )(pg, op);
  72 }
  73
  74 // CHECK-LABEL: @test_svrevd_s64_z(
  75 // CHECK-NEXT:  entry:
  76 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  77 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
  78 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  79 //
  80 // CPP-CHECK-LABEL: @_Z17test_svrevd_s64_zu10__SVBool_tu11__SVInt64_t(
  81 // CPP-CHECK-NEXT:  entry:
  82 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
  83 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
  84 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
  85 //
  86 svint64_t test_svrevd_s64_z(svbool_t pg, svint64_t op) MODE_ATTR {
  87   return SVE_ACLE_FUNC(svrevd, _s64, _z, )(pg, op);
  88 }
  89
  90 // CHECK-LABEL: @test_svrevd_u8_z(
  91 // CHECK-NEXT:  entry:
  92 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  93 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  94 //
  95 // CPP-CHECK-LABEL: @_Z16test_svrevd_u8_zu10__SVBool_tu11__SVUint8_t(
  96 // CPP-CHECK-NEXT:  entry:
  97 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
  98 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  99 //
 100 svuint8_t test_svrevd_u8_z(svbool_t pg, svuint8_t op) MODE_ATTR {
 101   return SVE_ACLE_FUNC(svrevd, _u8, _z, )(pg, op);
 102 }
 103 // CHECK-LABEL: @test_svrevd_u16_z(
 104 // CHECK-NEXT:  entry:
 105 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 106 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 107 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 108 //
 109 // CPP-CHECK-LABEL: @_Z17test_svrevd_u16_zu10__SVBool_tu12__SVUint16_t(
 110 // CPP-CHECK-NEXT:  entry:
 111 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 112 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 113 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 114 //
 115 svuint16_t test_svrevd_u16_z(svbool_t pg, svuint16_t op) MODE_ATTR {
 116   return SVE_ACLE_FUNC(svrevd, _u16, _z, )(pg, op);
 117 }
 118
 119 // CHECK-LABEL: @test_svrevd_u32_z(
 120 // CHECK-NEXT:  entry:
 121 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 122 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 123 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 124 //
 125 // CPP-CHECK-LABEL: @_Z17test_svrevd_u32_zu10__SVBool_tu12__SVUint32_t(
 126 // CPP-CHECK-NEXT:  entry:
 127 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 128 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 129 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 130 //
 131 svuint32_t test_svrevd_u32_z(svbool_t pg, svuint32_t op) MODE_ATTR {
 132   return SVE_ACLE_FUNC(svrevd, _u32, _z, )(pg, op);
 133 }
 134
 135 // CHECK-LABEL: @test_svrevd_u64_z(
 136 // CHECK-NEXT:  entry:
 137 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 138 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 139 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 140 //
 141 // CPP-CHECK-LABEL: @_Z17test_svrevd_u64_zu10__SVBool_tu12__SVUint64_t(
 142 // CPP-CHECK-NEXT:  entry:
 143 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 144 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 145 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 146 //
 147 svuint64_t test_svrevd_u64_z(svbool_t pg, svuint64_t op) MODE_ATTR {
 148   return SVE_ACLE_FUNC(svrevd, _u64, _z, )(pg, op);
 149 }
 150
 151 // CHECK-LABEL: @test_svrevd_s8_m(
 152 // CHECK-NEXT:  entry:
 153 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 154 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 155 //
 156 // CPP-CHECK-LABEL: @_Z16test_svrevd_s8_mu10__SVInt8_tu10__SVBool_tS_(
 157 // CPP-CHECK-NEXT:  entry:
 158 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 159 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 160 //
 161 svint8_t test_svrevd_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) MODE_ATTR {
 162   return SVE_ACLE_FUNC(svrevd, _s8, _m, )(inactive, pg, op);
 163 }
 164
 165 // CHECK-LABEL: @test_svrevd_s16_m(
 166 // CHECK-NEXT:  entry:
 167 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 168 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 169 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 170 //
 171 // CPP-CHECK-LABEL: @_Z17test_svrevd_s16_mu11__SVInt16_tu10__SVBool_tS_(
 172 // CPP-CHECK-NEXT:  entry:
 173 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 174 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 175 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 176 //
 177 svint16_t test_svrevd_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) MODE_ATTR {
 178   return SVE_ACLE_FUNC(svrevd, _s16, _m, )(inactive, pg, op);
 179 }
 180
 181 // CHECK-LABEL: @test_svrevd_s32_m(
 182 // CHECK-NEXT:  entry:
 183 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 184 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 185 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 186 //
 187 // CPP-CHECK-LABEL: @_Z17test_svrevd_s32_mu11__SVInt32_tu10__SVBool_tS_(
 188 // CPP-CHECK-NEXT:  entry:
 189 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 190 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 191 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 192 //
 193 svint32_t test_svrevd_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) MODE_ATTR {
 194   return SVE_ACLE_FUNC(svrevd, _s32, _m, )(inactive, pg, op);
 195 }
 196
 197 // CHECK-LABEL: @test_svrevd_s64_m(
 198 // CHECK-NEXT:  entry:
 199 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 200 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 201 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 202 //
 203 // CPP-CHECK-LABEL: @_Z17test_svrevd_s64_mu11__SVInt64_tu10__SVBool_tS_(
 204 // CPP-CHECK-NEXT:  entry:
 205 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 206 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 207 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 208 //
 209 svint64_t test_svrevd_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) MODE_ATTR {
 210   return SVE_ACLE_FUNC(svrevd, _s64, _m, )(inactive, pg, op);
 211 }
 212
 213 // CHECK-LABEL: @test_svrevd_u8_m(
 214 // CHECK-NEXT:  entry:
 215 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 216 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 217 //
 218 // CPP-CHECK-LABEL: @_Z16test_svrevd_u8_mu11__SVUint8_tu10__SVBool_tS_(
 219 // CPP-CHECK-NEXT:  entry:
 220 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> [[INACTIVE:%.*]], <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 221 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 222 //
 223 svuint8_t test_svrevd_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) MODE_ATTR {
 224   return SVE_ACLE_FUNC(svrevd, _u8, _m, )(inactive, pg, op);
 225 }
 226
 227 // CHECK-LABEL: @test_svrevd_u16_m(
 228 // CHECK-NEXT:  entry:
 229 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 230 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 231 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 232 //
 233 // CPP-CHECK-LABEL: @_Z17test_svrevd_u16_mu12__SVUint16_tu10__SVBool_tS_(
 234 // CPP-CHECK-NEXT:  entry:
 235 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 236 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 237 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 238 //
 239 svuint16_t test_svrevd_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) MODE_ATTR {
 240   return SVE_ACLE_FUNC(svrevd, _u16, _m, )(inactive, pg, op);
 241 }
 242
 243 // CHECK-LABEL: @test_svrevd_u32_m(
 244 // CHECK-NEXT:  entry:
 245 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 246 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 247 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 248 //
 249 // CPP-CHECK-LABEL: @_Z17test_svrevd_u32_mu12__SVUint32_tu10__SVBool_tS_(
 250 // CPP-CHECK-NEXT:  entry:
 251 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 252 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 253 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 254 //
 255 svuint32_t test_svrevd_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) MODE_ATTR {
 256   return SVE_ACLE_FUNC(svrevd, _u32, _m, )(inactive, pg, op);
 257 }
 258
 259 // CHECK-LABEL: @test_svrevd_u64_m(
 260 // CHECK-NEXT:  entry:
 261 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 262 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 263 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 264 //
 265 // CPP-CHECK-LABEL: @_Z17test_svrevd_u64_mu12__SVUint64_tu10__SVBool_tS_(
 266 // CPP-CHECK-NEXT:  entry:
 267 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 268 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 269 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 270 //
 271 svuint64_t test_svrevd_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) MODE_ATTR {
 272   return SVE_ACLE_FUNC(svrevd, _u64, _m, )(inactive, pg, op);
 273 }
 274
 275 // CHECK-LABEL: @test_svrevd_s8_x(
 276 // CHECK-NEXT:  entry:
 277 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 278 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 279 //
 280 // CPP-CHECK-LABEL: @_Z16test_svrevd_s8_xu10__SVBool_tu10__SVInt8_t(
 281 // CPP-CHECK-NEXT:  entry:
 282 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 283 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 284 //
 285 svint8_t test_svrevd_s8_x(svbool_t pg, svint8_t op) MODE_ATTR {
 286   return SVE_ACLE_FUNC(svrevd, _s8, _x, )(pg, op);
 287 }
 288
 289 // CHECK-LABEL: @test_svrevd_s16_x(
 290 // CHECK-NEXT:  entry:
 291 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 292 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 293 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 294 //
 295 // CPP-CHECK-LABEL: @_Z17test_svrevd_s16_xu10__SVBool_tu11__SVInt16_t(
 296 // CPP-CHECK-NEXT:  entry:
 297 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 298 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 299 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 300 //
 301 svint16_t test_svrevd_s16_x(svbool_t pg, svint16_t op) MODE_ATTR {
 302   return SVE_ACLE_FUNC(svrevd, _s16, _x, )(pg, op);
 303 }
 304
 305 // CHECK-LABEL: @test_svrevd_s32_x(
 306 // CHECK-NEXT:  entry:
 307 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 308 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 309 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 310 //
 311 // CPP-CHECK-LABEL: @_Z17test_svrevd_s32_xu10__SVBool_tu11__SVInt32_t(
 312 // CPP-CHECK-NEXT:  entry:
 313 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 314 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 315 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 316 //
 317 svint32_t test_svrevd_s32_x(svbool_t pg, svint32_t op) MODE_ATTR {
 318   return SVE_ACLE_FUNC(svrevd, _s32, _x, )(pg, op);
 319 }
 320
 321 // CHECK-LABEL: @test_svrevd_s64_x(
 322 // CHECK-NEXT:  entry:
 323 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 324 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 325 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 326 //
 327 // CPP-CHECK-LABEL: @_Z17test_svrevd_s64_xu10__SVBool_tu11__SVInt64_t(
 328 // CPP-CHECK-NEXT:  entry:
 329 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 330 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 331 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 332 //
 333 svint64_t test_svrevd_s64_x(svbool_t pg, svint64_t op) MODE_ATTR {
 334   return SVE_ACLE_FUNC(svrevd, _s64, _x, )(pg, op);
 335 }
 336
 337 // CHECK-LABEL: @test_svrevd_u8_x(
 338 // CHECK-NEXT:  entry:
 339 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 340 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 341 //
 342 // CPP-CHECK-LABEL: @_Z16test_svrevd_u8_xu10__SVBool_tu11__SVUint8_t(
 343 // CPP-CHECK-NEXT:  entry:
 344 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.revd.nxv16i8(<vscale x 16 x i8> undef, <vscale x 16 x i1> [[PG:%.*]], <vscale x 16 x i8> [[OP:%.*]])
 345 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
 346 //
 347 svuint8_t test_svrevd_u8_x(svbool_t pg, svuint8_t op) MODE_ATTR {
 348   return SVE_ACLE_FUNC(svrevd, _u8, _x, )(pg, op);
 349 }
 350
 351 // CHECK-LABEL: @test_svrevd_u16_x(
 352 // CHECK-NEXT:  entry:
 353 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 354 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 355 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 356 //
 357 // CPP-CHECK-LABEL: @_Z17test_svrevd_u16_xu10__SVBool_tu12__SVUint16_t(
 358 // CPP-CHECK-NEXT:  entry:
 359 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 360 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.revd.nxv8i16(<vscale x 8 x i16> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i16> [[OP:%.*]])
 361 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP1]]
 362 //
 363 svuint16_t test_svrevd_u16_x(svbool_t pg, svuint16_t op) MODE_ATTR {
 364   return SVE_ACLE_FUNC(svrevd, _u16, _x, )(pg, op);
 365 }
 366
 367 // CHECK-LABEL: @test_svrevd_u32_x(
 368 // CHECK-NEXT:  entry:
 369 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 370 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 371 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 372 //
 373 // CPP-CHECK-LABEL: @_Z17test_svrevd_u32_xu10__SVBool_tu12__SVUint32_t(
 374 // CPP-CHECK-NEXT:  entry:
 375 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 376 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.revd.nxv4i32(<vscale x 4 x i32> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i32> [[OP:%.*]])
 377 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP1]]
 378 //
 379 svuint32_t test_svrevd_u32_x(svbool_t pg, svuint32_t op) MODE_ATTR {
 380   return SVE_ACLE_FUNC(svrevd, _u32, _x, )(pg, op);
 381 }
 382
 383 // CHECK-LABEL: @test_svrevd_u64_x(
 384 // CHECK-NEXT:  entry:
 385 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 386 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 387 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 388 //
 389 // CPP-CHECK-LABEL: @_Z17test_svrevd_u64_xu10__SVBool_tu12__SVUint64_t(
 390 // CPP-CHECK-NEXT:  entry:
 391 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 392 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.revd.nxv2i64(<vscale x 2 x i64> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i64> [[OP:%.*]])
 393 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP1]]
 394 //
 395 svuint64_t test_svrevd_u64_x(svbool_t pg, svuint64_t op) MODE_ATTR {
 396   return SVE_ACLE_FUNC(svrevd, _u64, _x, )(pg, op);
 397 }
 398
 399
 400 // CHECK-LABEL: @test_svrevd_bf16_z(
 401 // CHECK-NEXT:  entry:
 402 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 403 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.revd.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x bfloat> [[OP:%.*]])
 404 // CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
 405 //
 406 // CPP-CHECK-LABEL: @_Z18test_svrevd_bf16_zu10__SVBool_tu14__SVBfloat16_t(
 407 // CPP-CHECK-NEXT:  entry:
 408 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 409 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.revd.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x bfloat> [[OP:%.*]])
 410 // CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
 411 //
 412 svbfloat16_t test_svrevd_bf16_z(svbool_t pg, svbfloat16_t op) MODE_ATTR {
 413   return SVE_ACLE_FUNC(svrevd, _bf16, _z, )(pg, op);
 414 }
 415
 416 // CHECK-LABEL: @test_svrevd_f16_z(
 417 // CHECK-NEXT:  entry:
 418 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 419 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.revd.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
 420 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 421 //
 422 // CPP-CHECK-LABEL: @_Z17test_svrevd_f16_zu10__SVBool_tu13__SVFloat16_t(
 423 // CPP-CHECK-NEXT:  entry:
 424 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 425 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.revd.nxv8f16(<vscale x 8 x half> zeroinitializer, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
 426 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 427 //
 428 svfloat16_t test_svrevd_f16_z(svbool_t pg, svfloat16_t op) MODE_ATTR {
 429   return SVE_ACLE_FUNC(svrevd, _f16, _z, )(pg, op);
 430 }
 431
 432 // CHECK-LABEL: @test_svrevd_f32_z(
 433 // CHECK-NEXT:  entry:
 434 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 435 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.revd.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
 436 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 437 //
 438 // CPP-CHECK-LABEL: @_Z17test_svrevd_f32_zu10__SVBool_tu13__SVFloat32_t(
 439 // CPP-CHECK-NEXT:  entry:
 440 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 441 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.revd.nxv4f32(<vscale x 4 x float> zeroinitializer, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
 442 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 443 //
 444 svfloat32_t test_svrevd_f32_z(svbool_t pg, svfloat32_t op) MODE_ATTR {
 445   return SVE_ACLE_FUNC(svrevd, _f32, _z, )(pg, op);
 446 }
 447
 448 // CHECK-LABEL: @test_svrevd_f64_z(
 449 // CHECK-NEXT:  entry:
 450 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 451 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.revd.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
 452 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 453 //
 454 // CPP-CHECK-LABEL: @_Z17test_svrevd_f64_zu10__SVBool_tu13__SVFloat64_t(
 455 // CPP-CHECK-NEXT:  entry:
 456 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 457 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.revd.nxv2f64(<vscale x 2 x double> zeroinitializer, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
 458 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 459 //
 460 svfloat64_t test_svrevd_f64_z(svbool_t pg, svfloat64_t op) MODE_ATTR {
 461   return SVE_ACLE_FUNC(svrevd, _f64, _z, )(pg, op);
 462 }
 463
 464 // CHECK-LABEL: @test_svrevd_bf16_m(
 465 // CHECK-NEXT:  entry:
 466 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 467 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.revd.nxv8bf16(<vscale x 8 x bfloat> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x bfloat> [[OP:%.*]])
 468 // CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
 469 //
 470 // CPP-CHECK-LABEL: @_Z18test_svrevd_bf16_mu14__SVBfloat16_tu10__SVBool_tS_(
 471 // CPP-CHECK-NEXT:  entry:
 472 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 473 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.revd.nxv8bf16(<vscale x 8 x bfloat> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x bfloat> [[OP:%.*]])
 474 // CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
 475 //
 476 svbfloat16_t test_svrevd_bf16_m(svbfloat16_t inactive, svbool_t pg, svbfloat16_t op) MODE_ATTR {
 477   return SVE_ACLE_FUNC(svrevd, _bf16, _m, )(inactive, pg, op);
 478 }
 479
 480 // CHECK-LABEL: @test_svrevd_f16_m(
 481 // CHECK-NEXT:  entry:
 482 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 483 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.revd.nxv8f16(<vscale x 8 x half> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
 484 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 485 //
 486 // CPP-CHECK-LABEL: @_Z17test_svrevd_f16_mu13__SVFloat16_tu10__SVBool_tS_(
 487 // CPP-CHECK-NEXT:  entry:
 488 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 489 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.revd.nxv8f16(<vscale x 8 x half> [[INACTIVE:%.*]], <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
 490 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 491 //
 492 svfloat16_t test_svrevd_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) MODE_ATTR {
 493   return SVE_ACLE_FUNC(svrevd, _f16, _m, )(inactive, pg, op);
 494 }
 495
 496 // CHECK-LABEL: @test_svrevd_f32_m(
 497 // CHECK-NEXT:  entry:
 498 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 499 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.revd.nxv4f32(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
 500 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 501 //
 502 // CPP-CHECK-LABEL: @_Z17test_svrevd_f32_mu13__SVFloat32_tu10__SVBool_tS_(
 503 // CPP-CHECK-NEXT:  entry:
 504 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 505 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.revd.nxv4f32(<vscale x 4 x float> [[INACTIVE:%.*]], <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
 506 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 507 //
 508 svfloat32_t test_svrevd_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) MODE_ATTR {
 509   return SVE_ACLE_FUNC(svrevd, _f32, _m, )(inactive, pg, op);
 510 }
 511
 512 // CHECK-LABEL: @test_svrevd_f64_m(
 513 // CHECK-NEXT:  entry:
 514 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 515 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.revd.nxv2f64(<vscale x 2 x double> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
 516 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 517 //
 518 // CPP-CHECK-LABEL: @_Z17test_svrevd_f64_mu13__SVFloat64_tu10__SVBool_tS_(
 519 // CPP-CHECK-NEXT:  entry:
 520 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 521 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.revd.nxv2f64(<vscale x 2 x double> [[INACTIVE:%.*]], <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
 522 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 523 //
 524 svfloat64_t test_svrevd_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) MODE_ATTR {
 525   return SVE_ACLE_FUNC(svrevd, _f64, _m, )(inactive, pg, op);
 526 }
 527
 528 // CHECK-LABEL: @test_svrevd_bf16_x(
 529 // CHECK-NEXT:  entry:
 530 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 531 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.revd.nxv8bf16(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x bfloat> [[OP:%.*]])
 532 // CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
 533 //
 534 // CPP-CHECK-LABEL: @_Z18test_svrevd_bf16_xu10__SVBool_tu14__SVBfloat16_t(
 535 // CPP-CHECK-NEXT:  entry:
 536 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 537 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.revd.nxv8bf16(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x bfloat> [[OP:%.*]])
 538 // CPP-CHECK-NEXT:    ret <vscale x 8 x bfloat> [[TMP1]]
 539 //
 540 svbfloat16_t test_svrevd_bf16_x(svbool_t pg, svbfloat16_t op) MODE_ATTR {
 541   return SVE_ACLE_FUNC(svrevd, _bf16, _x, )(pg, op);
 542 }
 543
 544 // CHECK-LABEL: @test_svrevd_f16_x(
 545 // CHECK-NEXT:  entry:
 546 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 547 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.revd.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
 548 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 549 //
 550 // CPP-CHECK-LABEL: @_Z17test_svrevd_f16_xu10__SVBool_tu13__SVFloat16_t(
 551 // CPP-CHECK-NEXT:  entry:
 552 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PG:%.*]])
 553 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.revd.nxv8f16(<vscale x 8 x half> undef, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x half> [[OP:%.*]])
 554 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP1]]
 555 //
 556 svfloat16_t test_svrevd_f16_x(svbool_t pg, svfloat16_t op) MODE_ATTR {
 557   return SVE_ACLE_FUNC(svrevd, _f16, _x, )(pg, op);
 558 }
 559
 560 // CHECK-LABEL: @test_svrevd_f32_x(
 561 // CHECK-NEXT:  entry:
 562 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 563 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.revd.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
 564 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 565 //
 566 // CPP-CHECK-LABEL: @_Z17test_svrevd_f32_xu10__SVBool_tu13__SVFloat32_t(
 567 // CPP-CHECK-NEXT:  entry:
 568 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PG:%.*]])
 569 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.revd.nxv4f32(<vscale x 4 x float> undef, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x float> [[OP:%.*]])
 570 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP1]]
 571 //
 572 svfloat32_t test_svrevd_f32_x(svbool_t pg, svfloat32_t op) MODE_ATTR {
 573   return SVE_ACLE_FUNC(svrevd, _f32, _x, )(pg, op);
 574 }
 575
 576 // CHECK-LABEL: @test_svrevd_f64_x(
 577 // CHECK-NEXT:  entry:
 578 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 579 // CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.revd.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
 580 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 581 //
 582 // CPP-CHECK-LABEL: @_Z17test_svrevd_f64_xu10__SVBool_tu13__SVFloat64_t(
 583 // CPP-CHECK-NEXT:  entry:
 584 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]])
 585 // CPP-CHECK-NEXT:    [[TMP1:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.revd.nxv2f64(<vscale x 2 x double> undef, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x double> [[OP:%.*]])
 586 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP1]]
 587 //
 588 svfloat64_t test_svrevd_f64_x(svbool_t pg, svfloat64_t op) MODE_ATTR {
 589   return SVE_ACLE_FUNC(svrevd, _f64, _x, )(pg, op);
 590 }