clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_fclamp.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
   4 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
   5 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
   6 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
   7 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
   8 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   9 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
  10 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
  11 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
  12 // RUN:   -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
  13 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sve \
  14 // RUN:   -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
  15
  16 #include <arm_sve.h>
  17
  18 #ifdef __ARM_FEATURE_SME
  19 #define ATTR __arm_streaming
  20 #else
  21 #define ATTR
  22 #endif
  23
  24 #ifdef SVE_OVERLOADED_FORMS
  25 // A simple used,unused... macro, long enough to represent any SVE builtin.
  26 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
  27 #else
  28 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
  29 #endif
  30
  31 // CHECK-LABEL: @test_svclamp_f16(
  32 // CHECK-NEXT:  entry:
  33 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fclamp.nxv8f16(<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], <vscale x 8 x half> [[OP3:%.*]])
  34 // CHECK-NEXT:    ret <vscale x 8 x half> [[TMP0]]
  35 //
  36 // CPP-CHECK-LABEL: @_Z16test_svclamp_f16u13__SVFloat16_tS_S_(
  37 // CPP-CHECK-NEXT:  entry:
  38 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.fclamp.nxv8f16(<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x half> [[OP2:%.*]], <vscale x 8 x half> [[OP3:%.*]])
  39 // CPP-CHECK-NEXT:    ret <vscale x 8 x half> [[TMP0]]
  40 //
  41 svfloat16_t test_svclamp_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) ATTR {
  42   return SVE_ACLE_FUNC(svclamp, _f16, , )(op1, op2, op3);
  43 }
  44
  45 // CHECK-LABEL: @test_svclamp_f32(
  46 // CHECK-NEXT:  entry:
  47 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fclamp.nxv4f32(<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]], <vscale x 4 x float> [[OP3:%.*]])
  48 // CHECK-NEXT:    ret <vscale x 4 x float> [[TMP0]]
  49 //
  50 // CPP-CHECK-LABEL: @_Z16test_svclamp_f32u13__SVFloat32_tS_S_(
  51 // CPP-CHECK-NEXT:  entry:
  52 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.fclamp.nxv4f32(<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x float> [[OP2:%.*]], <vscale x 4 x float> [[OP3:%.*]])
  53 // CPP-CHECK-NEXT:    ret <vscale x 4 x float> [[TMP0]]
  54 //
  55 svfloat32_t test_svclamp_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) ATTR {
  56   return SVE_ACLE_FUNC(svclamp, _f32, , )(op1, op2, op3);
  57 }
  58
  59 // CHECK-LABEL: @test_svclamp_f64(
  60 // CHECK-NEXT:  entry:
  61 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fclamp.nxv2f64(<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]], <vscale x 2 x double> [[OP3:%.*]])
  62 // CHECK-NEXT:    ret <vscale x 2 x double> [[TMP0]]
  63 //
  64 // CPP-CHECK-LABEL: @_Z16test_svclamp_f64u13__SVFloat64_tS_S_(
  65 // CPP-CHECK-NEXT:  entry:
  66 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.fclamp.nxv2f64(<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x double> [[OP2:%.*]], <vscale x 2 x double> [[OP3:%.*]])
  67 // CPP-CHECK-NEXT:    ret <vscale x 2 x double> [[TMP0]]
  68 //
  69 svfloat64_t test_svclamp_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) ATTR {
  70   return SVE_ACLE_FUNC(svclamp, _f64, , )(op1, op2, op3);
  71 }
  72