clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_sclamp.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: aarch64-registered-target
   3 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
   4 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
   5 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
   6 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
   7 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
   8 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
   9 // RUN: %clang_cc1 -fclang-abi-compat=latest -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
  10 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
  11 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +sve2 -target-feature +sve2p1 \
  12 // RUN:   -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
  13 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 \
  14 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
  15 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 \
  16 // RUN:   -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
  17 // RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 \
  18 // RUN:   -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
  19
  20 #include <arm_sve.h>
  21
  22 #ifdef __ARM_FEATURE_SME
  23 #define ATTR __arm_streaming
  24 #else
  25 #define ATTR
  26 #endif
  27
  28 #ifdef SVE_OVERLOADED_FORMS
  29 // A simple used,unused... macro, long enough to represent any SVE builtin.
  30 #define SVE_ACLE_FUNC(A1, A2_UNUSED, A3, A4_UNUSED) A1##A3
  31 #else
  32 #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
  33 #endif
  34
  35 // CHECK-LABEL: @test_svclamp_s8(
  36 // CHECK-NEXT:  entry:
  37 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sclamp.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])
  38 // CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  39 //
  40 // CPP-CHECK-LABEL: @_Z15test_svclamp_s8u10__SVInt8_tS_S_(
  41 // CPP-CHECK-NEXT:  entry:
  42 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.sclamp.nxv16i8(<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[OP2:%.*]], <vscale x 16 x i8> [[OP3:%.*]])
  43 // CPP-CHECK-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
  44 //
  45 svint8_t test_svclamp_s8(svint8_t op1, svint8_t op2, svint8_t op3) ATTR  {
  46   return SVE_ACLE_FUNC(svclamp, _s8, , )(op1, op2, op3);
  47 }
  48
  49 // CHECK-LABEL: @test_svclamp_s16(
  50 // CHECK-NEXT:  entry:
  51 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sclamp.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])
  52 // CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
  53 //
  54 // CPP-CHECK-LABEL: @_Z16test_svclamp_s16u11__SVInt16_tS_S_(
  55 // CPP-CHECK-NEXT:  entry:
  56 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.sclamp.nxv8i16(<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[OP2:%.*]], <vscale x 8 x i16> [[OP3:%.*]])
  57 // CPP-CHECK-NEXT:    ret <vscale x 8 x i16> [[TMP0]]
  58 //
  59 svint16_t test_svclamp_s16(svint16_t op1, svint16_t op2, svint16_t op3) ATTR  {
  60   return SVE_ACLE_FUNC(svclamp, _s16, , )(op1, op2, op3);
  61 }
  62
  63 // CHECK-LABEL: @test_svclamp_s32(
  64 // CHECK-NEXT:  entry:
  65 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sclamp.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])
  66 // CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
  67 //
  68 // CPP-CHECK-LABEL: @_Z16test_svclamp_s32u11__SVInt32_tS_S_(
  69 // CPP-CHECK-NEXT:  entry:
  70 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sclamp.nxv4i32(<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[OP2:%.*]], <vscale x 4 x i32> [[OP3:%.*]])
  71 // CPP-CHECK-NEXT:    ret <vscale x 4 x i32> [[TMP0]]
  72 //
  73 svint32_t test_svclamp_s32(svint32_t op1, svint32_t op2, svint32_t op3) ATTR  {
  74   return SVE_ACLE_FUNC(svclamp, _s32, , )(op1, op2, op3);
  75 }
  76
  77 // CHECK-LABEL: @test_svclamp_s64(
  78 // CHECK-NEXT:  entry:
  79 // CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sclamp.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])
  80 // CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
  81 //
  82 // CPP-CHECK-LABEL: @_Z16test_svclamp_s64u11__SVInt64_tS_S_(
  83 // CPP-CHECK-NEXT:  entry:
  84 // CPP-CHECK-NEXT:    [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.sclamp.nxv2i64(<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[OP2:%.*]], <vscale x 2 x i64> [[OP3:%.*]])
  85 // CPP-CHECK-NEXT:    ret <vscale x 2 x i64> [[TMP0]]
  86 //
  87 svint64_t test_svclamp_s64(svint64_t op1, svint64_t op2, svint64_t op3) ATTR  {
  88   return SVE_ACLE_FUNC(svclamp, _s64, , )(op1, op2, op3);
  89 }
  90