[Clang/AMDGPU] Zero sized arrays not allowed in HIP device code. (#113470)
[llvm-project.git] / clang / test / CodeGen / LoongArch / attributes.cpp
blobfb700ad305012be848c1354d8ca3765c11dc3c6f
1 // RUN: %clang_cc1 -emit-llvm -triple loongarch64 %s -o - | FileCheck %s
3 // CHECK: @_ZL2v1 ={{.*}} global i32 0, code_model "small"
4 static int v1 __attribute__((model("normal")));
6 void use1() {
7 v1 = 1;
10 // CHECK: @v2 ={{.*}} global i32 0, code_model "medium"
11 int v2 __attribute__((model("medium")));
13 // CHECK: @v3 ={{.*}} global float 0.000000e+00, code_model "large"
14 float v3 __attribute__((model("extreme")));
16 // CHECK: @_ZL2v4IiE ={{.*}} global i32 0, code_model "medium"
17 template <typename T>
18 static T v4 __attribute__((model("medium")));
20 void use2() {
21 v4<int> = 1;
24 struct S {
25 double d;
28 // CHECK: @v5 ={{.*}} global {{.*}}, code_model "medium"
29 S v5 __attribute__((model("medium")));
31 typedef void (*F)();
33 // CHECK: @v6 ={{.*}} global ptr null, code_model "large"
34 F v6 __attribute__((model("extreme")));