clang/test/CodeGen/PowerPC/builtins-bcd-assist.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
   2 // REQUIRES: powerpc-registered-target
   3 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux -O2 -target-cpu pwr7 \
   4 // RUN:   -emit-llvm %s -o - | FileCheck %s
   5 // RUN: %clang_cc1 -triple powerpc64-unknown-aix -O2 -target-cpu pwr7 \
   6 // RUN:   -emit-llvm %s -o - | FileCheck %s
   7 // RUN: %clang_cc1 -triple powerpc-unknown-aix -O2 -target-cpu pwr7 \
   8 // RUN:   -emit-llvm %s -o - | FileCheck %s
   9
  10 // CHECK-LABEL: define{{.*}} i64 @cdtbcd_test(i64
  11 // CHECK:         [[CONV:%.*]] = trunc i64 {{.*}} to i32
  12 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.ppc.cdtbcd(i32 [[CONV]])
  13 // CHECK-NEXT:    [[CONV1:%.*]] = zext i32 [[TMP0]] to i64
  14 // CHECK-NEXT:    ret i64 [[CONV1]]
  15 long long cdtbcd_test(long long ll) {
  16     return __builtin_cdtbcd (ll);
  17 }
  18
  19 // CHECK-LABEL: define{{.*}} i32 @cdtbcd_test_ui(i32
  20 // CHECK:         [[TMP0:%.*]] = tail call i32 @llvm.ppc.cdtbcd(i32
  21 // CHECK-NEXT:    ret i32 [[TMP0]]
  22 unsigned int cdtbcd_test_ui(unsigned int ui) {
  23     return __builtin_cdtbcd (ui);
  24 }
  25
  26 // CHECK-LABEL: define{{.*}} i64 @cbcdtd_test(i64
  27 // CHECK:         [[CONV:%.*]] = trunc i64 {{.*}} to i32
  28 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.ppc.cbcdtd(i32 [[CONV]])
  29 // CHECK-NEXT:    [[CONV1:%.*]] = zext i32 [[TMP0]] to i64
  30 // CHECK-NEXT:    ret i64 [[CONV1]]
  31 long long cbcdtd_test(long long ll) {
  32     return __builtin_cbcdtd (ll);
  33 }
  34
  35 // CHECK-LABEL: define{{.*}} i32 @cbcdtd_test_ui(i32
  36 // CHECK:         [[TMP0:%.*]] = tail call i32 @llvm.ppc.cbcdtd(i32
  37 // CHECK-NEXT:    ret i32 [[TMP0]]
  38 unsigned int cbcdtd_test_ui(unsigned int ui) {
  39     return __builtin_cbcdtd (ui);
  40 }
  41
  42 // CHECK-LABEL: define{{.*}}  i64 @addg6s_test(i64
  43 // CHECK:         [[CONV:%.*]] = trunc i64 {{.*}} to i32
  44 // CHECK-NEXT:    [[CONV1:%.*]] = trunc i64 {{.*}} to i32
  45 // CHECK-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.ppc.addg6s(i32 [[CONV]], i32 [[CONV1]])
  46 // CHECK-NEXT:    [[CONV2:%.*]] = zext i32 [[TMP0]] to i64
  47 // CHECK-NEXT:    ret i64 [[CONV2]]
  48 //
  49 long long addg6s_test(long long ll, long long ll2) {
  50     return __builtin_addg6s (ll, ll2);
  51 }
  52
  53 // CHECK-LABEL: define{{.*}} i32 @addg6s_test_ui(i32
  54 // CHECK:         [[TMP0:%.*]] = tail call i32 @llvm.ppc.addg6s(i32 {{.*}}, i32
  55 // CHECK-NEXT:    ret i32 [[TMP0]]
  56 unsigned int addg6s_test_ui(unsigned int ui, unsigned int ui2) {
  57     return __builtin_addg6s (ui, ui2);
  58 }