clang/test/CodeGen/PowerPC/builtins-ppc-bcd-assist.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
   2 // REQUIRES: powerpc-registered-target
   3 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux -O2 -target-cpu pwr7 \
   4 // RUN:   -emit-llvm %s -o - | FileCheck %s
   5 // RUN: %clang_cc1 -triple powerpc64-unknown-aix -O2 -target-cpu pwr7 \
   6 // RUN:   -emit-llvm %s -o - | FileCheck %s
   7 // RUN: not %clang_cc1 -triple powerpc-unknown-aix -O2 -target-cpu pwr7 \
   8 // RUN:   -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=CHECK-32-ERROR
   9
  10 // CHECK-LABEL: define{{.*}} i64 @cdtbcd_test(i64
  11 // CHECK-NEXT:  [[ENTRY:.*:]]
  12 // CHECK-NEXT:  [[TMP0:%.*]] = tail call i64  @llvm.ppc.cdtbcdd(i64
  13 // CHECK-NEXT:  ret i64 [[TMP0]]
  14 // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
  15 // CHECK-32-ERROR: #define __cdtbcd __builtin_ppc_cdtbcd
  16 long long cdtbcd_test(long long ll) {
  17     return __cdtbcd (ll);
  18 }
  19
  20 // CHECK-LABEL: define{{.*}} i32 @cdtbcd_test_ui(i32
  21 // CHECK-NEXT:  [[ENTRY:.*:]]
  22 // CHECK-NEXT:  [[CONV:%.*]] = zext i32 {{.*}} to i64
  23 // CHECK-NEXT:  [[TMP0:%.*]] = tail call i64 @llvm.ppc.cdtbcdd(i64 [[CONV]])
  24 // CHECK-NEXT:  [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
  25 // CHECK-NEXT:  ret i32 [[CONV1]]
  26 // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
  27 // CHECK-32-ERROR: #define __cdtbcd __builtin_ppc_cdtbcd
  28 unsigned int cdtbcd_test_ui(unsigned int ui) {
  29     return __cdtbcd (ui);
  30 }
  31
  32 // CHECK-LABEL: define{{.*}} i64 @cbcdtd_test(i64
  33 // CHECK-NEXT:  [[ENTRY:.*:]]
  34 // CHECK-NEXT:  [[TMP0:%.*]] = tail call i64 @llvm.ppc.cbcdtdd(i64
  35 // CHECK-NEXT:  ret i64 [[TMP0]]
  36 // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
  37 // CHECK-32-ERROR: #define __cbcdtd __builtin_ppc_cbcdtd
  38 long long cbcdtd_test(long long ll) {
  39     return __cbcdtd (ll);
  40 }
  41
  42 // CHECK-LABEL: define{{.*}} i32 @cbcdtd_test_ui(i32
  43 // CHECK-NEXT:  [[ENTRY:.*:]]
  44 // CHECK-NEXT:  [[CONV:%.*]] = zext i32 {{.*}} to i64
  45 // CHECK-NEXT:  [[TMP0:%.*]] = tail call i64 @llvm.ppc.cbcdtdd(i64 [[CONV]])
  46 // CHECK-NEXT:  [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
  47 // CHECK-NEXT:  ret i32 [[CONV1]]
  48 // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
  49 // CHECK-32-ERROR: #define __cbcdtd __builtin_ppc_cbcdtd
  50 unsigned int cbcdtd_test_ui(unsigned int ui) {
  51     return __cbcdtd (ui);
  52 }
  53
  54 // CHECK-LABEL: define{{.*}} i64 @addg6s_test(i64
  55 // CHECK-NEXT:  [[ENTRY:.*:]]
  56 // CHECK-NEXT:  [[TMP0:%.*]] = tail call i64 @llvm.ppc.addg6sd(i64 {{.*}}, i64 {{.*}})
  57 // CHECK-NEXT:  ret i64 [[TMP0]]
  58 // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
  59 // CHECK-32-ERROR: #define __addg6s __builtin_ppc_addg6s
  60 long long addg6s_test(long long ll, long long ll2) {
  61     return __addg6s (ll, ll2);
  62 }
  63
  64 // CHECK-LABEL: define{{.*}} i32 @addg6s_test_ui(i32
  65 // CHECK-NEXT:  [[ENTRY:.*:]]
  66 // CHECK-NEXT:  [[CONV:%.*]] = zext i32 {{.*}} to i64
  67 // CHECK-NEXT:  [[CONV1:%.*]] = zext i32 {{.*}} to i64
  68 // CHECK-NEXT:  [[TMP0:%.*]] = tail call i64 @llvm.ppc.addg6sd(i64 {{.*}}, i64
  69 // CHECK-NEXT:  [[CONV2:%.*]] = trunc i64 [[TMP0]] to i32
  70 // CHECK-NEXT:  ret i32 [[CONV2]]
  71 // CHECK-32-ERROR: error: this builtin is only available on 64-bit targets
  72 // CHECK-32-ERROR: #define __addg6s __builtin_ppc_addg6s
  73 unsigned int addg6s_test_ui(unsigned int ui, unsigned int ui2) {
  74     return __addg6s (ui, ui2);
  75 }