clang/test/CodeGen/RISCV/riscv-metadata-arch.c

   1 // RUN: %clang_cc1 -triple riscv32 -emit-llvm -o - %s \
   2 // RUN:   | FileCheck -check-prefix=RV32I %s
   3 // RUN: %clang_cc1 -triple riscv32 -target-feature +v -emit-llvm -o - %s \
   4 // RUN:   | FileCheck -check-prefix=RV32IV %s
   5 // RUN: %clang_cc1 -triple riscv64 -emit-llvm -o - %s \
   6 // RUN:   | FileCheck -check-prefix=RV64I %s
   7 // RUN: %clang_cc1 -triple riscv64 -target-feature +v -emit-llvm -o - %s \
   8 // RUN:   | FileCheck -check-prefix=RV64IV %s
   9
  10 // RV32I:!{{[0-9]+}} = !{i32 6, !"riscv-isa", ![[ID:[0-9]+]]}
  11 // RV32I:![[ID]] = !{!"rv32i2p1"}
  12
  13 // RV32IV:!{{[0-9]+}} = !{i32 6, !"riscv-isa", ![[ID:[0-9]+]]}
  14 // RV32IV:![[ID]] = !{!"rv32i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"}
  15
  16 // RV64I:!{{[0-9]+}} = !{i32 6, !"riscv-isa", ![[ID:[0-9]+]]}
  17 // RV64I:![[ID]] = !{!"rv64i2p1"}
  18
  19 // RV64IV:!{{[0-9]+}} = !{i32 6, !"riscv-isa", ![[ID:[0-9]+]]}
  20 // RV64IV:![[ID]] = !{!"rv64i2p1_f2p2_d2p2_v1p0_zicsr2p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0"}