1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
2 // REQUIRES: riscv-registered-target
3 // RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4 // RUN: -target-feature +zvfbfmin \
5 // RUN: -target-feature +zvfbfwma -disable-O0-optnone \
6 // RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
7 // RUN: FileCheck --check-prefix=CHECK-RV64 %s
9 #include <riscv_vector.h>
11 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vlse16_v_bf16mf4(
12 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
13 // CHECK-RV64-NEXT: entry:
14 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vlse.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], i64 [[VL]])
15 // CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
17 vbfloat16mf4_t
test_vlse16_v_bf16mf4(const __bf16
*rs1
, ptrdiff_t rs2
,
19 return __riscv_vlse16_v_bf16mf4(rs1
, rs2
, vl
);
22 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vlse16_v_bf16mf2(
23 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
24 // CHECK-RV64-NEXT: entry:
25 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vlse.nxv2bf16.i64(<vscale x 2 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], i64 [[VL]])
26 // CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
28 vbfloat16mf2_t
test_vlse16_v_bf16mf2(const __bf16
*rs1
, ptrdiff_t rs2
,
30 return __riscv_vlse16_v_bf16mf2(rs1
, rs2
, vl
);
33 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vlse16_v_bf16m1(
34 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
35 // CHECK-RV64-NEXT: entry:
36 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vlse.nxv4bf16.i64(<vscale x 4 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], i64 [[VL]])
37 // CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
39 vbfloat16m1_t
test_vlse16_v_bf16m1(const __bf16
*rs1
, ptrdiff_t rs2
,
41 return __riscv_vlse16_v_bf16m1(rs1
, rs2
, vl
);
44 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vlse16_v_bf16m2(
45 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
46 // CHECK-RV64-NEXT: entry:
47 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vlse.nxv8bf16.i64(<vscale x 8 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], i64 [[VL]])
48 // CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
50 vbfloat16m2_t
test_vlse16_v_bf16m2(const __bf16
*rs1
, ptrdiff_t rs2
,
52 return __riscv_vlse16_v_bf16m2(rs1
, rs2
, vl
);
55 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vlse16_v_bf16m4(
56 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
57 // CHECK-RV64-NEXT: entry:
58 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vlse.nxv16bf16.i64(<vscale x 16 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], i64 [[VL]])
59 // CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
61 vbfloat16m4_t
test_vlse16_v_bf16m4(const __bf16
*rs1
, ptrdiff_t rs2
,
63 return __riscv_vlse16_v_bf16m4(rs1
, rs2
, vl
);
66 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vlse16_v_bf16m8(
67 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
68 // CHECK-RV64-NEXT: entry:
69 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vlse.nxv32bf16.i64(<vscale x 32 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], i64 [[VL]])
70 // CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
72 vbfloat16m8_t
test_vlse16_v_bf16m8(const __bf16
*rs1
, ptrdiff_t rs2
,
74 return __riscv_vlse16_v_bf16m8(rs1
, rs2
, vl
);
77 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vlse16_v_bf16mf4_m(
78 // CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
79 // CHECK-RV64-NEXT: entry:
80 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vlse.mask.nxv1bf16.i64(<vscale x 1 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 3)
81 // CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
83 vbfloat16mf4_t
test_vlse16_v_bf16mf4_m(vbool64_t vm
, const __bf16
*rs1
,
84 ptrdiff_t rs2
, size_t vl
) {
85 return __riscv_vlse16_v_bf16mf4_m(vm
, rs1
, rs2
, vl
);
88 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vlse16_v_bf16mf2_m(
89 // CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
90 // CHECK-RV64-NEXT: entry:
91 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vlse.mask.nxv2bf16.i64(<vscale x 2 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 3)
92 // CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
94 vbfloat16mf2_t
test_vlse16_v_bf16mf2_m(vbool32_t vm
, const __bf16
*rs1
,
95 ptrdiff_t rs2
, size_t vl
) {
96 return __riscv_vlse16_v_bf16mf2_m(vm
, rs1
, rs2
, vl
);
99 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vlse16_v_bf16m1_m(
100 // CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
101 // CHECK-RV64-NEXT: entry:
102 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vlse.mask.nxv4bf16.i64(<vscale x 4 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 3)
103 // CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
105 vbfloat16m1_t
test_vlse16_v_bf16m1_m(vbool16_t vm
, const __bf16
*rs1
,
106 ptrdiff_t rs2
, size_t vl
) {
107 return __riscv_vlse16_v_bf16m1_m(vm
, rs1
, rs2
, vl
);
110 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vlse16_v_bf16m2_m(
111 // CHECK-RV64-SAME: <vscale x 8 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
112 // CHECK-RV64-NEXT: entry:
113 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vlse.mask.nxv8bf16.i64(<vscale x 8 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], <vscale x 8 x i1> [[VM]], i64 [[VL]], i64 3)
114 // CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
116 vbfloat16m2_t
test_vlse16_v_bf16m2_m(vbool8_t vm
, const __bf16
*rs1
,
117 ptrdiff_t rs2
, size_t vl
) {
118 return __riscv_vlse16_v_bf16m2_m(vm
, rs1
, rs2
, vl
);
121 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vlse16_v_bf16m4_m(
122 // CHECK-RV64-SAME: <vscale x 16 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
123 // CHECK-RV64-NEXT: entry:
124 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vlse.mask.nxv16bf16.i64(<vscale x 16 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], <vscale x 16 x i1> [[VM]], i64 [[VL]], i64 3)
125 // CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
127 vbfloat16m4_t
test_vlse16_v_bf16m4_m(vbool4_t vm
, const __bf16
*rs1
,
128 ptrdiff_t rs2
, size_t vl
) {
129 return __riscv_vlse16_v_bf16m4_m(vm
, rs1
, rs2
, vl
);
132 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vlse16_v_bf16m8_m(
133 // CHECK-RV64-SAME: <vscale x 32 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], i64 noundef [[RS2:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
134 // CHECK-RV64-NEXT: entry:
135 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vlse.mask.nxv32bf16.i64(<vscale x 32 x bfloat> poison, ptr [[RS1]], i64 [[RS2]], <vscale x 32 x i1> [[VM]], i64 [[VL]], i64 3)
136 // CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
138 vbfloat16m8_t
test_vlse16_v_bf16m8_m(vbool2_t vm
, const __bf16
*rs1
,
139 ptrdiff_t rs2
, size_t vl
) {
140 return __riscv_vlse16_v_bf16m8_m(vm
, rs1
, rs2
, vl
);