1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
2 // REQUIRES: riscv-registered-target
3 // RUN: %clang_cc1 -triple riscv64 -target-feature +v \
4 // RUN: -target-feature +zvfbfmin \
5 // RUN: -target-feature +zvfbfwma -disable-O0-optnone \
6 // RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
7 // RUN: FileCheck --check-prefix=CHECK-RV64 %s
9 #include <riscv_vector.h>
11 // CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vlseg5e16ff_v_bf16mf4x5(
12 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
13 // CHECK-RV64-NEXT: entry:
14 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { target("riscv.vector.tuple", <vscale x 2 x i8>, 5), i64 } @llvm.riscv.vlseg5ff.triscv.vector.tuple_nxv2i8_5t.i64(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr [[RS1]], i64 [[VL]], i64 4)
15 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 2 x i8>, 5), i64 } [[TMP0]], 0
16 // CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 2 x i8>, 5), i64 } [[TMP0]], 1
17 // CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
18 // CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[TMP1]]
20 vbfloat16mf4x5_t
test_vlseg5e16ff_v_bf16mf4x5(const __bf16
*rs1
, size_t *new_vl
,
22 return __riscv_vlseg5e16ff_v_bf16mf4x5(rs1
, new_vl
, vl
);
25 // CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vlseg5e16ff_v_bf16mf2x5(
26 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
27 // CHECK-RV64-NEXT: entry:
28 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { target("riscv.vector.tuple", <vscale x 4 x i8>, 5), i64 } @llvm.riscv.vlseg5ff.triscv.vector.tuple_nxv4i8_5t.i64(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr [[RS1]], i64 [[VL]], i64 4)
29 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 4 x i8>, 5), i64 } [[TMP0]], 0
30 // CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 4 x i8>, 5), i64 } [[TMP0]], 1
31 // CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
32 // CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP1]]
34 vbfloat16mf2x5_t
test_vlseg5e16ff_v_bf16mf2x5(const __bf16
*rs1
, size_t *new_vl
,
36 return __riscv_vlseg5e16ff_v_bf16mf2x5(rs1
, new_vl
, vl
);
39 // CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vlseg5e16ff_v_bf16m1x5(
40 // CHECK-RV64-SAME: ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
41 // CHECK-RV64-NEXT: entry:
42 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { target("riscv.vector.tuple", <vscale x 8 x i8>, 5), i64 } @llvm.riscv.vlseg5ff.triscv.vector.tuple_nxv8i8_5t.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[RS1]], i64 [[VL]], i64 4)
43 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 8 x i8>, 5), i64 } [[TMP0]], 0
44 // CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 8 x i8>, 5), i64 } [[TMP0]], 1
45 // CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
46 // CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]]
48 vbfloat16m1x5_t
test_vlseg5e16ff_v_bf16m1x5(const __bf16
*rs1
, size_t *new_vl
,
50 return __riscv_vlseg5e16ff_v_bf16m1x5(rs1
, new_vl
, vl
);
53 // CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 2 x i8>, 5) @test_vlseg5e16ff_v_bf16mf4x5_m(
54 // CHECK-RV64-SAME: <vscale x 1 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
55 // CHECK-RV64-NEXT: entry:
56 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { target("riscv.vector.tuple", <vscale x 2 x i8>, 5), i64 } @llvm.riscv.vlseg5ff.mask.triscv.vector.tuple_nxv2i8_5t.i64.nxv1i1(target("riscv.vector.tuple", <vscale x 2 x i8>, 5) poison, ptr [[RS1]], <vscale x 1 x i1> [[VM]], i64 [[VL]], i64 3, i64 4)
57 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 2 x i8>, 5), i64 } [[TMP0]], 0
58 // CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 2 x i8>, 5), i64 } [[TMP0]], 1
59 // CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
60 // CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 2 x i8>, 5) [[TMP1]]
62 vbfloat16mf4x5_t
test_vlseg5e16ff_v_bf16mf4x5_m(vbool64_t vm
, const __bf16
*rs1
,
63 size_t *new_vl
, size_t vl
) {
64 return __riscv_vlseg5e16ff_v_bf16mf4x5_m(vm
, rs1
, new_vl
, vl
);
67 // CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 4 x i8>, 5) @test_vlseg5e16ff_v_bf16mf2x5_m(
68 // CHECK-RV64-SAME: <vscale x 2 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
69 // CHECK-RV64-NEXT: entry:
70 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { target("riscv.vector.tuple", <vscale x 4 x i8>, 5), i64 } @llvm.riscv.vlseg5ff.mask.triscv.vector.tuple_nxv4i8_5t.i64.nxv2i1(target("riscv.vector.tuple", <vscale x 4 x i8>, 5) poison, ptr [[RS1]], <vscale x 2 x i1> [[VM]], i64 [[VL]], i64 3, i64 4)
71 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 4 x i8>, 5), i64 } [[TMP0]], 0
72 // CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 4 x i8>, 5), i64 } [[TMP0]], 1
73 // CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
74 // CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 4 x i8>, 5) [[TMP1]]
76 vbfloat16mf2x5_t
test_vlseg5e16ff_v_bf16mf2x5_m(vbool32_t vm
, const __bf16
*rs1
,
77 size_t *new_vl
, size_t vl
) {
78 return __riscv_vlseg5e16ff_v_bf16mf2x5_m(vm
, rs1
, new_vl
, vl
);
81 // CHECK-RV64-LABEL: define dso_local target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @test_vlseg5e16ff_v_bf16m1x5_m(
82 // CHECK-RV64-SAME: <vscale x 4 x i1> [[VM:%.*]], ptr noundef [[RS1:%.*]], ptr noundef [[NEW_VL:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
83 // CHECK-RV64-NEXT: entry:
84 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call { target("riscv.vector.tuple", <vscale x 8 x i8>, 5), i64 } @llvm.riscv.vlseg5ff.mask.triscv.vector.tuple_nxv8i8_5t.i64.nxv4i1(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[RS1]], <vscale x 4 x i1> [[VM]], i64 [[VL]], i64 3, i64 4)
85 // CHECK-RV64-NEXT: [[TMP1:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 8 x i8>, 5), i64 } [[TMP0]], 0
86 // CHECK-RV64-NEXT: [[TMP2:%.*]] = extractvalue { target("riscv.vector.tuple", <vscale x 8 x i8>, 5), i64 } [[TMP0]], 1
87 // CHECK-RV64-NEXT: store i64 [[TMP2]], ptr [[NEW_VL]], align 8
88 // CHECK-RV64-NEXT: ret target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]]
90 vbfloat16m1x5_t
test_vlseg5e16ff_v_bf16m1x5_m(vbool16_t vm
, const __bf16
*rs1
,
91 size_t *new_vl
, size_t vl
) {
92 return __riscv_vlseg5e16ff_v_bf16m1x5_m(vm
, rs1
, new_vl
, vl
);