clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsse8.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
   2 // REQUIRES: riscv-registered-target
   3 // RUN: %clang_cc1 -triple riscv64 -target-feature +v -disable-O0-optnone \
   4 // RUN:   -emit-llvm %s -o - | opt -S -passes=mem2reg | \
   5 // RUN:   FileCheck --check-prefix=CHECK-RV64 %s
   6
   7 #include <riscv_vector.h>
   8
   9 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8mf8
  10 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
  11 // CHECK-RV64-NEXT:  entry:
  12 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv1i8.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  13 // CHECK-RV64-NEXT:    ret void
  14 //
  15 void test_vsse8_v_i8mf8(int8_t *base, ptrdiff_t bstride, vint8mf8_t value, size_t vl) {
  16   return __riscv_vsse8_v_i8mf8(base, bstride, value, vl);
  17 }
  18
  19 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8mf4
  20 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
  21 // CHECK-RV64-NEXT:  entry:
  22 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv2i8.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  23 // CHECK-RV64-NEXT:    ret void
  24 //
  25 void test_vsse8_v_i8mf4(int8_t *base, ptrdiff_t bstride, vint8mf4_t value, size_t vl) {
  26   return __riscv_vsse8_v_i8mf4(base, bstride, value, vl);
  27 }
  28
  29 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8mf2
  30 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
  31 // CHECK-RV64-NEXT:  entry:
  32 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv4i8.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  33 // CHECK-RV64-NEXT:    ret void
  34 //
  35 void test_vsse8_v_i8mf2(int8_t *base, ptrdiff_t bstride, vint8mf2_t value, size_t vl) {
  36   return __riscv_vsse8_v_i8mf2(base, bstride, value, vl);
  37 }
  38
  39 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8m1
  40 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
  41 // CHECK-RV64-NEXT:  entry:
  42 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv8i8.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  43 // CHECK-RV64-NEXT:    ret void
  44 //
  45 void test_vsse8_v_i8m1(int8_t *base, ptrdiff_t bstride, vint8m1_t value, size_t vl) {
  46   return __riscv_vsse8_v_i8m1(base, bstride, value, vl);
  47 }
  48
  49 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8m2
  50 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
  51 // CHECK-RV64-NEXT:  entry:
  52 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv16i8.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  53 // CHECK-RV64-NEXT:    ret void
  54 //
  55 void test_vsse8_v_i8m2(int8_t *base, ptrdiff_t bstride, vint8m2_t value, size_t vl) {
  56   return __riscv_vsse8_v_i8m2(base, bstride, value, vl);
  57 }
  58
  59 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8m4
  60 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
  61 // CHECK-RV64-NEXT:  entry:
  62 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv32i8.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  63 // CHECK-RV64-NEXT:    ret void
  64 //
  65 void test_vsse8_v_i8m4(int8_t *base, ptrdiff_t bstride, vint8m4_t value, size_t vl) {
  66   return __riscv_vsse8_v_i8m4(base, bstride, value, vl);
  67 }
  68
  69 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8m8
  70 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
  71 // CHECK-RV64-NEXT:  entry:
  72 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv64i8.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  73 // CHECK-RV64-NEXT:    ret void
  74 //
  75 void test_vsse8_v_i8m8(int8_t *base, ptrdiff_t bstride, vint8m8_t value, size_t vl) {
  76   return __riscv_vsse8_v_i8m8(base, bstride, value, vl);
  77 }
  78
  79 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8mf8
  80 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
  81 // CHECK-RV64-NEXT:  entry:
  82 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv1i8.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  83 // CHECK-RV64-NEXT:    ret void
  84 //
  85 void test_vsse8_v_u8mf8(uint8_t *base, ptrdiff_t bstride, vuint8mf8_t value, size_t vl) {
  86   return __riscv_vsse8_v_u8mf8(base, bstride, value, vl);
  87 }
  88
  89 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8mf4
  90 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
  91 // CHECK-RV64-NEXT:  entry:
  92 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv2i8.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
  93 // CHECK-RV64-NEXT:    ret void
  94 //
  95 void test_vsse8_v_u8mf4(uint8_t *base, ptrdiff_t bstride, vuint8mf4_t value, size_t vl) {
  96   return __riscv_vsse8_v_u8mf4(base, bstride, value, vl);
  97 }
  98
  99 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8mf2
 100 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 101 // CHECK-RV64-NEXT:  entry:
 102 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv4i8.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
 103 // CHECK-RV64-NEXT:    ret void
 104 //
 105 void test_vsse8_v_u8mf2(uint8_t *base, ptrdiff_t bstride, vuint8mf2_t value, size_t vl) {
 106   return __riscv_vsse8_v_u8mf2(base, bstride, value, vl);
 107 }
 108
 109 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8m1
 110 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 111 // CHECK-RV64-NEXT:  entry:
 112 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv8i8.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
 113 // CHECK-RV64-NEXT:    ret void
 114 //
 115 void test_vsse8_v_u8m1(uint8_t *base, ptrdiff_t bstride, vuint8m1_t value, size_t vl) {
 116   return __riscv_vsse8_v_u8m1(base, bstride, value, vl);
 117 }
 118
 119 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8m2
 120 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 121 // CHECK-RV64-NEXT:  entry:
 122 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv16i8.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
 123 // CHECK-RV64-NEXT:    ret void
 124 //
 125 void test_vsse8_v_u8m2(uint8_t *base, ptrdiff_t bstride, vuint8m2_t value, size_t vl) {
 126   return __riscv_vsse8_v_u8m2(base, bstride, value, vl);
 127 }
 128
 129 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8m4
 130 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 131 // CHECK-RV64-NEXT:  entry:
 132 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv32i8.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
 133 // CHECK-RV64-NEXT:    ret void
 134 //
 135 void test_vsse8_v_u8m4(uint8_t *base, ptrdiff_t bstride, vuint8m4_t value, size_t vl) {
 136   return __riscv_vsse8_v_u8m4(base, bstride, value, vl);
 137 }
 138
 139 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8m8
 140 // CHECK-RV64-SAME: (ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 141 // CHECK-RV64-NEXT:  entry:
 142 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.nxv64i8.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], i64 [[VL]])
 143 // CHECK-RV64-NEXT:    ret void
 144 //
 145 void test_vsse8_v_u8m8(uint8_t *base, ptrdiff_t bstride, vuint8m8_t value, size_t vl) {
 146   return __riscv_vsse8_v_u8m8(base, bstride, value, vl);
 147 }
 148
 149 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8mf8_m
 150 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 151 // CHECK-RV64-NEXT:  entry:
 152 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv1i8.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])
 153 // CHECK-RV64-NEXT:    ret void
 154 //
 155 void test_vsse8_v_i8mf8_m(vbool64_t mask, int8_t *base, ptrdiff_t bstride, vint8mf8_t value, size_t vl) {
 156   return __riscv_vsse8_v_i8mf8_m(mask, base, bstride, value, vl);
 157 }
 158
 159 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8mf4_m
 160 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 161 // CHECK-RV64-NEXT:  entry:
 162 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv2i8.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])
 163 // CHECK-RV64-NEXT:    ret void
 164 //
 165 void test_vsse8_v_i8mf4_m(vbool32_t mask, int8_t *base, ptrdiff_t bstride, vint8mf4_t value, size_t vl) {
 166   return __riscv_vsse8_v_i8mf4_m(mask, base, bstride, value, vl);
 167 }
 168
 169 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8mf2_m
 170 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 171 // CHECK-RV64-NEXT:  entry:
 172 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv4i8.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])
 173 // CHECK-RV64-NEXT:    ret void
 174 //
 175 void test_vsse8_v_i8mf2_m(vbool16_t mask, int8_t *base, ptrdiff_t bstride, vint8mf2_t value, size_t vl) {
 176   return __riscv_vsse8_v_i8mf2_m(mask, base, bstride, value, vl);
 177 }
 178
 179 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8m1_m
 180 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 181 // CHECK-RV64-NEXT:  entry:
 182 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv8i8.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])
 183 // CHECK-RV64-NEXT:    ret void
 184 //
 185 void test_vsse8_v_i8m1_m(vbool8_t mask, int8_t *base, ptrdiff_t bstride, vint8m1_t value, size_t vl) {
 186   return __riscv_vsse8_v_i8m1_m(mask, base, bstride, value, vl);
 187 }
 188
 189 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8m2_m
 190 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 191 // CHECK-RV64-NEXT:  entry:
 192 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv16i8.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])
 193 // CHECK-RV64-NEXT:    ret void
 194 //
 195 void test_vsse8_v_i8m2_m(vbool4_t mask, int8_t *base, ptrdiff_t bstride, vint8m2_t value, size_t vl) {
 196   return __riscv_vsse8_v_i8m2_m(mask, base, bstride, value, vl);
 197 }
 198
 199 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8m4_m
 200 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 201 // CHECK-RV64-NEXT:  entry:
 202 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv32i8.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])
 203 // CHECK-RV64-NEXT:    ret void
 204 //
 205 void test_vsse8_v_i8m4_m(vbool2_t mask, int8_t *base, ptrdiff_t bstride, vint8m4_t value, size_t vl) {
 206   return __riscv_vsse8_v_i8m4_m(mask, base, bstride, value, vl);
 207 }
 208
 209 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_i8m8_m
 210 // CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 211 // CHECK-RV64-NEXT:  entry:
 212 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv64i8.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 64 x i1> [[MASK]], i64 [[VL]])
 213 // CHECK-RV64-NEXT:    ret void
 214 //
 215 void test_vsse8_v_i8m8_m(vbool1_t mask, int8_t *base, ptrdiff_t bstride, vint8m8_t value, size_t vl) {
 216   return __riscv_vsse8_v_i8m8_m(mask, base, bstride, value, vl);
 217 }
 218
 219 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8mf8_m
 220 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 1 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 221 // CHECK-RV64-NEXT:  entry:
 222 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv1i8.i64(<vscale x 1 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 1 x i1> [[MASK]], i64 [[VL]])
 223 // CHECK-RV64-NEXT:    ret void
 224 //
 225 void test_vsse8_v_u8mf8_m(vbool64_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf8_t value, size_t vl) {
 226   return __riscv_vsse8_v_u8mf8_m(mask, base, bstride, value, vl);
 227 }
 228
 229 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8mf4_m
 230 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 2 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 231 // CHECK-RV64-NEXT:  entry:
 232 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv2i8.i64(<vscale x 2 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 2 x i1> [[MASK]], i64 [[VL]])
 233 // CHECK-RV64-NEXT:    ret void
 234 //
 235 void test_vsse8_v_u8mf4_m(vbool32_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf4_t value, size_t vl) {
 236   return __riscv_vsse8_v_u8mf4_m(mask, base, bstride, value, vl);
 237 }
 238
 239 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8mf2_m
 240 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 4 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 241 // CHECK-RV64-NEXT:  entry:
 242 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv4i8.i64(<vscale x 4 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 4 x i1> [[MASK]], i64 [[VL]])
 243 // CHECK-RV64-NEXT:    ret void
 244 //
 245 void test_vsse8_v_u8mf2_m(vbool16_t mask, uint8_t *base, ptrdiff_t bstride, vuint8mf2_t value, size_t vl) {
 246   return __riscv_vsse8_v_u8mf2_m(mask, base, bstride, value, vl);
 247 }
 248
 249 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8m1_m
 250 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 8 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 251 // CHECK-RV64-NEXT:  entry:
 252 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv8i8.i64(<vscale x 8 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 8 x i1> [[MASK]], i64 [[VL]])
 253 // CHECK-RV64-NEXT:    ret void
 254 //
 255 void test_vsse8_v_u8m1_m(vbool8_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m1_t value, size_t vl) {
 256   return __riscv_vsse8_v_u8m1_m(mask, base, bstride, value, vl);
 257 }
 258
 259 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8m2_m
 260 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 16 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 261 // CHECK-RV64-NEXT:  entry:
 262 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv16i8.i64(<vscale x 16 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 16 x i1> [[MASK]], i64 [[VL]])
 263 // CHECK-RV64-NEXT:    ret void
 264 //
 265 void test_vsse8_v_u8m2_m(vbool4_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m2_t value, size_t vl) {
 266   return __riscv_vsse8_v_u8m2_m(mask, base, bstride, value, vl);
 267 }
 268
 269 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8m4_m
 270 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 32 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 271 // CHECK-RV64-NEXT:  entry:
 272 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv32i8.i64(<vscale x 32 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 32 x i1> [[MASK]], i64 [[VL]])
 273 // CHECK-RV64-NEXT:    ret void
 274 //
 275 void test_vsse8_v_u8m4_m(vbool2_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m4_t value, size_t vl) {
 276   return __riscv_vsse8_v_u8m4_m(mask, base, bstride, value, vl);
 277 }
 278
 279 // CHECK-RV64-LABEL: define dso_local void @test_vsse8_v_u8m8_m
 280 // CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], ptr noundef [[BASE:%.*]], i64 noundef [[BSTRIDE:%.*]], <vscale x 64 x i8> [[VALUE:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
 281 // CHECK-RV64-NEXT:  entry:
 282 // CHECK-RV64-NEXT:    call void @llvm.riscv.vsse.mask.nxv64i8.i64(<vscale x 64 x i8> [[VALUE]], ptr [[BASE]], i64 [[BSTRIDE]], <vscale x 64 x i1> [[MASK]], i64 [[VL]])
 283 // CHECK-RV64-NEXT:    ret void
 284 //
 285 void test_vsse8_v_u8m8_m(vbool1_t mask, uint8_t *base, ptrdiff_t bstride, vuint8m8_t value, size_t vl) {
 286   return __riscv_vsse8_v_u8m8_m(mask, base, bstride, value, vl);
 287 }
 288