[AMDGPU] Implement IR variant of isFMAFasterThanFMulAndFAdd (#121465)
[llvm-project.git] / clang / test / CodeGen / RISCV / rvv-intrinsics-autogenerated / non-policy / overloaded / vrgather.c
blobc6f9cb4c3f335b6bf7132dedffb24dd93a482b30
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
2 // REQUIRES: riscv-registered-target
3 // RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
4 // RUN: -target-feature +zvfhmin -target-feature +zvfbfmin -disable-O0-optnone \
5 // RUN: -emit-llvm %s -o - | opt -S -passes=mem2reg | \
6 // RUN: FileCheck --check-prefix=CHECK-RV64 %s
8 #include <riscv_vector.h>
10 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vrgather_vv_f16mf4
11 // CHECK-RV64-SAME: (<vscale x 1 x half> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0:[0-9]+]] {
12 // CHECK-RV64-NEXT: entry:
13 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vrgather.vv.nxv1f16.i64(<vscale x 1 x half> poison, <vscale x 1 x half> [[OP1]], <vscale x 1 x i16> [[INDEX]], i64 [[VL]])
14 // CHECK-RV64-NEXT: ret <vscale x 1 x half> [[TMP0]]
16 vfloat16mf4_t test_vrgather_vv_f16mf4(vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) {
17 return __riscv_vrgather(op1, index, vl);
20 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vrgather_vx_f16mf4
21 // CHECK-RV64-SAME: (<vscale x 1 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
22 // CHECK-RV64-NEXT: entry:
23 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vrgather.vx.nxv1f16.i64(<vscale x 1 x half> poison, <vscale x 1 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])
24 // CHECK-RV64-NEXT: ret <vscale x 1 x half> [[TMP0]]
26 vfloat16mf4_t test_vrgather_vx_f16mf4(vfloat16mf4_t op1, size_t index, size_t vl) {
27 return __riscv_vrgather(op1, index, vl);
30 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vrgather_vv_f16mf2
31 // CHECK-RV64-SAME: (<vscale x 2 x half> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
32 // CHECK-RV64-NEXT: entry:
33 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vrgather.vv.nxv2f16.i64(<vscale x 2 x half> poison, <vscale x 2 x half> [[OP1]], <vscale x 2 x i16> [[INDEX]], i64 [[VL]])
34 // CHECK-RV64-NEXT: ret <vscale x 2 x half> [[TMP0]]
36 vfloat16mf2_t test_vrgather_vv_f16mf2(vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) {
37 return __riscv_vrgather(op1, index, vl);
40 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vrgather_vx_f16mf2
41 // CHECK-RV64-SAME: (<vscale x 2 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
42 // CHECK-RV64-NEXT: entry:
43 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vrgather.vx.nxv2f16.i64(<vscale x 2 x half> poison, <vscale x 2 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])
44 // CHECK-RV64-NEXT: ret <vscale x 2 x half> [[TMP0]]
46 vfloat16mf2_t test_vrgather_vx_f16mf2(vfloat16mf2_t op1, size_t index, size_t vl) {
47 return __riscv_vrgather(op1, index, vl);
50 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vrgather_vv_f16m1
51 // CHECK-RV64-SAME: (<vscale x 4 x half> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
52 // CHECK-RV64-NEXT: entry:
53 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vrgather.vv.nxv4f16.i64(<vscale x 4 x half> poison, <vscale x 4 x half> [[OP1]], <vscale x 4 x i16> [[INDEX]], i64 [[VL]])
54 // CHECK-RV64-NEXT: ret <vscale x 4 x half> [[TMP0]]
56 vfloat16m1_t test_vrgather_vv_f16m1(vfloat16m1_t op1, vuint16m1_t index, size_t vl) {
57 return __riscv_vrgather(op1, index, vl);
60 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vrgather_vx_f16m1
61 // CHECK-RV64-SAME: (<vscale x 4 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
62 // CHECK-RV64-NEXT: entry:
63 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vrgather.vx.nxv4f16.i64(<vscale x 4 x half> poison, <vscale x 4 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])
64 // CHECK-RV64-NEXT: ret <vscale x 4 x half> [[TMP0]]
66 vfloat16m1_t test_vrgather_vx_f16m1(vfloat16m1_t op1, size_t index, size_t vl) {
67 return __riscv_vrgather(op1, index, vl);
70 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vrgather_vv_f16m2
71 // CHECK-RV64-SAME: (<vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
72 // CHECK-RV64-NEXT: entry:
73 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vrgather.vv.nxv8f16.i64(<vscale x 8 x half> poison, <vscale x 8 x half> [[OP1]], <vscale x 8 x i16> [[INDEX]], i64 [[VL]])
74 // CHECK-RV64-NEXT: ret <vscale x 8 x half> [[TMP0]]
76 vfloat16m2_t test_vrgather_vv_f16m2(vfloat16m2_t op1, vuint16m2_t index, size_t vl) {
77 return __riscv_vrgather(op1, index, vl);
80 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vrgather_vx_f16m2
81 // CHECK-RV64-SAME: (<vscale x 8 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
82 // CHECK-RV64-NEXT: entry:
83 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vrgather.vx.nxv8f16.i64(<vscale x 8 x half> poison, <vscale x 8 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])
84 // CHECK-RV64-NEXT: ret <vscale x 8 x half> [[TMP0]]
86 vfloat16m2_t test_vrgather_vx_f16m2(vfloat16m2_t op1, size_t index, size_t vl) {
87 return __riscv_vrgather(op1, index, vl);
90 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vrgather_vv_f16m4
91 // CHECK-RV64-SAME: (<vscale x 16 x half> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
92 // CHECK-RV64-NEXT: entry:
93 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.riscv.vrgather.vv.nxv16f16.i64(<vscale x 16 x half> poison, <vscale x 16 x half> [[OP1]], <vscale x 16 x i16> [[INDEX]], i64 [[VL]])
94 // CHECK-RV64-NEXT: ret <vscale x 16 x half> [[TMP0]]
96 vfloat16m4_t test_vrgather_vv_f16m4(vfloat16m4_t op1, vuint16m4_t index, size_t vl) {
97 return __riscv_vrgather(op1, index, vl);
100 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vrgather_vx_f16m4
101 // CHECK-RV64-SAME: (<vscale x 16 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
102 // CHECK-RV64-NEXT: entry:
103 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.riscv.vrgather.vx.nxv16f16.i64(<vscale x 16 x half> poison, <vscale x 16 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])
104 // CHECK-RV64-NEXT: ret <vscale x 16 x half> [[TMP0]]
106 vfloat16m4_t test_vrgather_vx_f16m4(vfloat16m4_t op1, size_t index, size_t vl) {
107 return __riscv_vrgather(op1, index, vl);
110 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vrgather_vv_f16m8
111 // CHECK-RV64-SAME: (<vscale x 32 x half> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
112 // CHECK-RV64-NEXT: entry:
113 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.vrgather.vv.nxv32f16.i64(<vscale x 32 x half> poison, <vscale x 32 x half> [[OP1]], <vscale x 32 x i16> [[INDEX]], i64 [[VL]])
114 // CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP0]]
116 vfloat16m8_t test_vrgather_vv_f16m8(vfloat16m8_t op1, vuint16m8_t index, size_t vl) {
117 return __riscv_vrgather(op1, index, vl);
120 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vrgather_vx_f16m8
121 // CHECK-RV64-SAME: (<vscale x 32 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
122 // CHECK-RV64-NEXT: entry:
123 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.vrgather.vx.nxv32f16.i64(<vscale x 32 x half> poison, <vscale x 32 x half> [[OP1]], i64 [[INDEX]], i64 [[VL]])
124 // CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP0]]
126 vfloat16m8_t test_vrgather_vx_f16m8(vfloat16m8_t op1, size_t index, size_t vl) {
127 return __riscv_vrgather(op1, index, vl);
130 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vrgather_vv_f32mf2
131 // CHECK-RV64-SAME: (<vscale x 1 x float> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
132 // CHECK-RV64-NEXT: entry:
133 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vrgather.vv.nxv1f32.i64(<vscale x 1 x float> poison, <vscale x 1 x float> [[OP1]], <vscale x 1 x i32> [[INDEX]], i64 [[VL]])
134 // CHECK-RV64-NEXT: ret <vscale x 1 x float> [[TMP0]]
136 vfloat32mf2_t test_vrgather_vv_f32mf2(vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) {
137 return __riscv_vrgather(op1, index, vl);
140 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vrgather_vx_f32mf2
141 // CHECK-RV64-SAME: (<vscale x 1 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
142 // CHECK-RV64-NEXT: entry:
143 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vrgather.vx.nxv1f32.i64(<vscale x 1 x float> poison, <vscale x 1 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])
144 // CHECK-RV64-NEXT: ret <vscale x 1 x float> [[TMP0]]
146 vfloat32mf2_t test_vrgather_vx_f32mf2(vfloat32mf2_t op1, size_t index, size_t vl) {
147 return __riscv_vrgather(op1, index, vl);
150 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vrgather_vv_f32m1
151 // CHECK-RV64-SAME: (<vscale x 2 x float> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
152 // CHECK-RV64-NEXT: entry:
153 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vrgather.vv.nxv2f32.i64(<vscale x 2 x float> poison, <vscale x 2 x float> [[OP1]], <vscale x 2 x i32> [[INDEX]], i64 [[VL]])
154 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
156 vfloat32m1_t test_vrgather_vv_f32m1(vfloat32m1_t op1, vuint32m1_t index, size_t vl) {
157 return __riscv_vrgather(op1, index, vl);
160 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vrgather_vx_f32m1
161 // CHECK-RV64-SAME: (<vscale x 2 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
162 // CHECK-RV64-NEXT: entry:
163 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vrgather.vx.nxv2f32.i64(<vscale x 2 x float> poison, <vscale x 2 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])
164 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
166 vfloat32m1_t test_vrgather_vx_f32m1(vfloat32m1_t op1, size_t index, size_t vl) {
167 return __riscv_vrgather(op1, index, vl);
170 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vrgather_vv_f32m2
171 // CHECK-RV64-SAME: (<vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
172 // CHECK-RV64-NEXT: entry:
173 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vrgather.vv.nxv4f32.i64(<vscale x 4 x float> poison, <vscale x 4 x float> [[OP1]], <vscale x 4 x i32> [[INDEX]], i64 [[VL]])
174 // CHECK-RV64-NEXT: ret <vscale x 4 x float> [[TMP0]]
176 vfloat32m2_t test_vrgather_vv_f32m2(vfloat32m2_t op1, vuint32m2_t index, size_t vl) {
177 return __riscv_vrgather(op1, index, vl);
180 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vrgather_vx_f32m2
181 // CHECK-RV64-SAME: (<vscale x 4 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
182 // CHECK-RV64-NEXT: entry:
183 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vrgather.vx.nxv4f32.i64(<vscale x 4 x float> poison, <vscale x 4 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])
184 // CHECK-RV64-NEXT: ret <vscale x 4 x float> [[TMP0]]
186 vfloat32m2_t test_vrgather_vx_f32m2(vfloat32m2_t op1, size_t index, size_t vl) {
187 return __riscv_vrgather(op1, index, vl);
190 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vrgather_vv_f32m4
191 // CHECK-RV64-SAME: (<vscale x 8 x float> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
192 // CHECK-RV64-NEXT: entry:
193 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vrgather.vv.nxv8f32.i64(<vscale x 8 x float> poison, <vscale x 8 x float> [[OP1]], <vscale x 8 x i32> [[INDEX]], i64 [[VL]])
194 // CHECK-RV64-NEXT: ret <vscale x 8 x float> [[TMP0]]
196 vfloat32m4_t test_vrgather_vv_f32m4(vfloat32m4_t op1, vuint32m4_t index, size_t vl) {
197 return __riscv_vrgather(op1, index, vl);
200 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vrgather_vx_f32m4
201 // CHECK-RV64-SAME: (<vscale x 8 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
202 // CHECK-RV64-NEXT: entry:
203 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vrgather.vx.nxv8f32.i64(<vscale x 8 x float> poison, <vscale x 8 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])
204 // CHECK-RV64-NEXT: ret <vscale x 8 x float> [[TMP0]]
206 vfloat32m4_t test_vrgather_vx_f32m4(vfloat32m4_t op1, size_t index, size_t vl) {
207 return __riscv_vrgather(op1, index, vl);
210 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vrgather_vv_f32m8
211 // CHECK-RV64-SAME: (<vscale x 16 x float> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
212 // CHECK-RV64-NEXT: entry:
213 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.vrgather.vv.nxv16f32.i64(<vscale x 16 x float> poison, <vscale x 16 x float> [[OP1]], <vscale x 16 x i32> [[INDEX]], i64 [[VL]])
214 // CHECK-RV64-NEXT: ret <vscale x 16 x float> [[TMP0]]
216 vfloat32m8_t test_vrgather_vv_f32m8(vfloat32m8_t op1, vuint32m8_t index, size_t vl) {
217 return __riscv_vrgather(op1, index, vl);
220 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vrgather_vx_f32m8
221 // CHECK-RV64-SAME: (<vscale x 16 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
222 // CHECK-RV64-NEXT: entry:
223 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.vrgather.vx.nxv16f32.i64(<vscale x 16 x float> poison, <vscale x 16 x float> [[OP1]], i64 [[INDEX]], i64 [[VL]])
224 // CHECK-RV64-NEXT: ret <vscale x 16 x float> [[TMP0]]
226 vfloat32m8_t test_vrgather_vx_f32m8(vfloat32m8_t op1, size_t index, size_t vl) {
227 return __riscv_vrgather(op1, index, vl);
230 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vrgather_vv_f64m1
231 // CHECK-RV64-SAME: (<vscale x 1 x double> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
232 // CHECK-RV64-NEXT: entry:
233 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vrgather.vv.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> [[OP1]], <vscale x 1 x i64> [[INDEX]], i64 [[VL]])
234 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
236 vfloat64m1_t test_vrgather_vv_f64m1(vfloat64m1_t op1, vuint64m1_t index, size_t vl) {
237 return __riscv_vrgather(op1, index, vl);
240 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vrgather_vx_f64m1
241 // CHECK-RV64-SAME: (<vscale x 1 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
242 // CHECK-RV64-NEXT: entry:
243 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vrgather.vx.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> [[OP1]], i64 [[INDEX]], i64 [[VL]])
244 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
246 vfloat64m1_t test_vrgather_vx_f64m1(vfloat64m1_t op1, size_t index, size_t vl) {
247 return __riscv_vrgather(op1, index, vl);
250 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vrgather_vv_f64m2
251 // CHECK-RV64-SAME: (<vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
252 // CHECK-RV64-NEXT: entry:
253 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vrgather.vv.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> [[OP1]], <vscale x 2 x i64> [[INDEX]], i64 [[VL]])
254 // CHECK-RV64-NEXT: ret <vscale x 2 x double> [[TMP0]]
256 vfloat64m2_t test_vrgather_vv_f64m2(vfloat64m2_t op1, vuint64m2_t index, size_t vl) {
257 return __riscv_vrgather(op1, index, vl);
260 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vrgather_vx_f64m2
261 // CHECK-RV64-SAME: (<vscale x 2 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
262 // CHECK-RV64-NEXT: entry:
263 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vrgather.vx.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> [[OP1]], i64 [[INDEX]], i64 [[VL]])
264 // CHECK-RV64-NEXT: ret <vscale x 2 x double> [[TMP0]]
266 vfloat64m2_t test_vrgather_vx_f64m2(vfloat64m2_t op1, size_t index, size_t vl) {
267 return __riscv_vrgather(op1, index, vl);
270 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vrgather_vv_f64m4
271 // CHECK-RV64-SAME: (<vscale x 4 x double> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
272 // CHECK-RV64-NEXT: entry:
273 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vrgather.vv.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> [[OP1]], <vscale x 4 x i64> [[INDEX]], i64 [[VL]])
274 // CHECK-RV64-NEXT: ret <vscale x 4 x double> [[TMP0]]
276 vfloat64m4_t test_vrgather_vv_f64m4(vfloat64m4_t op1, vuint64m4_t index, size_t vl) {
277 return __riscv_vrgather(op1, index, vl);
280 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vrgather_vx_f64m4
281 // CHECK-RV64-SAME: (<vscale x 4 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
282 // CHECK-RV64-NEXT: entry:
283 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vrgather.vx.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> [[OP1]], i64 [[INDEX]], i64 [[VL]])
284 // CHECK-RV64-NEXT: ret <vscale x 4 x double> [[TMP0]]
286 vfloat64m4_t test_vrgather_vx_f64m4(vfloat64m4_t op1, size_t index, size_t vl) {
287 return __riscv_vrgather(op1, index, vl);
290 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vrgather_vv_f64m8
291 // CHECK-RV64-SAME: (<vscale x 8 x double> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
292 // CHECK-RV64-NEXT: entry:
293 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vrgather.vv.nxv8f64.i64(<vscale x 8 x double> poison, <vscale x 8 x double> [[OP1]], <vscale x 8 x i64> [[INDEX]], i64 [[VL]])
294 // CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]
296 vfloat64m8_t test_vrgather_vv_f64m8(vfloat64m8_t op1, vuint64m8_t index, size_t vl) {
297 return __riscv_vrgather(op1, index, vl);
300 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vrgather_vx_f64m8
301 // CHECK-RV64-SAME: (<vscale x 8 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
302 // CHECK-RV64-NEXT: entry:
303 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vrgather.vx.nxv8f64.i64(<vscale x 8 x double> poison, <vscale x 8 x double> [[OP1]], i64 [[INDEX]], i64 [[VL]])
304 // CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]
306 vfloat64m8_t test_vrgather_vx_f64m8(vfloat64m8_t op1, size_t index, size_t vl) {
307 return __riscv_vrgather(op1, index, vl);
310 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vv_i8mf8
311 // CHECK-RV64-SAME: (<vscale x 1 x i8> [[OP1:%.*]], <vscale x 1 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
312 // CHECK-RV64-NEXT: entry:
313 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], <vscale x 1 x i8> [[INDEX]], i64 [[VL]])
314 // CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]
316 vint8mf8_t test_vrgather_vv_i8mf8(vint8mf8_t op1, vuint8mf8_t index, size_t vl) {
317 return __riscv_vrgather(op1, index, vl);
320 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vx_i8mf8
321 // CHECK-RV64-SAME: (<vscale x 1 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
322 // CHECK-RV64-NEXT: entry:
323 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
324 // CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]
326 vint8mf8_t test_vrgather_vx_i8mf8(vint8mf8_t op1, size_t index, size_t vl) {
327 return __riscv_vrgather(op1, index, vl);
330 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vv_i8mf4
331 // CHECK-RV64-SAME: (<vscale x 2 x i8> [[OP1:%.*]], <vscale x 2 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
332 // CHECK-RV64-NEXT: entry:
333 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], <vscale x 2 x i8> [[INDEX]], i64 [[VL]])
334 // CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]
336 vint8mf4_t test_vrgather_vv_i8mf4(vint8mf4_t op1, vuint8mf4_t index, size_t vl) {
337 return __riscv_vrgather(op1, index, vl);
340 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vx_i8mf4
341 // CHECK-RV64-SAME: (<vscale x 2 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
342 // CHECK-RV64-NEXT: entry:
343 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
344 // CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]
346 vint8mf4_t test_vrgather_vx_i8mf4(vint8mf4_t op1, size_t index, size_t vl) {
347 return __riscv_vrgather(op1, index, vl);
350 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vv_i8mf2
351 // CHECK-RV64-SAME: (<vscale x 4 x i8> [[OP1:%.*]], <vscale x 4 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
352 // CHECK-RV64-NEXT: entry:
353 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], <vscale x 4 x i8> [[INDEX]], i64 [[VL]])
354 // CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]
356 vint8mf2_t test_vrgather_vv_i8mf2(vint8mf2_t op1, vuint8mf2_t index, size_t vl) {
357 return __riscv_vrgather(op1, index, vl);
360 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vx_i8mf2
361 // CHECK-RV64-SAME: (<vscale x 4 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
362 // CHECK-RV64-NEXT: entry:
363 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
364 // CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]
366 vint8mf2_t test_vrgather_vx_i8mf2(vint8mf2_t op1, size_t index, size_t vl) {
367 return __riscv_vrgather(op1, index, vl);
370 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vv_i8m1
371 // CHECK-RV64-SAME: (<vscale x 8 x i8> [[OP1:%.*]], <vscale x 8 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
372 // CHECK-RV64-NEXT: entry:
373 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], <vscale x 8 x i8> [[INDEX]], i64 [[VL]])
374 // CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]
376 vint8m1_t test_vrgather_vv_i8m1(vint8m1_t op1, vuint8m1_t index, size_t vl) {
377 return __riscv_vrgather(op1, index, vl);
380 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vx_i8m1
381 // CHECK-RV64-SAME: (<vscale x 8 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
382 // CHECK-RV64-NEXT: entry:
383 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
384 // CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]
386 vint8m1_t test_vrgather_vx_i8m1(vint8m1_t op1, size_t index, size_t vl) {
387 return __riscv_vrgather(op1, index, vl);
390 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vv_i8m2
391 // CHECK-RV64-SAME: (<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
392 // CHECK-RV64-NEXT: entry:
393 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], <vscale x 16 x i8> [[INDEX]], i64 [[VL]])
394 // CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]
396 vint8m2_t test_vrgather_vv_i8m2(vint8m2_t op1, vuint8m2_t index, size_t vl) {
397 return __riscv_vrgather(op1, index, vl);
400 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vx_i8m2
401 // CHECK-RV64-SAME: (<vscale x 16 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
402 // CHECK-RV64-NEXT: entry:
403 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
404 // CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]
406 vint8m2_t test_vrgather_vx_i8m2(vint8m2_t op1, size_t index, size_t vl) {
407 return __riscv_vrgather(op1, index, vl);
410 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vv_i8m4
411 // CHECK-RV64-SAME: (<vscale x 32 x i8> [[OP1:%.*]], <vscale x 32 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
412 // CHECK-RV64-NEXT: entry:
413 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], <vscale x 32 x i8> [[INDEX]], i64 [[VL]])
414 // CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]
416 vint8m4_t test_vrgather_vv_i8m4(vint8m4_t op1, vuint8m4_t index, size_t vl) {
417 return __riscv_vrgather(op1, index, vl);
420 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vx_i8m4
421 // CHECK-RV64-SAME: (<vscale x 32 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
422 // CHECK-RV64-NEXT: entry:
423 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
424 // CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]
426 vint8m4_t test_vrgather_vx_i8m4(vint8m4_t op1, size_t index, size_t vl) {
427 return __riscv_vrgather(op1, index, vl);
430 // CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vv_i8m8
431 // CHECK-RV64-SAME: (<vscale x 64 x i8> [[OP1:%.*]], <vscale x 64 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
432 // CHECK-RV64-NEXT: entry:
433 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], <vscale x 64 x i8> [[INDEX]], i64 [[VL]])
434 // CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]
436 vint8m8_t test_vrgather_vv_i8m8(vint8m8_t op1, vuint8m8_t index, size_t vl) {
437 return __riscv_vrgather(op1, index, vl);
440 // CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vx_i8m8
441 // CHECK-RV64-SAME: (<vscale x 64 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
442 // CHECK-RV64-NEXT: entry:
443 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
444 // CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]
446 vint8m8_t test_vrgather_vx_i8m8(vint8m8_t op1, size_t index, size_t vl) {
447 return __riscv_vrgather(op1, index, vl);
450 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vv_i16mf4
451 // CHECK-RV64-SAME: (<vscale x 1 x i16> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
452 // CHECK-RV64-NEXT: entry:
453 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], <vscale x 1 x i16> [[INDEX]], i64 [[VL]])
454 // CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
456 vint16mf4_t test_vrgather_vv_i16mf4(vint16mf4_t op1, vuint16mf4_t index, size_t vl) {
457 return __riscv_vrgather(op1, index, vl);
460 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vx_i16mf4
461 // CHECK-RV64-SAME: (<vscale x 1 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
462 // CHECK-RV64-NEXT: entry:
463 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
464 // CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
466 vint16mf4_t test_vrgather_vx_i16mf4(vint16mf4_t op1, size_t index, size_t vl) {
467 return __riscv_vrgather(op1, index, vl);
470 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vv_i16mf2
471 // CHECK-RV64-SAME: (<vscale x 2 x i16> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
472 // CHECK-RV64-NEXT: entry:
473 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], <vscale x 2 x i16> [[INDEX]], i64 [[VL]])
474 // CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
476 vint16mf2_t test_vrgather_vv_i16mf2(vint16mf2_t op1, vuint16mf2_t index, size_t vl) {
477 return __riscv_vrgather(op1, index, vl);
480 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vx_i16mf2
481 // CHECK-RV64-SAME: (<vscale x 2 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
482 // CHECK-RV64-NEXT: entry:
483 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
484 // CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
486 vint16mf2_t test_vrgather_vx_i16mf2(vint16mf2_t op1, size_t index, size_t vl) {
487 return __riscv_vrgather(op1, index, vl);
490 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vv_i16m1
491 // CHECK-RV64-SAME: (<vscale x 4 x i16> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
492 // CHECK-RV64-NEXT: entry:
493 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], <vscale x 4 x i16> [[INDEX]], i64 [[VL]])
494 // CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
496 vint16m1_t test_vrgather_vv_i16m1(vint16m1_t op1, vuint16m1_t index, size_t vl) {
497 return __riscv_vrgather(op1, index, vl);
500 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vx_i16m1
501 // CHECK-RV64-SAME: (<vscale x 4 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
502 // CHECK-RV64-NEXT: entry:
503 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
504 // CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
506 vint16m1_t test_vrgather_vx_i16m1(vint16m1_t op1, size_t index, size_t vl) {
507 return __riscv_vrgather(op1, index, vl);
510 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vv_i16m2
511 // CHECK-RV64-SAME: (<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
512 // CHECK-RV64-NEXT: entry:
513 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], <vscale x 8 x i16> [[INDEX]], i64 [[VL]])
514 // CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
516 vint16m2_t test_vrgather_vv_i16m2(vint16m2_t op1, vuint16m2_t index, size_t vl) {
517 return __riscv_vrgather(op1, index, vl);
520 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vx_i16m2
521 // CHECK-RV64-SAME: (<vscale x 8 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
522 // CHECK-RV64-NEXT: entry:
523 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
524 // CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
526 vint16m2_t test_vrgather_vx_i16m2(vint16m2_t op1, size_t index, size_t vl) {
527 return __riscv_vrgather(op1, index, vl);
530 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vv_i16m4
531 // CHECK-RV64-SAME: (<vscale x 16 x i16> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
532 // CHECK-RV64-NEXT: entry:
533 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], <vscale x 16 x i16> [[INDEX]], i64 [[VL]])
534 // CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
536 vint16m4_t test_vrgather_vv_i16m4(vint16m4_t op1, vuint16m4_t index, size_t vl) {
537 return __riscv_vrgather(op1, index, vl);
540 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vx_i16m4
541 // CHECK-RV64-SAME: (<vscale x 16 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
542 // CHECK-RV64-NEXT: entry:
543 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
544 // CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
546 vint16m4_t test_vrgather_vx_i16m4(vint16m4_t op1, size_t index, size_t vl) {
547 return __riscv_vrgather(op1, index, vl);
550 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vv_i16m8
551 // CHECK-RV64-SAME: (<vscale x 32 x i16> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
552 // CHECK-RV64-NEXT: entry:
553 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], <vscale x 32 x i16> [[INDEX]], i64 [[VL]])
554 // CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
556 vint16m8_t test_vrgather_vv_i16m8(vint16m8_t op1, vuint16m8_t index, size_t vl) {
557 return __riscv_vrgather(op1, index, vl);
560 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vx_i16m8
561 // CHECK-RV64-SAME: (<vscale x 32 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
562 // CHECK-RV64-NEXT: entry:
563 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
564 // CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
566 vint16m8_t test_vrgather_vx_i16m8(vint16m8_t op1, size_t index, size_t vl) {
567 return __riscv_vrgather(op1, index, vl);
570 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vv_i32mf2
571 // CHECK-RV64-SAME: (<vscale x 1 x i32> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
572 // CHECK-RV64-NEXT: entry:
573 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], <vscale x 1 x i32> [[INDEX]], i64 [[VL]])
574 // CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
576 vint32mf2_t test_vrgather_vv_i32mf2(vint32mf2_t op1, vuint32mf2_t index, size_t vl) {
577 return __riscv_vrgather(op1, index, vl);
580 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vx_i32mf2
581 // CHECK-RV64-SAME: (<vscale x 1 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
582 // CHECK-RV64-NEXT: entry:
583 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
584 // CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
586 vint32mf2_t test_vrgather_vx_i32mf2(vint32mf2_t op1, size_t index, size_t vl) {
587 return __riscv_vrgather(op1, index, vl);
590 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vv_i32m1
591 // CHECK-RV64-SAME: (<vscale x 2 x i32> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
592 // CHECK-RV64-NEXT: entry:
593 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], <vscale x 2 x i32> [[INDEX]], i64 [[VL]])
594 // CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
596 vint32m1_t test_vrgather_vv_i32m1(vint32m1_t op1, vuint32m1_t index, size_t vl) {
597 return __riscv_vrgather(op1, index, vl);
600 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vx_i32m1
601 // CHECK-RV64-SAME: (<vscale x 2 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
602 // CHECK-RV64-NEXT: entry:
603 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
604 // CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
606 vint32m1_t test_vrgather_vx_i32m1(vint32m1_t op1, size_t index, size_t vl) {
607 return __riscv_vrgather(op1, index, vl);
610 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vv_i32m2
611 // CHECK-RV64-SAME: (<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
612 // CHECK-RV64-NEXT: entry:
613 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], <vscale x 4 x i32> [[INDEX]], i64 [[VL]])
614 // CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
616 vint32m2_t test_vrgather_vv_i32m2(vint32m2_t op1, vuint32m2_t index, size_t vl) {
617 return __riscv_vrgather(op1, index, vl);
620 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vx_i32m2
621 // CHECK-RV64-SAME: (<vscale x 4 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
622 // CHECK-RV64-NEXT: entry:
623 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
624 // CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
626 vint32m2_t test_vrgather_vx_i32m2(vint32m2_t op1, size_t index, size_t vl) {
627 return __riscv_vrgather(op1, index, vl);
630 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vv_i32m4
631 // CHECK-RV64-SAME: (<vscale x 8 x i32> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
632 // CHECK-RV64-NEXT: entry:
633 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], <vscale x 8 x i32> [[INDEX]], i64 [[VL]])
634 // CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
636 vint32m4_t test_vrgather_vv_i32m4(vint32m4_t op1, vuint32m4_t index, size_t vl) {
637 return __riscv_vrgather(op1, index, vl);
640 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vx_i32m4
641 // CHECK-RV64-SAME: (<vscale x 8 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
642 // CHECK-RV64-NEXT: entry:
643 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
644 // CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
646 vint32m4_t test_vrgather_vx_i32m4(vint32m4_t op1, size_t index, size_t vl) {
647 return __riscv_vrgather(op1, index, vl);
650 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vv_i32m8
651 // CHECK-RV64-SAME: (<vscale x 16 x i32> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
652 // CHECK-RV64-NEXT: entry:
653 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], <vscale x 16 x i32> [[INDEX]], i64 [[VL]])
654 // CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
656 vint32m8_t test_vrgather_vv_i32m8(vint32m8_t op1, vuint32m8_t index, size_t vl) {
657 return __riscv_vrgather(op1, index, vl);
660 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vx_i32m8
661 // CHECK-RV64-SAME: (<vscale x 16 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
662 // CHECK-RV64-NEXT: entry:
663 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
664 // CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
666 vint32m8_t test_vrgather_vx_i32m8(vint32m8_t op1, size_t index, size_t vl) {
667 return __riscv_vrgather(op1, index, vl);
670 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vv_i64m1
671 // CHECK-RV64-SAME: (<vscale x 1 x i64> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
672 // CHECK-RV64-NEXT: entry:
673 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], <vscale x 1 x i64> [[INDEX]], i64 [[VL]])
674 // CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
676 vint64m1_t test_vrgather_vv_i64m1(vint64m1_t op1, vuint64m1_t index, size_t vl) {
677 return __riscv_vrgather(op1, index, vl);
680 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vx_i64m1
681 // CHECK-RV64-SAME: (<vscale x 1 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
682 // CHECK-RV64-NEXT: entry:
683 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])
684 // CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
686 vint64m1_t test_vrgather_vx_i64m1(vint64m1_t op1, size_t index, size_t vl) {
687 return __riscv_vrgather(op1, index, vl);
690 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vv_i64m2
691 // CHECK-RV64-SAME: (<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
692 // CHECK-RV64-NEXT: entry:
693 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], <vscale x 2 x i64> [[INDEX]], i64 [[VL]])
694 // CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
696 vint64m2_t test_vrgather_vv_i64m2(vint64m2_t op1, vuint64m2_t index, size_t vl) {
697 return __riscv_vrgather(op1, index, vl);
700 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vx_i64m2
701 // CHECK-RV64-SAME: (<vscale x 2 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
702 // CHECK-RV64-NEXT: entry:
703 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])
704 // CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
706 vint64m2_t test_vrgather_vx_i64m2(vint64m2_t op1, size_t index, size_t vl) {
707 return __riscv_vrgather(op1, index, vl);
710 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vv_i64m4
711 // CHECK-RV64-SAME: (<vscale x 4 x i64> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
712 // CHECK-RV64-NEXT: entry:
713 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], <vscale x 4 x i64> [[INDEX]], i64 [[VL]])
714 // CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
716 vint64m4_t test_vrgather_vv_i64m4(vint64m4_t op1, vuint64m4_t index, size_t vl) {
717 return __riscv_vrgather(op1, index, vl);
720 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vx_i64m4
721 // CHECK-RV64-SAME: (<vscale x 4 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
722 // CHECK-RV64-NEXT: entry:
723 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])
724 // CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
726 vint64m4_t test_vrgather_vx_i64m4(vint64m4_t op1, size_t index, size_t vl) {
727 return __riscv_vrgather(op1, index, vl);
730 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vv_i64m8
731 // CHECK-RV64-SAME: (<vscale x 8 x i64> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
732 // CHECK-RV64-NEXT: entry:
733 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], <vscale x 8 x i64> [[INDEX]], i64 [[VL]])
734 // CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
736 vint64m8_t test_vrgather_vv_i64m8(vint64m8_t op1, vuint64m8_t index, size_t vl) {
737 return __riscv_vrgather(op1, index, vl);
740 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vx_i64m8
741 // CHECK-RV64-SAME: (<vscale x 8 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
742 // CHECK-RV64-NEXT: entry:
743 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])
744 // CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
746 vint64m8_t test_vrgather_vx_i64m8(vint64m8_t op1, size_t index, size_t vl) {
747 return __riscv_vrgather(op1, index, vl);
750 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vv_u8mf8
751 // CHECK-RV64-SAME: (<vscale x 1 x i8> [[OP1:%.*]], <vscale x 1 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
752 // CHECK-RV64-NEXT: entry:
753 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], <vscale x 1 x i8> [[INDEX]], i64 [[VL]])
754 // CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]
756 vuint8mf8_t test_vrgather_vv_u8mf8(vuint8mf8_t op1, vuint8mf8_t index, size_t vl) {
757 return __riscv_vrgather(op1, index, vl);
760 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vx_u8mf8
761 // CHECK-RV64-SAME: (<vscale x 1 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
762 // CHECK-RV64-NEXT: entry:
763 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
764 // CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]
766 vuint8mf8_t test_vrgather_vx_u8mf8(vuint8mf8_t op1, size_t index, size_t vl) {
767 return __riscv_vrgather(op1, index, vl);
770 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vv_u8mf4
771 // CHECK-RV64-SAME: (<vscale x 2 x i8> [[OP1:%.*]], <vscale x 2 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
772 // CHECK-RV64-NEXT: entry:
773 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], <vscale x 2 x i8> [[INDEX]], i64 [[VL]])
774 // CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]
776 vuint8mf4_t test_vrgather_vv_u8mf4(vuint8mf4_t op1, vuint8mf4_t index, size_t vl) {
777 return __riscv_vrgather(op1, index, vl);
780 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vx_u8mf4
781 // CHECK-RV64-SAME: (<vscale x 2 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
782 // CHECK-RV64-NEXT: entry:
783 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
784 // CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]
786 vuint8mf4_t test_vrgather_vx_u8mf4(vuint8mf4_t op1, size_t index, size_t vl) {
787 return __riscv_vrgather(op1, index, vl);
790 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vv_u8mf2
791 // CHECK-RV64-SAME: (<vscale x 4 x i8> [[OP1:%.*]], <vscale x 4 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
792 // CHECK-RV64-NEXT: entry:
793 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], <vscale x 4 x i8> [[INDEX]], i64 [[VL]])
794 // CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]
796 vuint8mf2_t test_vrgather_vv_u8mf2(vuint8mf2_t op1, vuint8mf2_t index, size_t vl) {
797 return __riscv_vrgather(op1, index, vl);
800 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vx_u8mf2
801 // CHECK-RV64-SAME: (<vscale x 4 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
802 // CHECK-RV64-NEXT: entry:
803 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
804 // CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]
806 vuint8mf2_t test_vrgather_vx_u8mf2(vuint8mf2_t op1, size_t index, size_t vl) {
807 return __riscv_vrgather(op1, index, vl);
810 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vv_u8m1
811 // CHECK-RV64-SAME: (<vscale x 8 x i8> [[OP1:%.*]], <vscale x 8 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
812 // CHECK-RV64-NEXT: entry:
813 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], <vscale x 8 x i8> [[INDEX]], i64 [[VL]])
814 // CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]
816 vuint8m1_t test_vrgather_vv_u8m1(vuint8m1_t op1, vuint8m1_t index, size_t vl) {
817 return __riscv_vrgather(op1, index, vl);
820 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vx_u8m1
821 // CHECK-RV64-SAME: (<vscale x 8 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
822 // CHECK-RV64-NEXT: entry:
823 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
824 // CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]
826 vuint8m1_t test_vrgather_vx_u8m1(vuint8m1_t op1, size_t index, size_t vl) {
827 return __riscv_vrgather(op1, index, vl);
830 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vv_u8m2
831 // CHECK-RV64-SAME: (<vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
832 // CHECK-RV64-NEXT: entry:
833 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], <vscale x 16 x i8> [[INDEX]], i64 [[VL]])
834 // CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]
836 vuint8m2_t test_vrgather_vv_u8m2(vuint8m2_t op1, vuint8m2_t index, size_t vl) {
837 return __riscv_vrgather(op1, index, vl);
840 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vx_u8m2
841 // CHECK-RV64-SAME: (<vscale x 16 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
842 // CHECK-RV64-NEXT: entry:
843 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
844 // CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]
846 vuint8m2_t test_vrgather_vx_u8m2(vuint8m2_t op1, size_t index, size_t vl) {
847 return __riscv_vrgather(op1, index, vl);
850 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vv_u8m4
851 // CHECK-RV64-SAME: (<vscale x 32 x i8> [[OP1:%.*]], <vscale x 32 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
852 // CHECK-RV64-NEXT: entry:
853 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], <vscale x 32 x i8> [[INDEX]], i64 [[VL]])
854 // CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]
856 vuint8m4_t test_vrgather_vv_u8m4(vuint8m4_t op1, vuint8m4_t index, size_t vl) {
857 return __riscv_vrgather(op1, index, vl);
860 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vx_u8m4
861 // CHECK-RV64-SAME: (<vscale x 32 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
862 // CHECK-RV64-NEXT: entry:
863 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
864 // CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]
866 vuint8m4_t test_vrgather_vx_u8m4(vuint8m4_t op1, size_t index, size_t vl) {
867 return __riscv_vrgather(op1, index, vl);
870 // CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vv_u8m8
871 // CHECK-RV64-SAME: (<vscale x 64 x i8> [[OP1:%.*]], <vscale x 64 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
872 // CHECK-RV64-NEXT: entry:
873 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], <vscale x 64 x i8> [[INDEX]], i64 [[VL]])
874 // CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]
876 vuint8m8_t test_vrgather_vv_u8m8(vuint8m8_t op1, vuint8m8_t index, size_t vl) {
877 return __riscv_vrgather(op1, index, vl);
880 // CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vx_u8m8
881 // CHECK-RV64-SAME: (<vscale x 64 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
882 // CHECK-RV64-NEXT: entry:
883 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], i64 [[INDEX]], i64 [[VL]])
884 // CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]
886 vuint8m8_t test_vrgather_vx_u8m8(vuint8m8_t op1, size_t index, size_t vl) {
887 return __riscv_vrgather(op1, index, vl);
890 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vv_u16mf4
891 // CHECK-RV64-SAME: (<vscale x 1 x i16> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
892 // CHECK-RV64-NEXT: entry:
893 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], <vscale x 1 x i16> [[INDEX]], i64 [[VL]])
894 // CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
896 vuint16mf4_t test_vrgather_vv_u16mf4(vuint16mf4_t op1, vuint16mf4_t index, size_t vl) {
897 return __riscv_vrgather(op1, index, vl);
900 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vx_u16mf4
901 // CHECK-RV64-SAME: (<vscale x 1 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
902 // CHECK-RV64-NEXT: entry:
903 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
904 // CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
906 vuint16mf4_t test_vrgather_vx_u16mf4(vuint16mf4_t op1, size_t index, size_t vl) {
907 return __riscv_vrgather(op1, index, vl);
910 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vv_u16mf2
911 // CHECK-RV64-SAME: (<vscale x 2 x i16> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
912 // CHECK-RV64-NEXT: entry:
913 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], <vscale x 2 x i16> [[INDEX]], i64 [[VL]])
914 // CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
916 vuint16mf2_t test_vrgather_vv_u16mf2(vuint16mf2_t op1, vuint16mf2_t index, size_t vl) {
917 return __riscv_vrgather(op1, index, vl);
920 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vx_u16mf2
921 // CHECK-RV64-SAME: (<vscale x 2 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
922 // CHECK-RV64-NEXT: entry:
923 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
924 // CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
926 vuint16mf2_t test_vrgather_vx_u16mf2(vuint16mf2_t op1, size_t index, size_t vl) {
927 return __riscv_vrgather(op1, index, vl);
930 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vv_u16m1
931 // CHECK-RV64-SAME: (<vscale x 4 x i16> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
932 // CHECK-RV64-NEXT: entry:
933 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], <vscale x 4 x i16> [[INDEX]], i64 [[VL]])
934 // CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
936 vuint16m1_t test_vrgather_vv_u16m1(vuint16m1_t op1, vuint16m1_t index, size_t vl) {
937 return __riscv_vrgather(op1, index, vl);
940 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vx_u16m1
941 // CHECK-RV64-SAME: (<vscale x 4 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
942 // CHECK-RV64-NEXT: entry:
943 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
944 // CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
946 vuint16m1_t test_vrgather_vx_u16m1(vuint16m1_t op1, size_t index, size_t vl) {
947 return __riscv_vrgather(op1, index, vl);
950 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vv_u16m2
951 // CHECK-RV64-SAME: (<vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
952 // CHECK-RV64-NEXT: entry:
953 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], <vscale x 8 x i16> [[INDEX]], i64 [[VL]])
954 // CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
956 vuint16m2_t test_vrgather_vv_u16m2(vuint16m2_t op1, vuint16m2_t index, size_t vl) {
957 return __riscv_vrgather(op1, index, vl);
960 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vx_u16m2
961 // CHECK-RV64-SAME: (<vscale x 8 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
962 // CHECK-RV64-NEXT: entry:
963 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
964 // CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
966 vuint16m2_t test_vrgather_vx_u16m2(vuint16m2_t op1, size_t index, size_t vl) {
967 return __riscv_vrgather(op1, index, vl);
970 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vv_u16m4
971 // CHECK-RV64-SAME: (<vscale x 16 x i16> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
972 // CHECK-RV64-NEXT: entry:
973 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], <vscale x 16 x i16> [[INDEX]], i64 [[VL]])
974 // CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
976 vuint16m4_t test_vrgather_vv_u16m4(vuint16m4_t op1, vuint16m4_t index, size_t vl) {
977 return __riscv_vrgather(op1, index, vl);
980 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vx_u16m4
981 // CHECK-RV64-SAME: (<vscale x 16 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
982 // CHECK-RV64-NEXT: entry:
983 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
984 // CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
986 vuint16m4_t test_vrgather_vx_u16m4(vuint16m4_t op1, size_t index, size_t vl) {
987 return __riscv_vrgather(op1, index, vl);
990 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vv_u16m8
991 // CHECK-RV64-SAME: (<vscale x 32 x i16> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
992 // CHECK-RV64-NEXT: entry:
993 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], <vscale x 32 x i16> [[INDEX]], i64 [[VL]])
994 // CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
996 vuint16m8_t test_vrgather_vv_u16m8(vuint16m8_t op1, vuint16m8_t index, size_t vl) {
997 return __riscv_vrgather(op1, index, vl);
1000 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vx_u16m8
1001 // CHECK-RV64-SAME: (<vscale x 32 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1002 // CHECK-RV64-NEXT: entry:
1003 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1004 // CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
1006 vuint16m8_t test_vrgather_vx_u16m8(vuint16m8_t op1, size_t index, size_t vl) {
1007 return __riscv_vrgather(op1, index, vl);
1010 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vv_u32mf2
1011 // CHECK-RV64-SAME: (<vscale x 1 x i32> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1012 // CHECK-RV64-NEXT: entry:
1013 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], <vscale x 1 x i32> [[INDEX]], i64 [[VL]])
1014 // CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
1016 vuint32mf2_t test_vrgather_vv_u32mf2(vuint32mf2_t op1, vuint32mf2_t index, size_t vl) {
1017 return __riscv_vrgather(op1, index, vl);
1020 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vx_u32mf2
1021 // CHECK-RV64-SAME: (<vscale x 1 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1022 // CHECK-RV64-NEXT: entry:
1023 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1024 // CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
1026 vuint32mf2_t test_vrgather_vx_u32mf2(vuint32mf2_t op1, size_t index, size_t vl) {
1027 return __riscv_vrgather(op1, index, vl);
1030 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vv_u32m1
1031 // CHECK-RV64-SAME: (<vscale x 2 x i32> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1032 // CHECK-RV64-NEXT: entry:
1033 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], <vscale x 2 x i32> [[INDEX]], i64 [[VL]])
1034 // CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
1036 vuint32m1_t test_vrgather_vv_u32m1(vuint32m1_t op1, vuint32m1_t index, size_t vl) {
1037 return __riscv_vrgather(op1, index, vl);
1040 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vx_u32m1
1041 // CHECK-RV64-SAME: (<vscale x 2 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1042 // CHECK-RV64-NEXT: entry:
1043 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1044 // CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
1046 vuint32m1_t test_vrgather_vx_u32m1(vuint32m1_t op1, size_t index, size_t vl) {
1047 return __riscv_vrgather(op1, index, vl);
1050 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vv_u32m2
1051 // CHECK-RV64-SAME: (<vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1052 // CHECK-RV64-NEXT: entry:
1053 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], <vscale x 4 x i32> [[INDEX]], i64 [[VL]])
1054 // CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
1056 vuint32m2_t test_vrgather_vv_u32m2(vuint32m2_t op1, vuint32m2_t index, size_t vl) {
1057 return __riscv_vrgather(op1, index, vl);
1060 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vx_u32m2
1061 // CHECK-RV64-SAME: (<vscale x 4 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1062 // CHECK-RV64-NEXT: entry:
1063 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1064 // CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
1066 vuint32m2_t test_vrgather_vx_u32m2(vuint32m2_t op1, size_t index, size_t vl) {
1067 return __riscv_vrgather(op1, index, vl);
1070 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vv_u32m4
1071 // CHECK-RV64-SAME: (<vscale x 8 x i32> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1072 // CHECK-RV64-NEXT: entry:
1073 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], <vscale x 8 x i32> [[INDEX]], i64 [[VL]])
1074 // CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
1076 vuint32m4_t test_vrgather_vv_u32m4(vuint32m4_t op1, vuint32m4_t index, size_t vl) {
1077 return __riscv_vrgather(op1, index, vl);
1080 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vx_u32m4
1081 // CHECK-RV64-SAME: (<vscale x 8 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1082 // CHECK-RV64-NEXT: entry:
1083 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1084 // CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
1086 vuint32m4_t test_vrgather_vx_u32m4(vuint32m4_t op1, size_t index, size_t vl) {
1087 return __riscv_vrgather(op1, index, vl);
1090 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vv_u32m8
1091 // CHECK-RV64-SAME: (<vscale x 16 x i32> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1092 // CHECK-RV64-NEXT: entry:
1093 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], <vscale x 16 x i32> [[INDEX]], i64 [[VL]])
1094 // CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
1096 vuint32m8_t test_vrgather_vv_u32m8(vuint32m8_t op1, vuint32m8_t index, size_t vl) {
1097 return __riscv_vrgather(op1, index, vl);
1100 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vx_u32m8
1101 // CHECK-RV64-SAME: (<vscale x 16 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1102 // CHECK-RV64-NEXT: entry:
1103 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1104 // CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
1106 vuint32m8_t test_vrgather_vx_u32m8(vuint32m8_t op1, size_t index, size_t vl) {
1107 return __riscv_vrgather(op1, index, vl);
1110 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vv_u64m1
1111 // CHECK-RV64-SAME: (<vscale x 1 x i64> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1112 // CHECK-RV64-NEXT: entry:
1113 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], <vscale x 1 x i64> [[INDEX]], i64 [[VL]])
1114 // CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
1116 vuint64m1_t test_vrgather_vv_u64m1(vuint64m1_t op1, vuint64m1_t index, size_t vl) {
1117 return __riscv_vrgather(op1, index, vl);
1120 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vx_u64m1
1121 // CHECK-RV64-SAME: (<vscale x 1 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1122 // CHECK-RV64-NEXT: entry:
1123 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1124 // CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
1126 vuint64m1_t test_vrgather_vx_u64m1(vuint64m1_t op1, size_t index, size_t vl) {
1127 return __riscv_vrgather(op1, index, vl);
1130 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vv_u64m2
1131 // CHECK-RV64-SAME: (<vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1132 // CHECK-RV64-NEXT: entry:
1133 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], <vscale x 2 x i64> [[INDEX]], i64 [[VL]])
1134 // CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
1136 vuint64m2_t test_vrgather_vv_u64m2(vuint64m2_t op1, vuint64m2_t index, size_t vl) {
1137 return __riscv_vrgather(op1, index, vl);
1140 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vx_u64m2
1141 // CHECK-RV64-SAME: (<vscale x 2 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1142 // CHECK-RV64-NEXT: entry:
1143 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1144 // CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
1146 vuint64m2_t test_vrgather_vx_u64m2(vuint64m2_t op1, size_t index, size_t vl) {
1147 return __riscv_vrgather(op1, index, vl);
1150 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vv_u64m4
1151 // CHECK-RV64-SAME: (<vscale x 4 x i64> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1152 // CHECK-RV64-NEXT: entry:
1153 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], <vscale x 4 x i64> [[INDEX]], i64 [[VL]])
1154 // CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
1156 vuint64m4_t test_vrgather_vv_u64m4(vuint64m4_t op1, vuint64m4_t index, size_t vl) {
1157 return __riscv_vrgather(op1, index, vl);
1160 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vx_u64m4
1161 // CHECK-RV64-SAME: (<vscale x 4 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1162 // CHECK-RV64-NEXT: entry:
1163 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1164 // CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
1166 vuint64m4_t test_vrgather_vx_u64m4(vuint64m4_t op1, size_t index, size_t vl) {
1167 return __riscv_vrgather(op1, index, vl);
1170 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vv_u64m8
1171 // CHECK-RV64-SAME: (<vscale x 8 x i64> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1172 // CHECK-RV64-NEXT: entry:
1173 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], <vscale x 8 x i64> [[INDEX]], i64 [[VL]])
1174 // CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
1176 vuint64m8_t test_vrgather_vv_u64m8(vuint64m8_t op1, vuint64m8_t index, size_t vl) {
1177 return __riscv_vrgather(op1, index, vl);
1180 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vx_u64m8
1181 // CHECK-RV64-SAME: (<vscale x 8 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1182 // CHECK-RV64-NEXT: entry:
1183 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], i64 [[INDEX]], i64 [[VL]])
1184 // CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
1186 vuint64m8_t test_vrgather_vx_u64m8(vuint64m8_t op1, size_t index, size_t vl) {
1187 return __riscv_vrgather(op1, index, vl);
1190 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vrgather_vv_f16mf4_m
1191 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x half> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1192 // CHECK-RV64-NEXT: entry:
1193 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vrgather.vv.mask.nxv1f16.i64(<vscale x 1 x half> poison, <vscale x 1 x half> [[OP1]], <vscale x 1 x i16> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1194 // CHECK-RV64-NEXT: ret <vscale x 1 x half> [[TMP0]]
1196 vfloat16mf4_t test_vrgather_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, vuint16mf4_t index, size_t vl) {
1197 return __riscv_vrgather(mask, op1, index, vl);
1200 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x half> @test_vrgather_vx_f16mf4_m
1201 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1202 // CHECK-RV64-NEXT: entry:
1203 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x half> @llvm.riscv.vrgather.vx.mask.nxv1f16.i64(<vscale x 1 x half> poison, <vscale x 1 x half> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1204 // CHECK-RV64-NEXT: ret <vscale x 1 x half> [[TMP0]]
1206 vfloat16mf4_t test_vrgather_vx_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, size_t index, size_t vl) {
1207 return __riscv_vrgather(mask, op1, index, vl);
1210 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vrgather_vv_f16mf2_m
1211 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x half> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1212 // CHECK-RV64-NEXT: entry:
1213 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vrgather.vv.mask.nxv2f16.i64(<vscale x 2 x half> poison, <vscale x 2 x half> [[OP1]], <vscale x 2 x i16> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1214 // CHECK-RV64-NEXT: ret <vscale x 2 x half> [[TMP0]]
1216 vfloat16mf2_t test_vrgather_vv_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, vuint16mf2_t index, size_t vl) {
1217 return __riscv_vrgather(mask, op1, index, vl);
1220 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x half> @test_vrgather_vx_f16mf2_m
1221 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1222 // CHECK-RV64-NEXT: entry:
1223 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x half> @llvm.riscv.vrgather.vx.mask.nxv2f16.i64(<vscale x 2 x half> poison, <vscale x 2 x half> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1224 // CHECK-RV64-NEXT: ret <vscale x 2 x half> [[TMP0]]
1226 vfloat16mf2_t test_vrgather_vx_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, size_t index, size_t vl) {
1227 return __riscv_vrgather(mask, op1, index, vl);
1230 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vrgather_vv_f16m1_m
1231 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x half> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1232 // CHECK-RV64-NEXT: entry:
1233 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vrgather.vv.mask.nxv4f16.i64(<vscale x 4 x half> poison, <vscale x 4 x half> [[OP1]], <vscale x 4 x i16> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1234 // CHECK-RV64-NEXT: ret <vscale x 4 x half> [[TMP0]]
1236 vfloat16m1_t test_vrgather_vv_f16m1_m(vbool16_t mask, vfloat16m1_t op1, vuint16m1_t index, size_t vl) {
1237 return __riscv_vrgather(mask, op1, index, vl);
1240 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x half> @test_vrgather_vx_f16m1_m
1241 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1242 // CHECK-RV64-NEXT: entry:
1243 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x half> @llvm.riscv.vrgather.vx.mask.nxv4f16.i64(<vscale x 4 x half> poison, <vscale x 4 x half> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1244 // CHECK-RV64-NEXT: ret <vscale x 4 x half> [[TMP0]]
1246 vfloat16m1_t test_vrgather_vx_f16m1_m(vbool16_t mask, vfloat16m1_t op1, size_t index, size_t vl) {
1247 return __riscv_vrgather(mask, op1, index, vl);
1250 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vrgather_vv_f16m2_m
1251 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x half> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1252 // CHECK-RV64-NEXT: entry:
1253 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vrgather.vv.mask.nxv8f16.i64(<vscale x 8 x half> poison, <vscale x 8 x half> [[OP1]], <vscale x 8 x i16> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1254 // CHECK-RV64-NEXT: ret <vscale x 8 x half> [[TMP0]]
1256 vfloat16m2_t test_vrgather_vv_f16m2_m(vbool8_t mask, vfloat16m2_t op1, vuint16m2_t index, size_t vl) {
1257 return __riscv_vrgather(mask, op1, index, vl);
1260 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x half> @test_vrgather_vx_f16m2_m
1261 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1262 // CHECK-RV64-NEXT: entry:
1263 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x half> @llvm.riscv.vrgather.vx.mask.nxv8f16.i64(<vscale x 8 x half> poison, <vscale x 8 x half> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1264 // CHECK-RV64-NEXT: ret <vscale x 8 x half> [[TMP0]]
1266 vfloat16m2_t test_vrgather_vx_f16m2_m(vbool8_t mask, vfloat16m2_t op1, size_t index, size_t vl) {
1267 return __riscv_vrgather(mask, op1, index, vl);
1270 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vrgather_vv_f16m4_m
1271 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x half> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1272 // CHECK-RV64-NEXT: entry:
1273 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.riscv.vrgather.vv.mask.nxv16f16.i64(<vscale x 16 x half> poison, <vscale x 16 x half> [[OP1]], <vscale x 16 x i16> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1274 // CHECK-RV64-NEXT: ret <vscale x 16 x half> [[TMP0]]
1276 vfloat16m4_t test_vrgather_vv_f16m4_m(vbool4_t mask, vfloat16m4_t op1, vuint16m4_t index, size_t vl) {
1277 return __riscv_vrgather(mask, op1, index, vl);
1280 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x half> @test_vrgather_vx_f16m4_m
1281 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1282 // CHECK-RV64-NEXT: entry:
1283 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x half> @llvm.riscv.vrgather.vx.mask.nxv16f16.i64(<vscale x 16 x half> poison, <vscale x 16 x half> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1284 // CHECK-RV64-NEXT: ret <vscale x 16 x half> [[TMP0]]
1286 vfloat16m4_t test_vrgather_vx_f16m4_m(vbool4_t mask, vfloat16m4_t op1, size_t index, size_t vl) {
1287 return __riscv_vrgather(mask, op1, index, vl);
1290 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vrgather_vv_f16m8_m
1291 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x half> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1292 // CHECK-RV64-NEXT: entry:
1293 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.vrgather.vv.mask.nxv32f16.i64(<vscale x 32 x half> poison, <vscale x 32 x half> [[OP1]], <vscale x 32 x i16> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
1294 // CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP0]]
1296 vfloat16m8_t test_vrgather_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, vuint16m8_t index, size_t vl) {
1297 return __riscv_vrgather(mask, op1, index, vl);
1300 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x half> @test_vrgather_vx_f16m8_m
1301 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x half> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1302 // CHECK-RV64-NEXT: entry:
1303 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x half> @llvm.riscv.vrgather.vx.mask.nxv32f16.i64(<vscale x 32 x half> poison, <vscale x 32 x half> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
1304 // CHECK-RV64-NEXT: ret <vscale x 32 x half> [[TMP0]]
1306 vfloat16m8_t test_vrgather_vx_f16m8_m(vbool2_t mask, vfloat16m8_t op1, size_t index, size_t vl) {
1307 return __riscv_vrgather(mask, op1, index, vl);
1310 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vrgather_vv_f32mf2_m
1311 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x float> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1312 // CHECK-RV64-NEXT: entry:
1313 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vrgather.vv.mask.nxv1f32.i64(<vscale x 1 x float> poison, <vscale x 1 x float> [[OP1]], <vscale x 1 x i32> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1314 // CHECK-RV64-NEXT: ret <vscale x 1 x float> [[TMP0]]
1316 vfloat32mf2_t test_vrgather_vv_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, vuint32mf2_t index, size_t vl) {
1317 return __riscv_vrgather(mask, op1, index, vl);
1320 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x float> @test_vrgather_vx_f32mf2_m
1321 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1322 // CHECK-RV64-NEXT: entry:
1323 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x float> @llvm.riscv.vrgather.vx.mask.nxv1f32.i64(<vscale x 1 x float> poison, <vscale x 1 x float> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1324 // CHECK-RV64-NEXT: ret <vscale x 1 x float> [[TMP0]]
1326 vfloat32mf2_t test_vrgather_vx_f32mf2_m(vbool64_t mask, vfloat32mf2_t op1, size_t index, size_t vl) {
1327 return __riscv_vrgather(mask, op1, index, vl);
1330 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vrgather_vv_f32m1_m
1331 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x float> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1332 // CHECK-RV64-NEXT: entry:
1333 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vrgather.vv.mask.nxv2f32.i64(<vscale x 2 x float> poison, <vscale x 2 x float> [[OP1]], <vscale x 2 x i32> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1334 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
1336 vfloat32m1_t test_vrgather_vv_f32m1_m(vbool32_t mask, vfloat32m1_t op1, vuint32m1_t index, size_t vl) {
1337 return __riscv_vrgather(mask, op1, index, vl);
1340 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x float> @test_vrgather_vx_f32m1_m
1341 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1342 // CHECK-RV64-NEXT: entry:
1343 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vrgather.vx.mask.nxv2f32.i64(<vscale x 2 x float> poison, <vscale x 2 x float> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1344 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
1346 vfloat32m1_t test_vrgather_vx_f32m1_m(vbool32_t mask, vfloat32m1_t op1, size_t index, size_t vl) {
1347 return __riscv_vrgather(mask, op1, index, vl);
1350 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vrgather_vv_f32m2_m
1351 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x float> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1352 // CHECK-RV64-NEXT: entry:
1353 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vrgather.vv.mask.nxv4f32.i64(<vscale x 4 x float> poison, <vscale x 4 x float> [[OP1]], <vscale x 4 x i32> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1354 // CHECK-RV64-NEXT: ret <vscale x 4 x float> [[TMP0]]
1356 vfloat32m2_t test_vrgather_vv_f32m2_m(vbool16_t mask, vfloat32m2_t op1, vuint32m2_t index, size_t vl) {
1357 return __riscv_vrgather(mask, op1, index, vl);
1360 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x float> @test_vrgather_vx_f32m2_m
1361 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1362 // CHECK-RV64-NEXT: entry:
1363 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x float> @llvm.riscv.vrgather.vx.mask.nxv4f32.i64(<vscale x 4 x float> poison, <vscale x 4 x float> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1364 // CHECK-RV64-NEXT: ret <vscale x 4 x float> [[TMP0]]
1366 vfloat32m2_t test_vrgather_vx_f32m2_m(vbool16_t mask, vfloat32m2_t op1, size_t index, size_t vl) {
1367 return __riscv_vrgather(mask, op1, index, vl);
1370 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vrgather_vv_f32m4_m
1371 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x float> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1372 // CHECK-RV64-NEXT: entry:
1373 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vrgather.vv.mask.nxv8f32.i64(<vscale x 8 x float> poison, <vscale x 8 x float> [[OP1]], <vscale x 8 x i32> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1374 // CHECK-RV64-NEXT: ret <vscale x 8 x float> [[TMP0]]
1376 vfloat32m4_t test_vrgather_vv_f32m4_m(vbool8_t mask, vfloat32m4_t op1, vuint32m4_t index, size_t vl) {
1377 return __riscv_vrgather(mask, op1, index, vl);
1380 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x float> @test_vrgather_vx_f32m4_m
1381 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1382 // CHECK-RV64-NEXT: entry:
1383 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x float> @llvm.riscv.vrgather.vx.mask.nxv8f32.i64(<vscale x 8 x float> poison, <vscale x 8 x float> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1384 // CHECK-RV64-NEXT: ret <vscale x 8 x float> [[TMP0]]
1386 vfloat32m4_t test_vrgather_vx_f32m4_m(vbool8_t mask, vfloat32m4_t op1, size_t index, size_t vl) {
1387 return __riscv_vrgather(mask, op1, index, vl);
1390 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vrgather_vv_f32m8_m
1391 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x float> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1392 // CHECK-RV64-NEXT: entry:
1393 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.vrgather.vv.mask.nxv16f32.i64(<vscale x 16 x float> poison, <vscale x 16 x float> [[OP1]], <vscale x 16 x i32> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1394 // CHECK-RV64-NEXT: ret <vscale x 16 x float> [[TMP0]]
1396 vfloat32m8_t test_vrgather_vv_f32m8_m(vbool4_t mask, vfloat32m8_t op1, vuint32m8_t index, size_t vl) {
1397 return __riscv_vrgather(mask, op1, index, vl);
1400 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x float> @test_vrgather_vx_f32m8_m
1401 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x float> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1402 // CHECK-RV64-NEXT: entry:
1403 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x float> @llvm.riscv.vrgather.vx.mask.nxv16f32.i64(<vscale x 16 x float> poison, <vscale x 16 x float> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1404 // CHECK-RV64-NEXT: ret <vscale x 16 x float> [[TMP0]]
1406 vfloat32m8_t test_vrgather_vx_f32m8_m(vbool4_t mask, vfloat32m8_t op1, size_t index, size_t vl) {
1407 return __riscv_vrgather(mask, op1, index, vl);
1410 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vrgather_vv_f64m1_m
1411 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x double> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1412 // CHECK-RV64-NEXT: entry:
1413 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vrgather.vv.mask.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> [[OP1]], <vscale x 1 x i64> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1414 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
1416 vfloat64m1_t test_vrgather_vv_f64m1_m(vbool64_t mask, vfloat64m1_t op1, vuint64m1_t index, size_t vl) {
1417 return __riscv_vrgather(mask, op1, index, vl);
1420 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x double> @test_vrgather_vx_f64m1_m
1421 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1422 // CHECK-RV64-NEXT: entry:
1423 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vrgather.vx.mask.nxv1f64.i64(<vscale x 1 x double> poison, <vscale x 1 x double> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1424 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
1426 vfloat64m1_t test_vrgather_vx_f64m1_m(vbool64_t mask, vfloat64m1_t op1, size_t index, size_t vl) {
1427 return __riscv_vrgather(mask, op1, index, vl);
1430 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vrgather_vv_f64m2_m
1431 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x double> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1432 // CHECK-RV64-NEXT: entry:
1433 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vrgather.vv.mask.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> [[OP1]], <vscale x 2 x i64> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1434 // CHECK-RV64-NEXT: ret <vscale x 2 x double> [[TMP0]]
1436 vfloat64m2_t test_vrgather_vv_f64m2_m(vbool32_t mask, vfloat64m2_t op1, vuint64m2_t index, size_t vl) {
1437 return __riscv_vrgather(mask, op1, index, vl);
1440 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x double> @test_vrgather_vx_f64m2_m
1441 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1442 // CHECK-RV64-NEXT: entry:
1443 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x double> @llvm.riscv.vrgather.vx.mask.nxv2f64.i64(<vscale x 2 x double> poison, <vscale x 2 x double> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1444 // CHECK-RV64-NEXT: ret <vscale x 2 x double> [[TMP0]]
1446 vfloat64m2_t test_vrgather_vx_f64m2_m(vbool32_t mask, vfloat64m2_t op1, size_t index, size_t vl) {
1447 return __riscv_vrgather(mask, op1, index, vl);
1450 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vrgather_vv_f64m4_m
1451 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x double> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1452 // CHECK-RV64-NEXT: entry:
1453 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vrgather.vv.mask.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> [[OP1]], <vscale x 4 x i64> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1454 // CHECK-RV64-NEXT: ret <vscale x 4 x double> [[TMP0]]
1456 vfloat64m4_t test_vrgather_vv_f64m4_m(vbool16_t mask, vfloat64m4_t op1, vuint64m4_t index, size_t vl) {
1457 return __riscv_vrgather(mask, op1, index, vl);
1460 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x double> @test_vrgather_vx_f64m4_m
1461 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1462 // CHECK-RV64-NEXT: entry:
1463 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x double> @llvm.riscv.vrgather.vx.mask.nxv4f64.i64(<vscale x 4 x double> poison, <vscale x 4 x double> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1464 // CHECK-RV64-NEXT: ret <vscale x 4 x double> [[TMP0]]
1466 vfloat64m4_t test_vrgather_vx_f64m4_m(vbool16_t mask, vfloat64m4_t op1, size_t index, size_t vl) {
1467 return __riscv_vrgather(mask, op1, index, vl);
1470 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vrgather_vv_f64m8_m
1471 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x double> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1472 // CHECK-RV64-NEXT: entry:
1473 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vrgather.vv.mask.nxv8f64.i64(<vscale x 8 x double> poison, <vscale x 8 x double> [[OP1]], <vscale x 8 x i64> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1474 // CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]
1476 vfloat64m8_t test_vrgather_vv_f64m8_m(vbool8_t mask, vfloat64m8_t op1, vuint64m8_t index, size_t vl) {
1477 return __riscv_vrgather(mask, op1, index, vl);
1480 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x double> @test_vrgather_vx_f64m8_m
1481 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x double> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1482 // CHECK-RV64-NEXT: entry:
1483 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x double> @llvm.riscv.vrgather.vx.mask.nxv8f64.i64(<vscale x 8 x double> poison, <vscale x 8 x double> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1484 // CHECK-RV64-NEXT: ret <vscale x 8 x double> [[TMP0]]
1486 vfloat64m8_t test_vrgather_vx_f64m8_m(vbool8_t mask, vfloat64m8_t op1, size_t index, size_t vl) {
1487 return __riscv_vrgather(mask, op1, index, vl);
1490 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vv_i8mf8_m
1491 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i8> [[OP1:%.*]], <vscale x 1 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1492 // CHECK-RV64-NEXT: entry:
1493 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.mask.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], <vscale x 1 x i8> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1494 // CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]
1496 vint8mf8_t test_vrgather_vv_i8mf8_m(vbool64_t mask, vint8mf8_t op1, vuint8mf8_t index, size_t vl) {
1497 return __riscv_vrgather(mask, op1, index, vl);
1500 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vx_i8mf8_m
1501 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1502 // CHECK-RV64-NEXT: entry:
1503 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.mask.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1504 // CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]
1506 vint8mf8_t test_vrgather_vx_i8mf8_m(vbool64_t mask, vint8mf8_t op1, size_t index, size_t vl) {
1507 return __riscv_vrgather(mask, op1, index, vl);
1510 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vv_i8mf4_m
1511 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i8> [[OP1:%.*]], <vscale x 2 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1512 // CHECK-RV64-NEXT: entry:
1513 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.mask.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], <vscale x 2 x i8> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1514 // CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]
1516 vint8mf4_t test_vrgather_vv_i8mf4_m(vbool32_t mask, vint8mf4_t op1, vuint8mf4_t index, size_t vl) {
1517 return __riscv_vrgather(mask, op1, index, vl);
1520 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vx_i8mf4_m
1521 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1522 // CHECK-RV64-NEXT: entry:
1523 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.mask.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1524 // CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]
1526 vint8mf4_t test_vrgather_vx_i8mf4_m(vbool32_t mask, vint8mf4_t op1, size_t index, size_t vl) {
1527 return __riscv_vrgather(mask, op1, index, vl);
1530 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vv_i8mf2_m
1531 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i8> [[OP1:%.*]], <vscale x 4 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1532 // CHECK-RV64-NEXT: entry:
1533 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.mask.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], <vscale x 4 x i8> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1534 // CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]
1536 vint8mf2_t test_vrgather_vv_i8mf2_m(vbool16_t mask, vint8mf2_t op1, vuint8mf2_t index, size_t vl) {
1537 return __riscv_vrgather(mask, op1, index, vl);
1540 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vx_i8mf2_m
1541 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1542 // CHECK-RV64-NEXT: entry:
1543 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.mask.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1544 // CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]
1546 vint8mf2_t test_vrgather_vx_i8mf2_m(vbool16_t mask, vint8mf2_t op1, size_t index, size_t vl) {
1547 return __riscv_vrgather(mask, op1, index, vl);
1550 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vv_i8m1_m
1551 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i8> [[OP1:%.*]], <vscale x 8 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1552 // CHECK-RV64-NEXT: entry:
1553 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.mask.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], <vscale x 8 x i8> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1554 // CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]
1556 vint8m1_t test_vrgather_vv_i8m1_m(vbool8_t mask, vint8m1_t op1, vuint8m1_t index, size_t vl) {
1557 return __riscv_vrgather(mask, op1, index, vl);
1560 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vx_i8m1_m
1561 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1562 // CHECK-RV64-NEXT: entry:
1563 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.mask.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1564 // CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]
1566 vint8m1_t test_vrgather_vx_i8m1_m(vbool8_t mask, vint8m1_t op1, size_t index, size_t vl) {
1567 return __riscv_vrgather(mask, op1, index, vl);
1570 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vv_i8m2_m
1571 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1572 // CHECK-RV64-NEXT: entry:
1573 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.mask.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], <vscale x 16 x i8> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1574 // CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]
1576 vint8m2_t test_vrgather_vv_i8m2_m(vbool4_t mask, vint8m2_t op1, vuint8m2_t index, size_t vl) {
1577 return __riscv_vrgather(mask, op1, index, vl);
1580 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vx_i8m2_m
1581 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1582 // CHECK-RV64-NEXT: entry:
1583 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.mask.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1584 // CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]
1586 vint8m2_t test_vrgather_vx_i8m2_m(vbool4_t mask, vint8m2_t op1, size_t index, size_t vl) {
1587 return __riscv_vrgather(mask, op1, index, vl);
1590 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vv_i8m4_m
1591 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i8> [[OP1:%.*]], <vscale x 32 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1592 // CHECK-RV64-NEXT: entry:
1593 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.mask.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], <vscale x 32 x i8> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
1594 // CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]
1596 vint8m4_t test_vrgather_vv_i8m4_m(vbool2_t mask, vint8m4_t op1, vuint8m4_t index, size_t vl) {
1597 return __riscv_vrgather(mask, op1, index, vl);
1600 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vx_i8m4_m
1601 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1602 // CHECK-RV64-NEXT: entry:
1603 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.mask.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
1604 // CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]
1606 vint8m4_t test_vrgather_vx_i8m4_m(vbool2_t mask, vint8m4_t op1, size_t index, size_t vl) {
1607 return __riscv_vrgather(mask, op1, index, vl);
1610 // CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vv_i8m8_m
1611 // CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], <vscale x 64 x i8> [[OP1:%.*]], <vscale x 64 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1612 // CHECK-RV64-NEXT: entry:
1613 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.mask.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], <vscale x 64 x i8> [[INDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)
1614 // CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]
1616 vint8m8_t test_vrgather_vv_i8m8_m(vbool1_t mask, vint8m8_t op1, vuint8m8_t index, size_t vl) {
1617 return __riscv_vrgather(mask, op1, index, vl);
1620 // CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vx_i8m8_m
1621 // CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], <vscale x 64 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1622 // CHECK-RV64-NEXT: entry:
1623 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.mask.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], i64 [[INDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)
1624 // CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]
1626 vint8m8_t test_vrgather_vx_i8m8_m(vbool1_t mask, vint8m8_t op1, size_t index, size_t vl) {
1627 return __riscv_vrgather(mask, op1, index, vl);
1630 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vv_i16mf4_m
1631 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i16> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1632 // CHECK-RV64-NEXT: entry:
1633 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.mask.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], <vscale x 1 x i16> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1634 // CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
1636 vint16mf4_t test_vrgather_vv_i16mf4_m(vbool64_t mask, vint16mf4_t op1, vuint16mf4_t index, size_t vl) {
1637 return __riscv_vrgather(mask, op1, index, vl);
1640 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vx_i16mf4_m
1641 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1642 // CHECK-RV64-NEXT: entry:
1643 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.mask.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1644 // CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
1646 vint16mf4_t test_vrgather_vx_i16mf4_m(vbool64_t mask, vint16mf4_t op1, size_t index, size_t vl) {
1647 return __riscv_vrgather(mask, op1, index, vl);
1650 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vv_i16mf2_m
1651 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i16> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1652 // CHECK-RV64-NEXT: entry:
1653 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.mask.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], <vscale x 2 x i16> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1654 // CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
1656 vint16mf2_t test_vrgather_vv_i16mf2_m(vbool32_t mask, vint16mf2_t op1, vuint16mf2_t index, size_t vl) {
1657 return __riscv_vrgather(mask, op1, index, vl);
1660 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vx_i16mf2_m
1661 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1662 // CHECK-RV64-NEXT: entry:
1663 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.mask.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1664 // CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
1666 vint16mf2_t test_vrgather_vx_i16mf2_m(vbool32_t mask, vint16mf2_t op1, size_t index, size_t vl) {
1667 return __riscv_vrgather(mask, op1, index, vl);
1670 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vv_i16m1_m
1671 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i16> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1672 // CHECK-RV64-NEXT: entry:
1673 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.mask.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], <vscale x 4 x i16> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1674 // CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
1676 vint16m1_t test_vrgather_vv_i16m1_m(vbool16_t mask, vint16m1_t op1, vuint16m1_t index, size_t vl) {
1677 return __riscv_vrgather(mask, op1, index, vl);
1680 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vx_i16m1_m
1681 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1682 // CHECK-RV64-NEXT: entry:
1683 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.mask.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1684 // CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
1686 vint16m1_t test_vrgather_vx_i16m1_m(vbool16_t mask, vint16m1_t op1, size_t index, size_t vl) {
1687 return __riscv_vrgather(mask, op1, index, vl);
1690 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vv_i16m2_m
1691 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1692 // CHECK-RV64-NEXT: entry:
1693 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.mask.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], <vscale x 8 x i16> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1694 // CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
1696 vint16m2_t test_vrgather_vv_i16m2_m(vbool8_t mask, vint16m2_t op1, vuint16m2_t index, size_t vl) {
1697 return __riscv_vrgather(mask, op1, index, vl);
1700 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vx_i16m2_m
1701 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1702 // CHECK-RV64-NEXT: entry:
1703 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.mask.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1704 // CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
1706 vint16m2_t test_vrgather_vx_i16m2_m(vbool8_t mask, vint16m2_t op1, size_t index, size_t vl) {
1707 return __riscv_vrgather(mask, op1, index, vl);
1710 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vv_i16m4_m
1711 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i16> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1712 // CHECK-RV64-NEXT: entry:
1713 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.mask.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], <vscale x 16 x i16> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1714 // CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
1716 vint16m4_t test_vrgather_vv_i16m4_m(vbool4_t mask, vint16m4_t op1, vuint16m4_t index, size_t vl) {
1717 return __riscv_vrgather(mask, op1, index, vl);
1720 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vx_i16m4_m
1721 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1722 // CHECK-RV64-NEXT: entry:
1723 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.mask.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1724 // CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
1726 vint16m4_t test_vrgather_vx_i16m4_m(vbool4_t mask, vint16m4_t op1, size_t index, size_t vl) {
1727 return __riscv_vrgather(mask, op1, index, vl);
1730 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vv_i16m8_m
1731 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i16> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1732 // CHECK-RV64-NEXT: entry:
1733 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.mask.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], <vscale x 32 x i16> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
1734 // CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
1736 vint16m8_t test_vrgather_vv_i16m8_m(vbool2_t mask, vint16m8_t op1, vuint16m8_t index, size_t vl) {
1737 return __riscv_vrgather(mask, op1, index, vl);
1740 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vx_i16m8_m
1741 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1742 // CHECK-RV64-NEXT: entry:
1743 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.mask.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
1744 // CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
1746 vint16m8_t test_vrgather_vx_i16m8_m(vbool2_t mask, vint16m8_t op1, size_t index, size_t vl) {
1747 return __riscv_vrgather(mask, op1, index, vl);
1750 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vv_i32mf2_m
1751 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i32> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1752 // CHECK-RV64-NEXT: entry:
1753 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.mask.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], <vscale x 1 x i32> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1754 // CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
1756 vint32mf2_t test_vrgather_vv_i32mf2_m(vbool64_t mask, vint32mf2_t op1, vuint32mf2_t index, size_t vl) {
1757 return __riscv_vrgather(mask, op1, index, vl);
1760 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vx_i32mf2_m
1761 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1762 // CHECK-RV64-NEXT: entry:
1763 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.mask.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1764 // CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
1766 vint32mf2_t test_vrgather_vx_i32mf2_m(vbool64_t mask, vint32mf2_t op1, size_t index, size_t vl) {
1767 return __riscv_vrgather(mask, op1, index, vl);
1770 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vv_i32m1_m
1771 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i32> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1772 // CHECK-RV64-NEXT: entry:
1773 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.mask.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], <vscale x 2 x i32> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1774 // CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
1776 vint32m1_t test_vrgather_vv_i32m1_m(vbool32_t mask, vint32m1_t op1, vuint32m1_t index, size_t vl) {
1777 return __riscv_vrgather(mask, op1, index, vl);
1780 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vx_i32m1_m
1781 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1782 // CHECK-RV64-NEXT: entry:
1783 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.mask.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1784 // CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
1786 vint32m1_t test_vrgather_vx_i32m1_m(vbool32_t mask, vint32m1_t op1, size_t index, size_t vl) {
1787 return __riscv_vrgather(mask, op1, index, vl);
1790 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vv_i32m2_m
1791 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1792 // CHECK-RV64-NEXT: entry:
1793 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.mask.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], <vscale x 4 x i32> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1794 // CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
1796 vint32m2_t test_vrgather_vv_i32m2_m(vbool16_t mask, vint32m2_t op1, vuint32m2_t index, size_t vl) {
1797 return __riscv_vrgather(mask, op1, index, vl);
1800 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vx_i32m2_m
1801 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1802 // CHECK-RV64-NEXT: entry:
1803 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.mask.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1804 // CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
1806 vint32m2_t test_vrgather_vx_i32m2_m(vbool16_t mask, vint32m2_t op1, size_t index, size_t vl) {
1807 return __riscv_vrgather(mask, op1, index, vl);
1810 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vv_i32m4_m
1811 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i32> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1812 // CHECK-RV64-NEXT: entry:
1813 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.mask.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], <vscale x 8 x i32> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1814 // CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
1816 vint32m4_t test_vrgather_vv_i32m4_m(vbool8_t mask, vint32m4_t op1, vuint32m4_t index, size_t vl) {
1817 return __riscv_vrgather(mask, op1, index, vl);
1820 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vx_i32m4_m
1821 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1822 // CHECK-RV64-NEXT: entry:
1823 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.mask.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1824 // CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
1826 vint32m4_t test_vrgather_vx_i32m4_m(vbool8_t mask, vint32m4_t op1, size_t index, size_t vl) {
1827 return __riscv_vrgather(mask, op1, index, vl);
1830 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vv_i32m8_m
1831 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i32> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1832 // CHECK-RV64-NEXT: entry:
1833 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.mask.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], <vscale x 16 x i32> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1834 // CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
1836 vint32m8_t test_vrgather_vv_i32m8_m(vbool4_t mask, vint32m8_t op1, vuint32m8_t index, size_t vl) {
1837 return __riscv_vrgather(mask, op1, index, vl);
1840 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vx_i32m8_m
1841 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1842 // CHECK-RV64-NEXT: entry:
1843 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.mask.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
1844 // CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
1846 vint32m8_t test_vrgather_vx_i32m8_m(vbool4_t mask, vint32m8_t op1, size_t index, size_t vl) {
1847 return __riscv_vrgather(mask, op1, index, vl);
1850 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vv_i64m1_m
1851 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i64> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1852 // CHECK-RV64-NEXT: entry:
1853 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], <vscale x 1 x i64> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1854 // CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
1856 vint64m1_t test_vrgather_vv_i64m1_m(vbool64_t mask, vint64m1_t op1, vuint64m1_t index, size_t vl) {
1857 return __riscv_vrgather(mask, op1, index, vl);
1860 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vx_i64m1_m
1861 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1862 // CHECK-RV64-NEXT: entry:
1863 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1864 // CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
1866 vint64m1_t test_vrgather_vx_i64m1_m(vbool64_t mask, vint64m1_t op1, size_t index, size_t vl) {
1867 return __riscv_vrgather(mask, op1, index, vl);
1870 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vv_i64m2_m
1871 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1872 // CHECK-RV64-NEXT: entry:
1873 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], <vscale x 2 x i64> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1874 // CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
1876 vint64m2_t test_vrgather_vv_i64m2_m(vbool32_t mask, vint64m2_t op1, vuint64m2_t index, size_t vl) {
1877 return __riscv_vrgather(mask, op1, index, vl);
1880 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vx_i64m2_m
1881 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1882 // CHECK-RV64-NEXT: entry:
1883 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1884 // CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
1886 vint64m2_t test_vrgather_vx_i64m2_m(vbool32_t mask, vint64m2_t op1, size_t index, size_t vl) {
1887 return __riscv_vrgather(mask, op1, index, vl);
1890 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vv_i64m4_m
1891 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i64> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1892 // CHECK-RV64-NEXT: entry:
1893 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], <vscale x 4 x i64> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1894 // CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
1896 vint64m4_t test_vrgather_vv_i64m4_m(vbool16_t mask, vint64m4_t op1, vuint64m4_t index, size_t vl) {
1897 return __riscv_vrgather(mask, op1, index, vl);
1900 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vx_i64m4_m
1901 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1902 // CHECK-RV64-NEXT: entry:
1903 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1904 // CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
1906 vint64m4_t test_vrgather_vx_i64m4_m(vbool16_t mask, vint64m4_t op1, size_t index, size_t vl) {
1907 return __riscv_vrgather(mask, op1, index, vl);
1910 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vv_i64m8_m
1911 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i64> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1912 // CHECK-RV64-NEXT: entry:
1913 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.mask.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], <vscale x 8 x i64> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1914 // CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
1916 vint64m8_t test_vrgather_vv_i64m8_m(vbool8_t mask, vint64m8_t op1, vuint64m8_t index, size_t vl) {
1917 return __riscv_vrgather(mask, op1, index, vl);
1920 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vx_i64m8_m
1921 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1922 // CHECK-RV64-NEXT: entry:
1923 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.mask.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1924 // CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
1926 vint64m8_t test_vrgather_vx_i64m8_m(vbool8_t mask, vint64m8_t op1, size_t index, size_t vl) {
1927 return __riscv_vrgather(mask, op1, index, vl);
1930 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vv_u8mf8_m
1931 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i8> [[OP1:%.*]], <vscale x 1 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1932 // CHECK-RV64-NEXT: entry:
1933 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vv.mask.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], <vscale x 1 x i8> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1934 // CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]
1936 vuint8mf8_t test_vrgather_vv_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, vuint8mf8_t index, size_t vl) {
1937 return __riscv_vrgather(mask, op1, index, vl);
1940 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i8> @test_vrgather_vx_u8mf8_m
1941 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1942 // CHECK-RV64-NEXT: entry:
1943 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i8> @llvm.riscv.vrgather.vx.mask.nxv1i8.i64(<vscale x 1 x i8> poison, <vscale x 1 x i8> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
1944 // CHECK-RV64-NEXT: ret <vscale x 1 x i8> [[TMP0]]
1946 vuint8mf8_t test_vrgather_vx_u8mf8_m(vbool64_t mask, vuint8mf8_t op1, size_t index, size_t vl) {
1947 return __riscv_vrgather(mask, op1, index, vl);
1950 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vv_u8mf4_m
1951 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i8> [[OP1:%.*]], <vscale x 2 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1952 // CHECK-RV64-NEXT: entry:
1953 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vv.mask.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], <vscale x 2 x i8> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1954 // CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]
1956 vuint8mf4_t test_vrgather_vv_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, vuint8mf4_t index, size_t vl) {
1957 return __riscv_vrgather(mask, op1, index, vl);
1960 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i8> @test_vrgather_vx_u8mf4_m
1961 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1962 // CHECK-RV64-NEXT: entry:
1963 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i8> @llvm.riscv.vrgather.vx.mask.nxv2i8.i64(<vscale x 2 x i8> poison, <vscale x 2 x i8> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
1964 // CHECK-RV64-NEXT: ret <vscale x 2 x i8> [[TMP0]]
1966 vuint8mf4_t test_vrgather_vx_u8mf4_m(vbool32_t mask, vuint8mf4_t op1, size_t index, size_t vl) {
1967 return __riscv_vrgather(mask, op1, index, vl);
1970 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vv_u8mf2_m
1971 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i8> [[OP1:%.*]], <vscale x 4 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1972 // CHECK-RV64-NEXT: entry:
1973 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vv.mask.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], <vscale x 4 x i8> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1974 // CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]
1976 vuint8mf2_t test_vrgather_vv_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, vuint8mf2_t index, size_t vl) {
1977 return __riscv_vrgather(mask, op1, index, vl);
1980 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i8> @test_vrgather_vx_u8mf2_m
1981 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1982 // CHECK-RV64-NEXT: entry:
1983 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i8> @llvm.riscv.vrgather.vx.mask.nxv4i8.i64(<vscale x 4 x i8> poison, <vscale x 4 x i8> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
1984 // CHECK-RV64-NEXT: ret <vscale x 4 x i8> [[TMP0]]
1986 vuint8mf2_t test_vrgather_vx_u8mf2_m(vbool16_t mask, vuint8mf2_t op1, size_t index, size_t vl) {
1987 return __riscv_vrgather(mask, op1, index, vl);
1990 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vv_u8m1_m
1991 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i8> [[OP1:%.*]], <vscale x 8 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
1992 // CHECK-RV64-NEXT: entry:
1993 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vv.mask.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], <vscale x 8 x i8> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
1994 // CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]
1996 vuint8m1_t test_vrgather_vv_u8m1_m(vbool8_t mask, vuint8m1_t op1, vuint8m1_t index, size_t vl) {
1997 return __riscv_vrgather(mask, op1, index, vl);
2000 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i8> @test_vrgather_vx_u8m1_m
2001 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2002 // CHECK-RV64-NEXT: entry:
2003 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i8> @llvm.riscv.vrgather.vx.mask.nxv8i8.i64(<vscale x 8 x i8> poison, <vscale x 8 x i8> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2004 // CHECK-RV64-NEXT: ret <vscale x 8 x i8> [[TMP0]]
2006 vuint8m1_t test_vrgather_vx_u8m1_m(vbool8_t mask, vuint8m1_t op1, size_t index, size_t vl) {
2007 return __riscv_vrgather(mask, op1, index, vl);
2010 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vv_u8m2_m
2011 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i8> [[OP1:%.*]], <vscale x 16 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2012 // CHECK-RV64-NEXT: entry:
2013 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vv.mask.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], <vscale x 16 x i8> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
2014 // CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]
2016 vuint8m2_t test_vrgather_vv_u8m2_m(vbool4_t mask, vuint8m2_t op1, vuint8m2_t index, size_t vl) {
2017 return __riscv_vrgather(mask, op1, index, vl);
2020 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i8> @test_vrgather_vx_u8m2_m
2021 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2022 // CHECK-RV64-NEXT: entry:
2023 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i8> @llvm.riscv.vrgather.vx.mask.nxv16i8.i64(<vscale x 16 x i8> poison, <vscale x 16 x i8> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
2024 // CHECK-RV64-NEXT: ret <vscale x 16 x i8> [[TMP0]]
2026 vuint8m2_t test_vrgather_vx_u8m2_m(vbool4_t mask, vuint8m2_t op1, size_t index, size_t vl) {
2027 return __riscv_vrgather(mask, op1, index, vl);
2030 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vv_u8m4_m
2031 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i8> [[OP1:%.*]], <vscale x 32 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2032 // CHECK-RV64-NEXT: entry:
2033 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vv.mask.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], <vscale x 32 x i8> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
2034 // CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]
2036 vuint8m4_t test_vrgather_vv_u8m4_m(vbool2_t mask, vuint8m4_t op1, vuint8m4_t index, size_t vl) {
2037 return __riscv_vrgather(mask, op1, index, vl);
2040 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i8> @test_vrgather_vx_u8m4_m
2041 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2042 // CHECK-RV64-NEXT: entry:
2043 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i8> @llvm.riscv.vrgather.vx.mask.nxv32i8.i64(<vscale x 32 x i8> poison, <vscale x 32 x i8> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
2044 // CHECK-RV64-NEXT: ret <vscale x 32 x i8> [[TMP0]]
2046 vuint8m4_t test_vrgather_vx_u8m4_m(vbool2_t mask, vuint8m4_t op1, size_t index, size_t vl) {
2047 return __riscv_vrgather(mask, op1, index, vl);
2050 // CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vv_u8m8_m
2051 // CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], <vscale x 64 x i8> [[OP1:%.*]], <vscale x 64 x i8> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2052 // CHECK-RV64-NEXT: entry:
2053 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vv.mask.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], <vscale x 64 x i8> [[INDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)
2054 // CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]
2056 vuint8m8_t test_vrgather_vv_u8m8_m(vbool1_t mask, vuint8m8_t op1, vuint8m8_t index, size_t vl) {
2057 return __riscv_vrgather(mask, op1, index, vl);
2060 // CHECK-RV64-LABEL: define dso_local <vscale x 64 x i8> @test_vrgather_vx_u8m8_m
2061 // CHECK-RV64-SAME: (<vscale x 64 x i1> [[MASK:%.*]], <vscale x 64 x i8> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2062 // CHECK-RV64-NEXT: entry:
2063 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 64 x i8> @llvm.riscv.vrgather.vx.mask.nxv64i8.i64(<vscale x 64 x i8> poison, <vscale x 64 x i8> [[OP1]], i64 [[INDEX]], <vscale x 64 x i1> [[MASK]], i64 [[VL]], i64 3)
2064 // CHECK-RV64-NEXT: ret <vscale x 64 x i8> [[TMP0]]
2066 vuint8m8_t test_vrgather_vx_u8m8_m(vbool1_t mask, vuint8m8_t op1, size_t index, size_t vl) {
2067 return __riscv_vrgather(mask, op1, index, vl);
2070 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vv_u16mf4_m
2071 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i16> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2072 // CHECK-RV64-NEXT: entry:
2073 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vv.mask.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], <vscale x 1 x i16> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
2074 // CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
2076 vuint16mf4_t test_vrgather_vv_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, vuint16mf4_t index, size_t vl) {
2077 return __riscv_vrgather(mask, op1, index, vl);
2080 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i16> @test_vrgather_vx_u16mf4_m
2081 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2082 // CHECK-RV64-NEXT: entry:
2083 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i16> @llvm.riscv.vrgather.vx.mask.nxv1i16.i64(<vscale x 1 x i16> poison, <vscale x 1 x i16> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
2084 // CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
2086 vuint16mf4_t test_vrgather_vx_u16mf4_m(vbool64_t mask, vuint16mf4_t op1, size_t index, size_t vl) {
2087 return __riscv_vrgather(mask, op1, index, vl);
2090 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vv_u16mf2_m
2091 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i16> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2092 // CHECK-RV64-NEXT: entry:
2093 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vv.mask.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], <vscale x 2 x i16> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
2094 // CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
2096 vuint16mf2_t test_vrgather_vv_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, vuint16mf2_t index, size_t vl) {
2097 return __riscv_vrgather(mask, op1, index, vl);
2100 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i16> @test_vrgather_vx_u16mf2_m
2101 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2102 // CHECK-RV64-NEXT: entry:
2103 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i16> @llvm.riscv.vrgather.vx.mask.nxv2i16.i64(<vscale x 2 x i16> poison, <vscale x 2 x i16> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
2104 // CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
2106 vuint16mf2_t test_vrgather_vx_u16mf2_m(vbool32_t mask, vuint16mf2_t op1, size_t index, size_t vl) {
2107 return __riscv_vrgather(mask, op1, index, vl);
2110 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vv_u16m1_m
2111 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i16> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2112 // CHECK-RV64-NEXT: entry:
2113 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vv.mask.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], <vscale x 4 x i16> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
2114 // CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
2116 vuint16m1_t test_vrgather_vv_u16m1_m(vbool16_t mask, vuint16m1_t op1, vuint16m1_t index, size_t vl) {
2117 return __riscv_vrgather(mask, op1, index, vl);
2120 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i16> @test_vrgather_vx_u16m1_m
2121 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2122 // CHECK-RV64-NEXT: entry:
2123 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i16> @llvm.riscv.vrgather.vx.mask.nxv4i16.i64(<vscale x 4 x i16> poison, <vscale x 4 x i16> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
2124 // CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
2126 vuint16m1_t test_vrgather_vx_u16m1_m(vbool16_t mask, vuint16m1_t op1, size_t index, size_t vl) {
2127 return __riscv_vrgather(mask, op1, index, vl);
2130 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vv_u16m2_m
2131 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i16> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2132 // CHECK-RV64-NEXT: entry:
2133 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vv.mask.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], <vscale x 8 x i16> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2134 // CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
2136 vuint16m2_t test_vrgather_vv_u16m2_m(vbool8_t mask, vuint16m2_t op1, vuint16m2_t index, size_t vl) {
2137 return __riscv_vrgather(mask, op1, index, vl);
2140 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i16> @test_vrgather_vx_u16m2_m
2141 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2142 // CHECK-RV64-NEXT: entry:
2143 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i16> @llvm.riscv.vrgather.vx.mask.nxv8i16.i64(<vscale x 8 x i16> poison, <vscale x 8 x i16> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2144 // CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
2146 vuint16m2_t test_vrgather_vx_u16m2_m(vbool8_t mask, vuint16m2_t op1, size_t index, size_t vl) {
2147 return __riscv_vrgather(mask, op1, index, vl);
2150 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vv_u16m4_m
2151 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i16> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2152 // CHECK-RV64-NEXT: entry:
2153 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vv.mask.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], <vscale x 16 x i16> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
2154 // CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
2156 vuint16m4_t test_vrgather_vv_u16m4_m(vbool4_t mask, vuint16m4_t op1, vuint16m4_t index, size_t vl) {
2157 return __riscv_vrgather(mask, op1, index, vl);
2160 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i16> @test_vrgather_vx_u16m4_m
2161 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2162 // CHECK-RV64-NEXT: entry:
2163 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i16> @llvm.riscv.vrgather.vx.mask.nxv16i16.i64(<vscale x 16 x i16> poison, <vscale x 16 x i16> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
2164 // CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
2166 vuint16m4_t test_vrgather_vx_u16m4_m(vbool4_t mask, vuint16m4_t op1, size_t index, size_t vl) {
2167 return __riscv_vrgather(mask, op1, index, vl);
2170 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vv_u16m8_m
2171 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i16> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2172 // CHECK-RV64-NEXT: entry:
2173 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vv.mask.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], <vscale x 32 x i16> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
2174 // CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
2176 vuint16m8_t test_vrgather_vv_u16m8_m(vbool2_t mask, vuint16m8_t op1, vuint16m8_t index, size_t vl) {
2177 return __riscv_vrgather(mask, op1, index, vl);
2180 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x i16> @test_vrgather_vx_u16m8_m
2181 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x i16> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2182 // CHECK-RV64-NEXT: entry:
2183 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x i16> @llvm.riscv.vrgather.vx.mask.nxv32i16.i64(<vscale x 32 x i16> poison, <vscale x 32 x i16> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
2184 // CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
2186 vuint16m8_t test_vrgather_vx_u16m8_m(vbool2_t mask, vuint16m8_t op1, size_t index, size_t vl) {
2187 return __riscv_vrgather(mask, op1, index, vl);
2190 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vv_u32mf2_m
2191 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i32> [[OP1:%.*]], <vscale x 1 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2192 // CHECK-RV64-NEXT: entry:
2193 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vv.mask.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], <vscale x 1 x i32> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
2194 // CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
2196 vuint32mf2_t test_vrgather_vv_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, vuint32mf2_t index, size_t vl) {
2197 return __riscv_vrgather(mask, op1, index, vl);
2200 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i32> @test_vrgather_vx_u32mf2_m
2201 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2202 // CHECK-RV64-NEXT: entry:
2203 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i32> @llvm.riscv.vrgather.vx.mask.nxv1i32.i64(<vscale x 1 x i32> poison, <vscale x 1 x i32> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
2204 // CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
2206 vuint32mf2_t test_vrgather_vx_u32mf2_m(vbool64_t mask, vuint32mf2_t op1, size_t index, size_t vl) {
2207 return __riscv_vrgather(mask, op1, index, vl);
2210 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vv_u32m1_m
2211 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i32> [[OP1:%.*]], <vscale x 2 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2212 // CHECK-RV64-NEXT: entry:
2213 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vv.mask.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], <vscale x 2 x i32> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
2214 // CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
2216 vuint32m1_t test_vrgather_vv_u32m1_m(vbool32_t mask, vuint32m1_t op1, vuint32m1_t index, size_t vl) {
2217 return __riscv_vrgather(mask, op1, index, vl);
2220 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i32> @test_vrgather_vx_u32m1_m
2221 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2222 // CHECK-RV64-NEXT: entry:
2223 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vrgather.vx.mask.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
2224 // CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
2226 vuint32m1_t test_vrgather_vx_u32m1_m(vbool32_t mask, vuint32m1_t op1, size_t index, size_t vl) {
2227 return __riscv_vrgather(mask, op1, index, vl);
2230 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vv_u32m2_m
2231 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i32> [[OP1:%.*]], <vscale x 4 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2232 // CHECK-RV64-NEXT: entry:
2233 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vv.mask.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], <vscale x 4 x i32> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
2234 // CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
2236 vuint32m2_t test_vrgather_vv_u32m2_m(vbool16_t mask, vuint32m2_t op1, vuint32m2_t index, size_t vl) {
2237 return __riscv_vrgather(mask, op1, index, vl);
2240 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i32> @test_vrgather_vx_u32m2_m
2241 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2242 // CHECK-RV64-NEXT: entry:
2243 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i32> @llvm.riscv.vrgather.vx.mask.nxv4i32.i64(<vscale x 4 x i32> poison, <vscale x 4 x i32> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
2244 // CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
2246 vuint32m2_t test_vrgather_vx_u32m2_m(vbool16_t mask, vuint32m2_t op1, size_t index, size_t vl) {
2247 return __riscv_vrgather(mask, op1, index, vl);
2250 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vv_u32m4_m
2251 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i32> [[OP1:%.*]], <vscale x 8 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2252 // CHECK-RV64-NEXT: entry:
2253 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vv.mask.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], <vscale x 8 x i32> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2254 // CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
2256 vuint32m4_t test_vrgather_vv_u32m4_m(vbool8_t mask, vuint32m4_t op1, vuint32m4_t index, size_t vl) {
2257 return __riscv_vrgather(mask, op1, index, vl);
2260 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i32> @test_vrgather_vx_u32m4_m
2261 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2262 // CHECK-RV64-NEXT: entry:
2263 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i32> @llvm.riscv.vrgather.vx.mask.nxv8i32.i64(<vscale x 8 x i32> poison, <vscale x 8 x i32> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2264 // CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
2266 vuint32m4_t test_vrgather_vx_u32m4_m(vbool8_t mask, vuint32m4_t op1, size_t index, size_t vl) {
2267 return __riscv_vrgather(mask, op1, index, vl);
2270 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vv_u32m8_m
2271 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i32> [[OP1:%.*]], <vscale x 16 x i32> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2272 // CHECK-RV64-NEXT: entry:
2273 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vv.mask.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], <vscale x 16 x i32> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
2274 // CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
2276 vuint32m8_t test_vrgather_vv_u32m8_m(vbool4_t mask, vuint32m8_t op1, vuint32m8_t index, size_t vl) {
2277 return __riscv_vrgather(mask, op1, index, vl);
2280 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x i32> @test_vrgather_vx_u32m8_m
2281 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x i32> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2282 // CHECK-RV64-NEXT: entry:
2283 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x i32> @llvm.riscv.vrgather.vx.mask.nxv16i32.i64(<vscale x 16 x i32> poison, <vscale x 16 x i32> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
2284 // CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
2286 vuint32m8_t test_vrgather_vx_u32m8_m(vbool4_t mask, vuint32m8_t op1, size_t index, size_t vl) {
2287 return __riscv_vrgather(mask, op1, index, vl);
2290 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vv_u64m1_m
2291 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i64> [[OP1:%.*]], <vscale x 1 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2292 // CHECK-RV64-NEXT: entry:
2293 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vv.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], <vscale x 1 x i64> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
2294 // CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
2296 vuint64m1_t test_vrgather_vv_u64m1_m(vbool64_t mask, vuint64m1_t op1, vuint64m1_t index, size_t vl) {
2297 return __riscv_vrgather(mask, op1, index, vl);
2300 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x i64> @test_vrgather_vx_u64m1_m
2301 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2302 // CHECK-RV64-NEXT: entry:
2303 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x i64> @llvm.riscv.vrgather.vx.mask.nxv1i64.i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
2304 // CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
2306 vuint64m1_t test_vrgather_vx_u64m1_m(vbool64_t mask, vuint64m1_t op1, size_t index, size_t vl) {
2307 return __riscv_vrgather(mask, op1, index, vl);
2310 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vv_u64m2_m
2311 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i64> [[OP1:%.*]], <vscale x 2 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2312 // CHECK-RV64-NEXT: entry:
2313 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vv.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], <vscale x 2 x i64> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
2314 // CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
2316 vuint64m2_t test_vrgather_vv_u64m2_m(vbool32_t mask, vuint64m2_t op1, vuint64m2_t index, size_t vl) {
2317 return __riscv_vrgather(mask, op1, index, vl);
2320 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x i64> @test_vrgather_vx_u64m2_m
2321 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2322 // CHECK-RV64-NEXT: entry:
2323 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i64> @llvm.riscv.vrgather.vx.mask.nxv2i64.i64(<vscale x 2 x i64> poison, <vscale x 2 x i64> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
2324 // CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
2326 vuint64m2_t test_vrgather_vx_u64m2_m(vbool32_t mask, vuint64m2_t op1, size_t index, size_t vl) {
2327 return __riscv_vrgather(mask, op1, index, vl);
2330 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vv_u64m4_m
2331 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i64> [[OP1:%.*]], <vscale x 4 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2332 // CHECK-RV64-NEXT: entry:
2333 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vv.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], <vscale x 4 x i64> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
2334 // CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
2336 vuint64m4_t test_vrgather_vv_u64m4_m(vbool16_t mask, vuint64m4_t op1, vuint64m4_t index, size_t vl) {
2337 return __riscv_vrgather(mask, op1, index, vl);
2340 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x i64> @test_vrgather_vx_u64m4_m
2341 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2342 // CHECK-RV64-NEXT: entry:
2343 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.riscv.vrgather.vx.mask.nxv4i64.i64(<vscale x 4 x i64> poison, <vscale x 4 x i64> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
2344 // CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
2346 vuint64m4_t test_vrgather_vx_u64m4_m(vbool16_t mask, vuint64m4_t op1, size_t index, size_t vl) {
2347 return __riscv_vrgather(mask, op1, index, vl);
2350 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vv_u64m8_m
2351 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i64> [[OP1:%.*]], <vscale x 8 x i64> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2352 // CHECK-RV64-NEXT: entry:
2353 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vv.mask.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], <vscale x 8 x i64> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2354 // CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
2356 vuint64m8_t test_vrgather_vv_u64m8_m(vbool8_t mask, vuint64m8_t op1, vuint64m8_t index, size_t vl) {
2357 return __riscv_vrgather(mask, op1, index, vl);
2360 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x i64> @test_vrgather_vx_u64m8_m
2361 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x i64> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2362 // CHECK-RV64-NEXT: entry:
2363 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x i64> @llvm.riscv.vrgather.vx.mask.nxv8i64.i64(<vscale x 8 x i64> poison, <vscale x 8 x i64> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2364 // CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
2366 vuint64m8_t test_vrgather_vx_u64m8_m(vbool8_t mask, vuint64m8_t op1, size_t index, size_t vl) {
2367 return __riscv_vrgather(mask, op1, index, vl);
2370 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vrgather_vv_bf16mf4
2371 // CHECK-RV64-SAME: (<vscale x 1 x bfloat> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2372 // CHECK-RV64-NEXT: entry:
2373 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vv.nxv1bf16.i64(<vscale x 1 x bfloat> poison, <vscale x 1 x bfloat> [[OP1]], <vscale x 1 x i16> [[INDEX]], i64 [[VL]])
2374 // CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
2376 vbfloat16mf4_t test_vrgather_vv_bf16mf4(vbfloat16mf4_t op1, vuint16mf4_t index, size_t vl) {
2377 return __riscv_vrgather(op1, index, vl);
2380 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vrgather_vx_bf16mf4
2381 // CHECK-RV64-SAME: (<vscale x 1 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2382 // CHECK-RV64-NEXT: entry:
2383 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vx.nxv1bf16.i64(<vscale x 1 x bfloat> poison, <vscale x 1 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])
2384 // CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
2386 vbfloat16mf4_t test_vrgather_vx_bf16mf4(vbfloat16mf4_t op1, size_t index, size_t vl) {
2387 return __riscv_vrgather(op1, index, vl);
2390 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vrgather_vv_bf16mf2
2391 // CHECK-RV64-SAME: (<vscale x 2 x bfloat> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2392 // CHECK-RV64-NEXT: entry:
2393 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vv.nxv2bf16.i64(<vscale x 2 x bfloat> poison, <vscale x 2 x bfloat> [[OP1]], <vscale x 2 x i16> [[INDEX]], i64 [[VL]])
2394 // CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
2396 vbfloat16mf2_t test_vrgather_vv_bf16mf2(vbfloat16mf2_t op1, vuint16mf2_t index, size_t vl) {
2397 return __riscv_vrgather(op1, index, vl);
2400 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vrgather_vx_bf16mf2
2401 // CHECK-RV64-SAME: (<vscale x 2 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2402 // CHECK-RV64-NEXT: entry:
2403 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vx.nxv2bf16.i64(<vscale x 2 x bfloat> poison, <vscale x 2 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])
2404 // CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
2406 vbfloat16mf2_t test_vrgather_vx_bf16mf2(vbfloat16mf2_t op1, size_t index, size_t vl) {
2407 return __riscv_vrgather(op1, index, vl);
2410 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vrgather_vv_bf16m1
2411 // CHECK-RV64-SAME: (<vscale x 4 x bfloat> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2412 // CHECK-RV64-NEXT: entry:
2413 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vv.nxv4bf16.i64(<vscale x 4 x bfloat> poison, <vscale x 4 x bfloat> [[OP1]], <vscale x 4 x i16> [[INDEX]], i64 [[VL]])
2414 // CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
2416 vbfloat16m1_t test_vrgather_vv_bf16m1(vbfloat16m1_t op1, vuint16m1_t index, size_t vl) {
2417 return __riscv_vrgather(op1, index, vl);
2420 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vrgather_vx_bf16m1
2421 // CHECK-RV64-SAME: (<vscale x 4 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2422 // CHECK-RV64-NEXT: entry:
2423 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vx.nxv4bf16.i64(<vscale x 4 x bfloat> poison, <vscale x 4 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])
2424 // CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
2426 vbfloat16m1_t test_vrgather_vx_bf16m1(vbfloat16m1_t op1, size_t index, size_t vl) {
2427 return __riscv_vrgather(op1, index, vl);
2430 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vrgather_vv_bf16m2
2431 // CHECK-RV64-SAME: (<vscale x 8 x bfloat> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2432 // CHECK-RV64-NEXT: entry:
2433 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vv.nxv8bf16.i64(<vscale x 8 x bfloat> poison, <vscale x 8 x bfloat> [[OP1]], <vscale x 8 x i16> [[INDEX]], i64 [[VL]])
2434 // CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
2436 vbfloat16m2_t test_vrgather_vv_bf16m2(vbfloat16m2_t op1, vuint16m2_t index, size_t vl) {
2437 return __riscv_vrgather(op1, index, vl);
2440 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vrgather_vx_bf16m2
2441 // CHECK-RV64-SAME: (<vscale x 8 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2442 // CHECK-RV64-NEXT: entry:
2443 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vx.nxv8bf16.i64(<vscale x 8 x bfloat> poison, <vscale x 8 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])
2444 // CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
2446 vbfloat16m2_t test_vrgather_vx_bf16m2(vbfloat16m2_t op1, size_t index, size_t vl) {
2447 return __riscv_vrgather(op1, index, vl);
2450 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vrgather_vv_bf16m4
2451 // CHECK-RV64-SAME: (<vscale x 16 x bfloat> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2452 // CHECK-RV64-NEXT: entry:
2453 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vv.nxv16bf16.i64(<vscale x 16 x bfloat> poison, <vscale x 16 x bfloat> [[OP1]], <vscale x 16 x i16> [[INDEX]], i64 [[VL]])
2454 // CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
2456 vbfloat16m4_t test_vrgather_vv_bf16m4(vbfloat16m4_t op1, vuint16m4_t index, size_t vl) {
2457 return __riscv_vrgather(op1, index, vl);
2460 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vrgather_vx_bf16m4
2461 // CHECK-RV64-SAME: (<vscale x 16 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2462 // CHECK-RV64-NEXT: entry:
2463 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vx.nxv16bf16.i64(<vscale x 16 x bfloat> poison, <vscale x 16 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])
2464 // CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
2466 vbfloat16m4_t test_vrgather_vx_bf16m4(vbfloat16m4_t op1, size_t index, size_t vl) {
2467 return __riscv_vrgather(op1, index, vl);
2470 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vrgather_vv_bf16m8
2471 // CHECK-RV64-SAME: (<vscale x 32 x bfloat> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2472 // CHECK-RV64-NEXT: entry:
2473 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vv.nxv32bf16.i64(<vscale x 32 x bfloat> poison, <vscale x 32 x bfloat> [[OP1]], <vscale x 32 x i16> [[INDEX]], i64 [[VL]])
2474 // CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
2476 vbfloat16m8_t test_vrgather_vv_bf16m8(vbfloat16m8_t op1, vuint16m8_t index, size_t vl) {
2477 return __riscv_vrgather(op1, index, vl);
2480 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vrgather_vx_bf16m8
2481 // CHECK-RV64-SAME: (<vscale x 32 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2482 // CHECK-RV64-NEXT: entry:
2483 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vx.nxv32bf16.i64(<vscale x 32 x bfloat> poison, <vscale x 32 x bfloat> [[OP1]], i64 [[INDEX]], i64 [[VL]])
2484 // CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
2486 vbfloat16m8_t test_vrgather_vx_bf16m8(vbfloat16m8_t op1, size_t index, size_t vl) {
2487 return __riscv_vrgather(op1, index, vl);
2490 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vrgather_vv_bf16mf4_m
2491 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x bfloat> [[OP1:%.*]], <vscale x 1 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2492 // CHECK-RV64-NEXT: entry:
2493 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv1bf16.i64(<vscale x 1 x bfloat> poison, <vscale x 1 x bfloat> [[OP1]], <vscale x 1 x i16> [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
2494 // CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
2496 vbfloat16mf4_t test_vrgather_vv_bf16mf4_m(vbool64_t mask, vbfloat16mf4_t op1, vuint16mf4_t index, size_t vl) {
2497 return __riscv_vrgather(mask, op1, index, vl);
2500 // CHECK-RV64-LABEL: define dso_local <vscale x 1 x bfloat> @test_vrgather_vx_bf16mf4_m
2501 // CHECK-RV64-SAME: (<vscale x 1 x i1> [[MASK:%.*]], <vscale x 1 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2502 // CHECK-RV64-NEXT: entry:
2503 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv1bf16.i64(<vscale x 1 x bfloat> poison, <vscale x 1 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 1 x i1> [[MASK]], i64 [[VL]], i64 3)
2504 // CHECK-RV64-NEXT: ret <vscale x 1 x bfloat> [[TMP0]]
2506 vbfloat16mf4_t test_vrgather_vx_bf16mf4_m(vbool64_t mask, vbfloat16mf4_t op1, size_t index, size_t vl) {
2507 return __riscv_vrgather(mask, op1, index, vl);
2510 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vrgather_vv_bf16mf2_m
2511 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x bfloat> [[OP1:%.*]], <vscale x 2 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2512 // CHECK-RV64-NEXT: entry:
2513 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv2bf16.i64(<vscale x 2 x bfloat> poison, <vscale x 2 x bfloat> [[OP1]], <vscale x 2 x i16> [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
2514 // CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
2516 vbfloat16mf2_t test_vrgather_vv_bf16mf2_m(vbool32_t mask, vbfloat16mf2_t op1, vuint16mf2_t index, size_t vl) {
2517 return __riscv_vrgather(mask, op1, index, vl);
2520 // CHECK-RV64-LABEL: define dso_local <vscale x 2 x bfloat> @test_vrgather_vx_bf16mf2_m
2521 // CHECK-RV64-SAME: (<vscale x 2 x i1> [[MASK:%.*]], <vscale x 2 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2522 // CHECK-RV64-NEXT: entry:
2523 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv2bf16.i64(<vscale x 2 x bfloat> poison, <vscale x 2 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 2 x i1> [[MASK]], i64 [[VL]], i64 3)
2524 // CHECK-RV64-NEXT: ret <vscale x 2 x bfloat> [[TMP0]]
2526 vbfloat16mf2_t test_vrgather_vx_bf16mf2_m(vbool32_t mask, vbfloat16mf2_t op1, size_t index, size_t vl) {
2527 return __riscv_vrgather(mask, op1, index, vl);
2530 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vrgather_vv_bf16m1_m
2531 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x bfloat> [[OP1:%.*]], <vscale x 4 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2532 // CHECK-RV64-NEXT: entry:
2533 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv4bf16.i64(<vscale x 4 x bfloat> poison, <vscale x 4 x bfloat> [[OP1]], <vscale x 4 x i16> [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
2534 // CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
2536 vbfloat16m1_t test_vrgather_vv_bf16m1_m(vbool16_t mask, vbfloat16m1_t op1, vuint16m1_t index, size_t vl) {
2537 return __riscv_vrgather(mask, op1, index, vl);
2540 // CHECK-RV64-LABEL: define dso_local <vscale x 4 x bfloat> @test_vrgather_vx_bf16m1_m
2541 // CHECK-RV64-SAME: (<vscale x 4 x i1> [[MASK:%.*]], <vscale x 4 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2542 // CHECK-RV64-NEXT: entry:
2543 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 4 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv4bf16.i64(<vscale x 4 x bfloat> poison, <vscale x 4 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 4 x i1> [[MASK]], i64 [[VL]], i64 3)
2544 // CHECK-RV64-NEXT: ret <vscale x 4 x bfloat> [[TMP0]]
2546 vbfloat16m1_t test_vrgather_vx_bf16m1_m(vbool16_t mask, vbfloat16m1_t op1, size_t index, size_t vl) {
2547 return __riscv_vrgather(mask, op1, index, vl);
2550 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vrgather_vv_bf16m2_m
2551 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x bfloat> [[OP1:%.*]], <vscale x 8 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2552 // CHECK-RV64-NEXT: entry:
2553 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv8bf16.i64(<vscale x 8 x bfloat> poison, <vscale x 8 x bfloat> [[OP1]], <vscale x 8 x i16> [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2554 // CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
2556 vbfloat16m2_t test_vrgather_vv_bf16m2_m(vbool8_t mask, vbfloat16m2_t op1, vuint16m2_t index, size_t vl) {
2557 return __riscv_vrgather(mask, op1, index, vl);
2560 // CHECK-RV64-LABEL: define dso_local <vscale x 8 x bfloat> @test_vrgather_vx_bf16m2_m
2561 // CHECK-RV64-SAME: (<vscale x 8 x i1> [[MASK:%.*]], <vscale x 8 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2562 // CHECK-RV64-NEXT: entry:
2563 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 8 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv8bf16.i64(<vscale x 8 x bfloat> poison, <vscale x 8 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 8 x i1> [[MASK]], i64 [[VL]], i64 3)
2564 // CHECK-RV64-NEXT: ret <vscale x 8 x bfloat> [[TMP0]]
2566 vbfloat16m2_t test_vrgather_vx_bf16m2_m(vbool8_t mask, vbfloat16m2_t op1, size_t index, size_t vl) {
2567 return __riscv_vrgather(mask, op1, index, vl);
2570 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vrgather_vv_bf16m4_m
2571 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x bfloat> [[OP1:%.*]], <vscale x 16 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2572 // CHECK-RV64-NEXT: entry:
2573 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv16bf16.i64(<vscale x 16 x bfloat> poison, <vscale x 16 x bfloat> [[OP1]], <vscale x 16 x i16> [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
2574 // CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
2576 vbfloat16m4_t test_vrgather_vv_bf16m4_m(vbool4_t mask, vbfloat16m4_t op1, vuint16m4_t index, size_t vl) {
2577 return __riscv_vrgather(mask, op1, index, vl);
2580 // CHECK-RV64-LABEL: define dso_local <vscale x 16 x bfloat> @test_vrgather_vx_bf16m4_m
2581 // CHECK-RV64-SAME: (<vscale x 16 x i1> [[MASK:%.*]], <vscale x 16 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2582 // CHECK-RV64-NEXT: entry:
2583 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 16 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv16bf16.i64(<vscale x 16 x bfloat> poison, <vscale x 16 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 16 x i1> [[MASK]], i64 [[VL]], i64 3)
2584 // CHECK-RV64-NEXT: ret <vscale x 16 x bfloat> [[TMP0]]
2586 vbfloat16m4_t test_vrgather_vx_bf16m4_m(vbool4_t mask, vbfloat16m4_t op1, size_t index, size_t vl) {
2587 return __riscv_vrgather(mask, op1, index, vl);
2590 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vrgather_vv_bf16m8_m
2591 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x bfloat> [[OP1:%.*]], <vscale x 32 x i16> [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2592 // CHECK-RV64-NEXT: entry:
2593 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vv.mask.nxv32bf16.i64(<vscale x 32 x bfloat> poison, <vscale x 32 x bfloat> [[OP1]], <vscale x 32 x i16> [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
2594 // CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
2596 vbfloat16m8_t test_vrgather_vv_bf16m8_m(vbool2_t mask, vbfloat16m8_t op1, vuint16m8_t index, size_t vl) {
2597 return __riscv_vrgather(mask, op1, index, vl);
2600 // CHECK-RV64-LABEL: define dso_local <vscale x 32 x bfloat> @test_vrgather_vx_bf16m8_m
2601 // CHECK-RV64-SAME: (<vscale x 32 x i1> [[MASK:%.*]], <vscale x 32 x bfloat> [[OP1:%.*]], i64 noundef [[INDEX:%.*]], i64 noundef [[VL:%.*]]) #[[ATTR0]] {
2602 // CHECK-RV64-NEXT: entry:
2603 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 32 x bfloat> @llvm.riscv.vrgather.vx.mask.nxv32bf16.i64(<vscale x 32 x bfloat> poison, <vscale x 32 x bfloat> [[OP1]], i64 [[INDEX]], <vscale x 32 x i1> [[MASK]], i64 [[VL]], i64 3)
2604 // CHECK-RV64-NEXT: ret <vscale x 32 x bfloat> [[TMP0]]
2606 vbfloat16m8_t test_vrgather_vx_bf16m8_m(vbool2_t mask, vbfloat16m8_t op1, size_t index, size_t vl) {
2607 return __riscv_vrgather(mask, op1, index, vl);