[mlir] Improve error message when number of operands and types differ (#118488)
[llvm-project.git] / clang / test / CodeGen / X86 / amx_transpose_api.c
blobdc3ef5104252ca3048d2d2ca7cc8c5a4e7aba52f
1 // RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64-unknown-unknown -target-feature +avx512f \
2 // RUN: -target-feature +amx-transpose -target-feature +amx-bf16 -target-feature +amx-fp16 -target-feature +amx-complex \
3 // RUN: -emit-llvm -o - -Werror -pedantic | FileCheck %s --check-prefixes=CHECK
5 #include <immintrin.h>
7 char buf[2048];
8 #define STRIDE 32
10 char buf2[2048];
12 void test_tile_2rpntlvwz0(__tile1024i dst0, __tile1024i dst1) {
13 //CHECK-LABEL: @test_tile_2rpntlvwz0
14 //CHECK: call { x86_amx, x86_amx } @llvm.x86.t2rpntlvwz0.internal
15 //CHECK-NEXT: {{%.*}} = extractvalue { x86_amx, x86_amx } {{%.*}}, 0
16 //CHECK-NEXT: {{%.*}} = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
17 //CHECK-NEXT: store <256 x i32> {{%.*}}, ptr {{%.*}}
18 //CHECK-NEXT: {{%.*}} = extractvalue { x86_amx, x86_amx } {{%.*}}, 1
19 //CHECK-NEXT: {{%.*}} = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
20 //CHECK-NEXT: store <256 x i32> {{%.*}}, ptr {{%.*}}
21 __tile_2rpntlvwz0(&dst0, &dst1, buf, STRIDE);
24 void test_tile_2rpntlvwz0t1(__tile1024i dst0, __tile1024i dst1) {
25 //CHECK-LABEL: @test_tile_2rpntlvwz0t1
26 //CHECK: call { x86_amx, x86_amx } @llvm.x86.t2rpntlvwz0t1.internal
27 //CHECK-NEXT: {{%.*}} = extractvalue { x86_amx, x86_amx } {{%.*}}, 0
28 //CHECK-NEXT: {{%.*}} = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
29 //CHECK-NEXT: store <256 x i32> {{%.*}}, ptr {{%.*}}
30 //CHECK-NEXT: {{%.*}} = extractvalue { x86_amx, x86_amx } {{%.*}}, 1
31 //CHECK-NEXT: {{%.*}} = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
32 //CHECK-NEXT: store <256 x i32> {{%.*}}, ptr {{%.*}}
33 __tile_2rpntlvwz0t1(&dst0, &dst1, buf, STRIDE);
36 void test_tile_2rpntlvwz1(__tile1024i dst0, __tile1024i dst1) {
37 //CHECK-LABEL: @test_tile_2rpntlvwz1
38 //CHECK: call { x86_amx, x86_amx } @llvm.x86.t2rpntlvwz1.internal
39 //CHECK-NEXT: {{%.*}} = extractvalue { x86_amx, x86_amx } {{%.*}}, 0
40 //CHECK-NEXT: {{%.*}} = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
41 //CHECK-NEXT: store <256 x i32> {{%.*}}, ptr {{%.*}}
42 //CHECK-NEXT: {{%.*}} = extractvalue { x86_amx, x86_amx } {{%.*}}, 1
43 //CHECK-NEXT: {{%.*}} = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
44 //CHECK-NEXT: store <256 x i32> {{%.*}}, ptr {{%.*}}
45 __tile_2rpntlvwz1(&dst0, &dst1, buf, STRIDE);
48 void test_tile_2rpntlvwz1t1(__tile1024i dst0, __tile1024i dst1) {
49 //CHECK-LABEL: @test_tile_2rpntlvwz1t1
50 //CHECK: call { x86_amx, x86_amx } @llvm.x86.t2rpntlvwz1t1.internal
51 //CHECK-NEXT: {{%.*}} = extractvalue { x86_amx, x86_amx } {{%.*}}, 0
52 //CHECK-NEXT: {{%.*}} = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
53 //CHECK-NEXT: store <256 x i32> {{%.*}}, ptr {{%.*}}
54 //CHECK-NEXT: {{%.*}} = extractvalue { x86_amx, x86_amx } {{%.*}}, 1
55 //CHECK-NEXT: {{%.*}} = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
56 //CHECK-NEXT: store <256 x i32> {{%.*}}, ptr {{%.*}}
57 __tile_2rpntlvwz1t1(&dst0, &dst1, buf, STRIDE);
60 void test_tile_transposed(__tile1024i dst, __tile1024i src) {
61 //CHECK-LABEL: @test_tile_transposed
62 //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
63 //CHECK-DAG: call x86_amx @llvm.x86.ttransposed.internal
64 //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
65 __tile_transposed(&dst, src);
68 void test_tile_tdpbf16ps(__tile1024i a, __tile1024i b, __tile1024i c) {
69 //CHECK-LABEL: @test_tile_tdpbf16ps
70 //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
71 //CHECK-DAG: call x86_amx @llvm.x86.ttdpbf16ps.internal
72 //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
73 __tile_tdpbf16ps(&c, a, b);
76 void test_tile_tdpfp16ps(__tile1024i a, __tile1024i b, __tile1024i c) {
77 //CHECK-LABEL: @test_tile_tdpfp16ps
78 //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
79 //CHECK-DAG: call x86_amx @llvm.x86.ttdpfp16ps.internal
80 //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
81 __tile_tdpfp16ps(&c, a, b);
84 void test_tile_tcmmimfp16ps(__tile1024i a, __tile1024i b, __tile1024i c) {
85 //CHECK-LABEL: @test_tile_tcmmimfp16ps
86 //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
87 //CHECK-DAG: call x86_amx @llvm.x86.ttcmmimfp16ps.internal
88 //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
89 __tile_tcmmimfp16ps(&c, a, b);
92 void test_tile_tcmmrlfp16ps(__tile1024i a, __tile1024i b, __tile1024i c) {
93 //CHECK-LABEL: @test_tile_tcmmrlfp16ps
94 //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
95 //CHECK-DAG: call x86_amx @llvm.x86.ttcmmrlfp16ps.internal
96 //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
97 __tile_tcmmrlfp16ps(&c, a, b);
100 void test_tile_conjtcmmimfp16ps(__tile1024i a, __tile1024i b, __tile1024i c) {
101 //CHECK-LABEL: @test_tile_conjtcmmimfp16ps
102 //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
103 //CHECK-DAG: call x86_amx @llvm.x86.tconjtcmmimfp16ps.internal
104 //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
105 __tile_conjtcmmimfp16ps(&c, a, b);
108 void test_tile_conjtfp16(__tile1024i dst, __tile1024i src) {
109 //CHECK-LABEL: @test_tile_conjtfp16
110 //CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
111 //CHECK-DAG: call x86_amx @llvm.x86.tconjtfp16.internal
112 //CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
113 __tile_conjtfp16(&dst, src);