[MLIR][TOSA] Update CustomOp input and output names (#118408)
[llvm-project.git] / clang / test / CodeGen / X86 / va-arg-sse.c
blob660711f3fc21024bc6173aec5413ec9c4a770eeb
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 %s -emit-llvm -o - -triple x86_64-unknown-unknown | FileCheck %s
4 #include <stdarg.h>
6 struct S { float a[3]; };
7 struct S a[5];
9 // CHECK-LABEL: @check(
10 // CHECK-NEXT: entry:
11 // CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
12 // CHECK-NEXT: [[Z_ADDR:%.*]] = alloca i32, align 4
13 // CHECK-NEXT: [[ARG:%.*]] = alloca [[STRUCT_S:%.*]], align 4
14 // CHECK-NEXT: [[P:%.*]] = alloca ptr, align 8
15 // CHECK-NEXT: [[AP:%.*]] = alloca [1 x %struct.__va_list_tag], align 16
16 // CHECK-NEXT: [[J:%.*]] = alloca i32, align 4
17 // CHECK-NEXT: [[K:%.*]] = alloca i32, align 4
18 // CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
19 // CHECK-NEXT: [[TMP:%.*]] = alloca [[STRUCT_S]], align 4
20 // CHECK-NEXT: store i32 [[Z:%.*]], ptr [[Z_ADDR]], align 4
21 // CHECK-NEXT: store i32 0, ptr [[J]], align 4
22 // CHECK-NEXT: store i32 0, ptr [[K]], align 4
23 // CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[AP]], i64 0, i64 0
24 // CHECK-NEXT: call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])
25 // CHECK-NEXT: store ptr getelementptr inbounds ([5 x %struct.S], ptr @a, i64 0, i64 2), ptr [[P]], align 8
26 // CHECK-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[AP]], i64 0, i64 0
27 // CHECK-NEXT: [[FP_OFFSET_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG:%.*]], ptr [[ARRAYDECAY1]], i32 0, i32 1
28 // CHECK-NEXT: [[FP_OFFSET:%.*]] = load i32, ptr [[FP_OFFSET_P]], align 4
29 // CHECK-NEXT: [[FITS_IN_FP:%.*]] = icmp ule i32 [[FP_OFFSET]], 144
30 // CHECK-NEXT: br i1 [[FITS_IN_FP]], label [[VAARG_IN_REG:%.*]], label [[VAARG_IN_MEM:%.*]]
31 // CHECK: vaarg.in_reg:
32 // CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 3
33 // CHECK-NEXT: [[REG_SAVE_AREA:%.*]] = load ptr, ptr [[TMP0]], align 16
34 // CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[REG_SAVE_AREA]], i32 [[FP_OFFSET]]
35 // CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 16
36 // CHECK-NEXT: [[TMP3:%.*]] = load <2 x float>, ptr [[TMP1]], align 16
37 // CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw { <2 x float>, float }, ptr [[TMP]], i32 0, i32 0
38 // CHECK-NEXT: store <2 x float> [[TMP3]], ptr [[TMP4]], align 4
39 // CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[TMP2]], align 16
40 // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw { <2 x float>, float }, ptr [[TMP]], i32 0, i32 1
41 // CHECK-NEXT: store float [[TMP5]], ptr [[TMP6]], align 4
42 // CHECK-NEXT: [[TMP7:%.*]] = add i32 [[FP_OFFSET]], 32
43 // CHECK-NEXT: store i32 [[TMP7]], ptr [[FP_OFFSET_P]], align 4
44 // CHECK-NEXT: br label [[VAARG_END:%.*]]
45 // CHECK: vaarg.in_mem:
46 // CHECK-NEXT: [[OVERFLOW_ARG_AREA_P:%.*]] = getelementptr inbounds nuw [[STRUCT___VA_LIST_TAG]], ptr [[ARRAYDECAY1]], i32 0, i32 2
47 // CHECK-NEXT: [[OVERFLOW_ARG_AREA:%.*]] = load ptr, ptr [[OVERFLOW_ARG_AREA_P]], align 8
48 // CHECK-NEXT: [[OVERFLOW_ARG_AREA_NEXT:%.*]] = getelementptr i8, ptr [[OVERFLOW_ARG_AREA]], i32 16
49 // CHECK-NEXT: store ptr [[OVERFLOW_ARG_AREA_NEXT]], ptr [[OVERFLOW_ARG_AREA_P]], align 8
50 // CHECK-NEXT: br label [[VAARG_END]]
51 // CHECK: vaarg.end:
52 // CHECK-NEXT: [[VAARG_ADDR:%.*]] = phi ptr [ [[TMP]], [[VAARG_IN_REG]] ], [ [[OVERFLOW_ARG_AREA]], [[VAARG_IN_MEM]] ]
53 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARG]], ptr align 4 [[VAARG_ADDR]], i64 12, i1 false)
54 // CHECK-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[AP]], i64 0, i64 0
55 // CHECK-NEXT: call void @llvm.va_end.p0(ptr [[ARRAYDECAY2]])
56 // CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[P]], align 8
57 // CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne ptr [[TMP8]], null
58 // CHECK-NEXT: br i1 [[TOBOOL]], label [[LAND_LHS_TRUE:%.*]], label [[IF_END:%.*]]
59 // CHECK: land.lhs.true:
60 // CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[P]], align 8
61 // CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TMP9]], i32 0, i32 0
62 // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x float], ptr [[A]], i64 0, i64 2
63 // CHECK-NEXT: [[TMP10:%.*]] = load float, ptr [[ARRAYIDX]], align 4
64 // CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[ARG]], i32 0, i32 0
65 // CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x float], ptr [[A3]], i64 0, i64 2
66 // CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[ARRAYIDX4]], align 4
67 // CHECK-NEXT: [[CMP:%.*]] = fcmp une float [[TMP10]], [[TMP11]]
68 // CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END]]
69 // CHECK: if.then:
70 // CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4
71 // CHECK-NEXT: br label [[RETURN:%.*]]
72 // CHECK: if.end:
73 // CHECK-NEXT: store i32 1, ptr [[RETVAL]], align 4
74 // CHECK-NEXT: br label [[RETURN]]
75 // CHECK: return:
76 // CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[RETVAL]], align 4
77 // CHECK-NEXT: ret i32 [[TMP12]]
79 int check (int z, ...)
81 struct S arg, *p;
82 va_list ap;
83 int j = 0, k = 0;
84 int i;
85 va_start (ap, z);
86 p = &a[2];
87 arg = va_arg (ap, struct S);
88 va_end (ap);
89 if (p && p->a[2] != arg.a[2])
90 return 0;
91 return 1;