[AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (#121850)
[llvm-project.git] / clang / test / CodeGenCXX / bitfield-access-tail.cpp
blobfb961f327f2e5c70f778a20f75a305f6239787eb
1 // Check we use tail padding if it is known to be safe
3 // Configs that have cheap unaligned access
4 // Little Endian
5 // RUN: %clang_cc1 -triple=aarch64-apple-darwin %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
6 // RUN: %clang_cc1 -triple=aarch64-linux-gnu %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
7 // RUN: %clang_cc1 -triple=arm-apple-darwin %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-DWN32 %s
8 // RUN: %clang_cc1 -triple=arm-none-eabi %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
9 // RUN: %clang_cc1 -triple=i686-linux-gnu %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
10 // RUN: %clang_cc1 -triple=loongarch64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
11 // RUN: %clang_cc1 -triple=powerpcle-linux-gnu %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
12 // RUN: %clang_cc1 -triple=ve-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
13 // RUN: %clang_cc1 -triple=wasm32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
14 // RUN: %clang_cc1 -triple=wasm64 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
15 // RUN: %clang_cc1 -triple=x86_64-linux-gnu %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
17 // Big Endian
18 // RUN: %clang_cc1 -triple=powerpc-linux-gnu %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
19 // RUN: %clang_cc1 -triple=powerpc64-linux-gnu %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
20 // RUN: %clang_cc1 -triple=systemz %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
22 // Configs that have expensive unaligned access
23 // Little Endian
24 // RUN: %clang_cc1 -triple=amdgcn-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
25 // RUN: %clang_cc1 -triple=arc-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
26 // RUN: %clang_cc1 -triple=bpf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
27 // RUN: %clang_cc1 -triple=csky %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
28 // RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
29 // RUN: %clang_cc1 -triple=loongarch32-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
30 // RUN: %clang_cc1 -triple=nvptx-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
31 // RUN: %clang_cc1 -triple=riscv32 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
32 // RUN: %clang_cc1 -triple=riscv64 %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
33 // RUN: %clang_cc1 -triple=spir-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
34 // RUN: %clang_cc1 -triple=xcore-none-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
36 // Big endian
37 // RUN: %clang_cc1 -triple=lanai-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
38 // RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
39 // RUN: %clang_cc1 -triple=mips-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
40 // RUN: %clang_cc1 -triple=mips64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT64 %s
41 // RUN: %clang_cc1 -triple=sparc-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
42 // RUN: %clang_cc1 -triple=tce-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT,LAYOUT32 %s
44 // Can use tail padding
45 struct Pod {
46 int a : 16;
47 int b : 8;
48 } P;
49 // CHECK-LABEL: LLVMType:%struct.Pod =
50 // LAYOUT-SAME: type { i32 }
51 // LAYOUT-DWN32-SAME: type <{ i16, i8 }>
52 // CHECK-NEXT: NonVirtualBaseLLVMType:%struct.Pod =
53 // CHECK: BitFields:[
54 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:32 StorageOffset:0
55 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:32 StorageOffset:0
57 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:16 StorageOffset:0
58 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:2
59 // CHECK-NEXT: ]>
61 // No tail padding
62 struct __attribute__((packed)) PPod {
63 int a : 16;
64 int b : 8;
65 } PP;
66 // CHECK-LABEL: LLVMType:%struct.PPod =
67 // LAYOUT-SAME: type <{ i16, i8 }>
68 // LAYOUT-DWN32-SAME: type <{ i16, i8 }>
69 // CHECK-NEXT: NonVirtualBaseLLVMType:%struct.PPod =
70 // CHECK: BitFields:[
71 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:16 StorageOffset:0
72 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:2
74 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:16 StorageOffset:0
75 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:2
76 // CHECK-NEXT: ]>
78 // Cannot use tail padding
79 struct NonPod {
80 ~NonPod();
81 int a : 16;
82 int b : 8;
83 } NP;
84 // CHECK-LABEL: LLVMType:%struct.NonPod =
85 // LAYOUT-SAME: type <{ i16, i8, i8 }>
86 // LAYOUT-DWN32-SAME: type <{ i16, i8 }>
87 // CHECK-NEXT: NonVirtualBaseLLVMType:%struct.
88 // LAYOUT-SAME: NonPod.base = type <{ i16, i8 }>
89 // LAYOUT-DWN32-SAME: NonPod = type <{ i16, i8 }>
90 // CHECK: BitFields:[
91 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:16 StorageOffset:0
92 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:2
94 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:16 StorageOffset:0
95 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:2
96 // CHECK-NEXT: ]>
98 // No tail padding
99 struct __attribute__((packed)) PNonPod {
100 ~PNonPod();
101 int a : 16;
102 int b : 8;
103 } PNP;
104 // CHECK-LABEL: LLVMType:%struct.PNonPod =
105 // LAYOUT-SAME: type <{ i16, i8 }>
106 // LAYOUT-DWN32-SAME: type <{ i16, i8 }>
107 // CHECK-NEXT: NonVirtualBaseLLVMType:%struct.PNonPod =
108 // CHECK: BitFields:[
109 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:16 StorageOffset:0
110 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:2
112 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:1 StorageSize:16 StorageOffset:0
113 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:1 StorageSize:8 StorageOffset:2
114 // CHECK-NEXT: ]>
116 struct __attribute__((aligned(4))) Empty {} empty;
118 struct Char { char a; } cbase;
119 struct D : virtual Char {
120 [[no_unique_address]] Empty e0;
121 [[no_unique_address]] Empty e1;
122 unsigned a : 24; // keep as 24bits
123 } d;
124 // CHECK-LABEL: LLVMType:%struct.D =
125 // LAYOUT64-SAME: type <{ ptr, [3 x i8], %struct.Char, [4 x i8] }>
126 // LAYOUT32-SAME: type { ptr, [3 x i8], %struct.Char }
127 // LAYOUT-DWN32-SAME: type { ptr, [3 x i8], %struct.Char }
128 // CHECK-NEXT: NonVirtualBaseLLVMType:
129 // LAYOUT64-SAME: %struct.D.base = type <{ ptr, i32 }>
130 // LAYOUT32-SAME: %struct.D = type { ptr, [3 x i8], %struct.Char }
131 // LAYOUT-DWN32-SAME: %struct.D = type { ptr, [3 x i8], %struct.Char }
132 // CHECK: BitFields:[
133 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:24 IsSigned:0 StorageSize:24 StorageOffset:{{(4|8)}}
135 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:24 IsSigned:0 StorageSize:24 StorageOffset:{{(4|8)}}
136 // CHECK-NEXT: ]>
138 struct Int { int a; } ibase;
139 struct E : virtual Int {
140 [[no_unique_address]] Empty e0;
141 [[no_unique_address]] Empty e1;
142 unsigned a : 24; // expand to 32
143 } e;
144 // CHECK-LABEL: LLVMType:%struct.E =
145 // LAYOUT64-SAME: type <{ ptr, i32, %struct.Int }>
146 // LAYOUT32-SAME: type { ptr, i32, %struct.Int }
147 // LAYOUT-DWN32-SAME: type { ptr, i32, %struct.Int }
148 // CHECK-NEXT: NonVirtualBaseLLVMType:%struct.E.base =
149 // LAYOUT64-SAME: type <{ ptr, i32 }>
150 // LAYOUT32-SAME: type { ptr, i32 }
151 // LAYOUT-DWN32-SAME: type { ptr, i32 }
152 // CHECK: BitFields:[
153 // LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:24 IsSigned:0 StorageSize:32 StorageOffset:{{(4|8)}}
155 // LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:24 IsSigned:0 StorageSize:32 StorageOffset:{{(4|8)}}
156 // CHECK-NEXT: ]>