[AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (#121850)
[llvm-project.git] / clang / test / CodeGenCXX / cxx2a-left-shift.cpp
blob4814cfb323815b99b9d9d40cb6ce72d5034a69f3
1 // RUN: %clang_cc1 -std=c++2a -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,REGULAR
2 // RUN: %clang_cc1 -std=c++2a -fsanitize=shift-base,shift-exponent -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,SANITIZED
4 // CHECK-LABEL: @_Z12lsh_overflow
5 int lsh_overflow(int a, int b) {
6 // SANITIZED: %[[RHS_INBOUNDS:.*]] = icmp ule i32 %[[RHS:.*]], 31
7 // SANITIZED-NEXT: br i1 %[[RHS_INBOUNDS]], label %[[VALID:.*]], label
9 // SANITIZED: call void @__ubsan_handle_shift_out_of_bounds
11 // No check for the LHS here.
12 // SANITIZED: [[VALID]]:
13 // SANITIZED-NEXT: shl i32 %
14 // SANITIZED-NEXT: ret i32
16 // Just ensure there's no nsw nuw flags here.
17 // REGULAR: shl i32 %
18 return a << b;