[AMDGPU][True16][CodeGen] true16 codegen pattern for v_med3_u/i16 (#121850)
[llvm-project.git] / clang / test / CodeGenHLSL / basic_types.hlsl
blobd987af45a649fb5551079d59e1cd658ad27f5c39
1 // RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
2 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
3 // RUN:   -emit-llvm -disable-llvm-passes -o - | FileCheck %s
4 // RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
5 // RUN:   dxil-pc-shadermodel6.3-library %s -fnative-half-type \
6 // RUN:   -emit-llvm -disable-llvm-passes -o - -DNAMESPACED| FileCheck %s
9 // CHECK: @uint16_t_Val = global i16 0, align 2
10 // CHECK: @int16_t_Val = global i16 0, align 2
11 // CHECK: @uint_Val = global i32 0, align 4
12 // CHECK: @uint64_t_Val = global i64 0, align 8
13 // CHECK: @int64_t_Val = global i64 0, align 8
14 // CHECK: @int16_t2_Val = global <2 x i16> zeroinitializer, align 4
15 // CHECK: @int16_t3_Val = global <3 x i16> zeroinitializer, align 8
16 // CHECK: @int16_t4_Val = global <4 x i16> zeroinitializer, align 8
17 // CHECK: @uint16_t2_Val = global <2 x i16> zeroinitializer, align 4
18 // CHECK: @uint16_t3_Val = global <3 x i16> zeroinitializer, align 8
19 // CHECK: @uint16_t4_Val = global <4 x i16> zeroinitializer, align 8
20 // CHECK: @int2_Val = global <2 x i32> zeroinitializer, align 8
21 // CHECK: @int3_Val = global <3 x i32> zeroinitializer, align 16
22 // CHECK: @int4_Val = global <4 x i32> zeroinitializer, align 16
23 // CHECK: @uint2_Val = global <2 x i32> zeroinitializer, align 8
24 // CHECK: @uint3_Val = global <3 x i32> zeroinitializer, align 16
25 // CHECK: @uint4_Val = global <4 x i32> zeroinitializer, align 16
26 // CHECK: @int64_t2_Val = global <2 x i64> zeroinitializer, align 16
27 // CHECK: @int64_t3_Val = global <3 x i64> zeroinitializer, align 32
28 // CHECK: @int64_t4_Val = global <4 x i64> zeroinitializer, align 32
29 // CHECK: @uint64_t2_Val = global <2 x i64> zeroinitializer, align 16
30 // CHECK: @uint64_t3_Val = global <3 x i64> zeroinitializer, align 32
31 // CHECK: @uint64_t4_Val = global <4 x i64> zeroinitializer, align 32
32 // CHECK: @half2_Val = global <2 x half> zeroinitializer, align 4
33 // CHECK: @half3_Val = global <3 x half> zeroinitializer, align 8
34 // CHECK: @half4_Val = global <4 x half> zeroinitializer, align 8
35 // CHECK: @float2_Val = global <2 x float> zeroinitializer, align 8
36 // CHECK: @float3_Val = global <3 x float> zeroinitializer, align 16
37 // CHECK: @float4_Val = global <4 x float> zeroinitializer, align 16
38 // CHECK: @double2_Val = global <2 x double> zeroinitializer, align 16
39 // CHECK: @double3_Val = global <3 x double> zeroinitializer, align 32
40 // CHECK: @double4_Val = global <4 x double> zeroinitializer, align 32
42 #ifdef NAMESPACED
43 #define TYPE_DECL(T)  hlsl::T T##_Val
44 #else
45 #define TYPE_DECL(T)  T T##_Val
46 #endif
48 #ifdef __HLSL_ENABLE_16_BIT
49 TYPE_DECL(uint16_t);
50 TYPE_DECL(int16_t);
51 #endif
53 // unsigned 32-bit integer.
54 TYPE_DECL(uint);
56 // 64-bit integer.
57 TYPE_DECL(uint64_t);
58 TYPE_DECL(int64_t);
60 // built-in vector data types:
62 #ifdef __HLSL_ENABLE_16_BIT
63 TYPE_DECL(int16_t2   );
64 TYPE_DECL(int16_t3   );
65 TYPE_DECL(int16_t4   );
66 TYPE_DECL( uint16_t2 );
67 TYPE_DECL( uint16_t3 );
68 TYPE_DECL( uint16_t4 );
69 #endif
71 TYPE_DECL( int2  );
72 TYPE_DECL( int3  );
73 TYPE_DECL( int4  );
74 TYPE_DECL( uint2 );
75 TYPE_DECL( uint3 );
76 TYPE_DECL( uint4     );
77 TYPE_DECL( int64_t2  );
78 TYPE_DECL( int64_t3  );
79 TYPE_DECL( int64_t4  );
80 TYPE_DECL( uint64_t2 );
81 TYPE_DECL( uint64_t3 );
82 TYPE_DECL( uint64_t4 );
84 #ifdef __HLSL_ENABLE_16_BIT
85 TYPE_DECL(half2 );
86 TYPE_DECL(half3 );
87 TYPE_DECL(half4 );
88 #endif
90 TYPE_DECL( float2  );
91 TYPE_DECL( float3  );
92 TYPE_DECL( float4  );
93 TYPE_DECL( double2 );
94 TYPE_DECL( double3 );
95 TYPE_DECL( double4 );