clang/test/Frontend/fixed_point_shift.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
   3 // RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED
   4
   5 short _Accum sa;
   6 _Accum a;
   7 long _Accum la;
   8
   9 short _Fract sf;
  10 _Fract f;
  11 long _Fract lf;
  12
  13 unsigned short _Accum usa;
  14 unsigned _Accum ua;
  15 unsigned long _Accum ula;
  16
  17 unsigned short _Fract usf;
  18 unsigned _Fract uf;
  19 unsigned long _Fract ulf;
  20
  21 _Sat short _Accum sa_sat;
  22 _Sat _Accum a_sat;
  23
  24 _Sat short _Fract sf_sat;
  25 _Sat _Fract f_sat;
  26
  27 _Sat unsigned short _Accum usa_sat;
  28 _Sat unsigned _Accum ua_sat;
  29
  30 _Sat unsigned short _Fract usf_sat;
  31 _Sat unsigned _Fract uf_sat;
  32
  33 int i;
  34 unsigned u;
  35
  36
  37 // CHECK-LABEL: @sleft_sasai(
  38 // CHECK-NEXT:  entry:
  39 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @sa, align 2
  40 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
  41 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
  42 // CHECK-NEXT:    [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]
  43 // CHECK-NEXT:    store i16 [[TMP3]], ptr @sa, align 2
  44 // CHECK-NEXT:    ret void
  45 //
  46 void sleft_sasai(void) {
  47   sa = sa << i;
  48 }
  49
  50 // CHECK-LABEL: @sleft_aai(
  51 // CHECK-NEXT:  entry:
  52 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @a, align 4
  53 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
  54 // CHECK-NEXT:    [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]
  55 // CHECK-NEXT:    store i32 [[TMP2]], ptr @a, align 4
  56 // CHECK-NEXT:    ret void
  57 //
  58 void sleft_aai(void) {
  59   a = a << i;
  60 }
  61
  62 // CHECK-LABEL: @sleft_lalai(
  63 // CHECK-NEXT:  entry:
  64 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @la, align 8
  65 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
  66 // CHECK-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
  67 // CHECK-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], [[TMP2]]
  68 // CHECK-NEXT:    store i64 [[TMP3]], ptr @la, align 8
  69 // CHECK-NEXT:    ret void
  70 //
  71 void sleft_lalai(void) {
  72   la = la << i;
  73 }
  74
  75 // CHECK-LABEL: @sleft_sfsfi(
  76 // CHECK-NEXT:  entry:
  77 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr @sf, align 1
  78 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
  79 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
  80 // CHECK-NEXT:    [[TMP3:%.*]] = shl i8 [[TMP0]], [[TMP2]]
  81 // CHECK-NEXT:    store i8 [[TMP3]], ptr @sf, align 1
  82 // CHECK-NEXT:    ret void
  83 //
  84 void sleft_sfsfi(void) {
  85   sf = sf << i;
  86 }
  87
  88 // CHECK-LABEL: @sleft_ffi(
  89 // CHECK-NEXT:  entry:
  90 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @f, align 2
  91 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
  92 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
  93 // CHECK-NEXT:    [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]
  94 // CHECK-NEXT:    store i16 [[TMP3]], ptr @f, align 2
  95 // CHECK-NEXT:    ret void
  96 //
  97 void sleft_ffi(void) {
  98   f = f << i;
  99 }
 100
 101 // CHECK-LABEL: @sleft_lflfi(
 102 // CHECK-NEXT:  entry:
 103 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @lf, align 4
 104 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 105 // CHECK-NEXT:    [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]
 106 // CHECK-NEXT:    store i32 [[TMP2]], ptr @lf, align 4
 107 // CHECK-NEXT:    ret void
 108 //
 109 void sleft_lflfi(void) {
 110   lf = lf << i;
 111 }
 112
 113 // CHECK-LABEL: @sleft_aau(
 114 // CHECK-NEXT:  entry:
 115 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @a, align 4
 116 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @u, align 4
 117 // CHECK-NEXT:    [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]
 118 // CHECK-NEXT:    store i32 [[TMP2]], ptr @a, align 4
 119 // CHECK-NEXT:    ret void
 120 //
 121 void sleft_aau(void) {
 122   a = a << u;
 123 }
 124
 125 // CHECK-LABEL: @sleft_ffu(
 126 // CHECK-NEXT:  entry:
 127 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @f, align 2
 128 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @u, align 4
 129 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 130 // CHECK-NEXT:    [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]
 131 // CHECK-NEXT:    store i16 [[TMP3]], ptr @f, align 2
 132 // CHECK-NEXT:    ret void
 133 //
 134 void sleft_ffu(void) {
 135   f = f << u;
 136 }
 137
 138
 139 // CHECK-LABEL: @uleft_usausai(
 140 // CHECK-NEXT:  entry:
 141 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @usa, align 2
 142 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 143 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 144 // CHECK-NEXT:    [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]
 145 // CHECK-NEXT:    store i16 [[TMP3]], ptr @usa, align 2
 146 // CHECK-NEXT:    ret void
 147 //
 148 void uleft_usausai(void) {
 149   usa = usa << i;
 150 }
 151
 152 // CHECK-LABEL: @uleft_uauai(
 153 // CHECK-NEXT:  entry:
 154 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @ua, align 4
 155 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 156 // CHECK-NEXT:    [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]
 157 // CHECK-NEXT:    store i32 [[TMP2]], ptr @ua, align 4
 158 // CHECK-NEXT:    ret void
 159 //
 160 void uleft_uauai(void) {
 161   ua = ua << i;
 162 }
 163
 164 // CHECK-LABEL: @uleft_ulaulai(
 165 // CHECK-NEXT:  entry:
 166 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @ula, align 8
 167 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 168 // CHECK-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
 169 // CHECK-NEXT:    [[TMP3:%.*]] = shl i64 [[TMP0]], [[TMP2]]
 170 // CHECK-NEXT:    store i64 [[TMP3]], ptr @ula, align 8
 171 // CHECK-NEXT:    ret void
 172 //
 173 void uleft_ulaulai(void) {
 174   ula = ula << i;
 175 }
 176
 177 // CHECK-LABEL: @uleft_usfusfi(
 178 // CHECK-NEXT:  entry:
 179 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr @usf, align 1
 180 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 181 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
 182 // CHECK-NEXT:    [[TMP3:%.*]] = shl i8 [[TMP0]], [[TMP2]]
 183 // CHECK-NEXT:    store i8 [[TMP3]], ptr @usf, align 1
 184 // CHECK-NEXT:    ret void
 185 //
 186 void uleft_usfusfi(void) {
 187   usf = usf << i;
 188 }
 189
 190 // CHECK-LABEL: @uleft_ufufi(
 191 // CHECK-NEXT:  entry:
 192 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf, align 2
 193 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 194 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 195 // CHECK-NEXT:    [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]
 196 // CHECK-NEXT:    store i16 [[TMP3]], ptr @uf, align 2
 197 // CHECK-NEXT:    ret void
 198 //
 199 void uleft_ufufi(void) {
 200   uf = uf << i;
 201 }
 202
 203 // CHECK-LABEL: @uleft_ulfulfi(
 204 // CHECK-NEXT:  entry:
 205 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @ulf, align 4
 206 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 207 // CHECK-NEXT:    [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]
 208 // CHECK-NEXT:    store i32 [[TMP2]], ptr @ulf, align 4
 209 // CHECK-NEXT:    ret void
 210 //
 211 void uleft_ulfulfi(void) {
 212   ulf = ulf << i;
 213 }
 214
 215 // CHECK-LABEL: @uleft_uauau(
 216 // CHECK-NEXT:  entry:
 217 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @ua, align 4
 218 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @u, align 4
 219 // CHECK-NEXT:    [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]]
 220 // CHECK-NEXT:    store i32 [[TMP2]], ptr @ua, align 4
 221 // CHECK-NEXT:    ret void
 222 //
 223 void uleft_uauau(void) {
 224   ua = ua << u;
 225 }
 226
 227 // CHECK-LABEL: @uleft_ufufu(
 228 // CHECK-NEXT:  entry:
 229 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf, align 2
 230 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @u, align 4
 231 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 232 // CHECK-NEXT:    [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]]
 233 // CHECK-NEXT:    store i16 [[TMP3]], ptr @uf, align 2
 234 // CHECK-NEXT:    ret void
 235 //
 236 void uleft_ufufu(void) {
 237   uf = uf << u;
 238 }
 239
 240
 241 // CHECK-LABEL: @sright_sasai(
 242 // CHECK-NEXT:  entry:
 243 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @sa, align 2
 244 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 245 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 246 // CHECK-NEXT:    [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]]
 247 // CHECK-NEXT:    store i16 [[TMP3]], ptr @sa, align 2
 248 // CHECK-NEXT:    ret void
 249 //
 250 void sright_sasai(void) {
 251   sa = sa >> i;
 252 }
 253
 254 // CHECK-LABEL: @sright_aai(
 255 // CHECK-NEXT:  entry:
 256 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @a, align 4
 257 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 258 // CHECK-NEXT:    [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]]
 259 // CHECK-NEXT:    store i32 [[TMP2]], ptr @a, align 4
 260 // CHECK-NEXT:    ret void
 261 //
 262 void sright_aai(void) {
 263   a = a >> i;
 264 }
 265
 266 // CHECK-LABEL: @sright_lalai(
 267 // CHECK-NEXT:  entry:
 268 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @la, align 8
 269 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 270 // CHECK-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
 271 // CHECK-NEXT:    [[TMP3:%.*]] = ashr i64 [[TMP0]], [[TMP2]]
 272 // CHECK-NEXT:    store i64 [[TMP3]], ptr @la, align 8
 273 // CHECK-NEXT:    ret void
 274 //
 275 void sright_lalai(void) {
 276   la = la >> i;
 277 }
 278
 279 // CHECK-LABEL: @sright_sfsfi(
 280 // CHECK-NEXT:  entry:
 281 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr @sf, align 1
 282 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 283 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
 284 // CHECK-NEXT:    [[TMP3:%.*]] = ashr i8 [[TMP0]], [[TMP2]]
 285 // CHECK-NEXT:    store i8 [[TMP3]], ptr @sf, align 1
 286 // CHECK-NEXT:    ret void
 287 //
 288 void sright_sfsfi(void) {
 289   sf = sf >> i;
 290 }
 291
 292 // CHECK-LABEL: @sright_ffi(
 293 // CHECK-NEXT:  entry:
 294 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @f, align 2
 295 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 296 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 297 // CHECK-NEXT:    [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]]
 298 // CHECK-NEXT:    store i16 [[TMP3]], ptr @f, align 2
 299 // CHECK-NEXT:    ret void
 300 //
 301 void sright_ffi(void) {
 302   f = f >> i;
 303 }
 304
 305 // CHECK-LABEL: @sright_lflfi(
 306 // CHECK-NEXT:  entry:
 307 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @lf, align 4
 308 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 309 // CHECK-NEXT:    [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]]
 310 // CHECK-NEXT:    store i32 [[TMP2]], ptr @lf, align 4
 311 // CHECK-NEXT:    ret void
 312 //
 313 void sright_lflfi(void) {
 314   lf = lf >> i;
 315 }
 316
 317 // CHECK-LABEL: @sright_aau(
 318 // CHECK-NEXT:  entry:
 319 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @a, align 4
 320 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @u, align 4
 321 // CHECK-NEXT:    [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]]
 322 // CHECK-NEXT:    store i32 [[TMP2]], ptr @a, align 4
 323 // CHECK-NEXT:    ret void
 324 //
 325 void sright_aau(void) {
 326   a = a >> u;
 327 }
 328
 329 // CHECK-LABEL: @sright_ffu(
 330 // CHECK-NEXT:  entry:
 331 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @f, align 2
 332 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @u, align 4
 333 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 334 // CHECK-NEXT:    [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]]
 335 // CHECK-NEXT:    store i16 [[TMP3]], ptr @f, align 2
 336 // CHECK-NEXT:    ret void
 337 //
 338 void sright_ffu(void) {
 339   f = f >> u;
 340 }
 341
 342
 343 // CHECK-LABEL: @uright_usausai(
 344 // CHECK-NEXT:  entry:
 345 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @usa, align 2
 346 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 347 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 348 // CHECK-NEXT:    [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]]
 349 // CHECK-NEXT:    store i16 [[TMP3]], ptr @usa, align 2
 350 // CHECK-NEXT:    ret void
 351 //
 352 void uright_usausai(void) {
 353   usa = usa >> i;
 354 }
 355
 356 // CHECK-LABEL: @uright_uauai(
 357 // CHECK-NEXT:  entry:
 358 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @ua, align 4
 359 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 360 // CHECK-NEXT:    [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]]
 361 // CHECK-NEXT:    store i32 [[TMP2]], ptr @ua, align 4
 362 // CHECK-NEXT:    ret void
 363 //
 364 void uright_uauai(void) {
 365   ua = ua >> i;
 366 }
 367
 368 // CHECK-LABEL: @uright_ulaulai(
 369 // CHECK-NEXT:  entry:
 370 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @ula, align 8
 371 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 372 // CHECK-NEXT:    [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
 373 // CHECK-NEXT:    [[TMP3:%.*]] = lshr i64 [[TMP0]], [[TMP2]]
 374 // CHECK-NEXT:    store i64 [[TMP3]], ptr @ula, align 8
 375 // CHECK-NEXT:    ret void
 376 //
 377 void uright_ulaulai(void) {
 378   ula = ula >> i;
 379 }
 380
 381 // CHECK-LABEL: @uright_usfusfi(
 382 // CHECK-NEXT:  entry:
 383 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr @usf, align 1
 384 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 385 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
 386 // CHECK-NEXT:    [[TMP3:%.*]] = lshr i8 [[TMP0]], [[TMP2]]
 387 // CHECK-NEXT:    store i8 [[TMP3]], ptr @usf, align 1
 388 // CHECK-NEXT:    ret void
 389 //
 390 void uright_usfusfi(void) {
 391   usf = usf >> i;
 392 }
 393
 394 // CHECK-LABEL: @uright_ufufi(
 395 // CHECK-NEXT:  entry:
 396 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf, align 2
 397 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 398 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 399 // CHECK-NEXT:    [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]]
 400 // CHECK-NEXT:    store i16 [[TMP3]], ptr @uf, align 2
 401 // CHECK-NEXT:    ret void
 402 //
 403 void uright_ufufi(void) {
 404   uf = uf >> i;
 405 }
 406
 407 // CHECK-LABEL: @uright_ulfulfi(
 408 // CHECK-NEXT:  entry:
 409 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @ulf, align 4
 410 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 411 // CHECK-NEXT:    [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]]
 412 // CHECK-NEXT:    store i32 [[TMP2]], ptr @ulf, align 4
 413 // CHECK-NEXT:    ret void
 414 //
 415 void uright_ulfulfi(void) {
 416   ulf = ulf >> i;
 417 }
 418
 419 // CHECK-LABEL: @uright_uauau(
 420 // CHECK-NEXT:  entry:
 421 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @ua, align 4
 422 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @u, align 4
 423 // CHECK-NEXT:    [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]]
 424 // CHECK-NEXT:    store i32 [[TMP2]], ptr @ua, align 4
 425 // CHECK-NEXT:    ret void
 426 //
 427 void uright_uauau(void) {
 428   ua = ua >> u;
 429 }
 430
 431 // CHECK-LABEL: @uright_ufufu(
 432 // CHECK-NEXT:  entry:
 433 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf, align 2
 434 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @u, align 4
 435 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 436 // CHECK-NEXT:    [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]]
 437 // CHECK-NEXT:    store i16 [[TMP3]], ptr @uf, align 2
 438 // CHECK-NEXT:    ret void
 439 //
 440 void uright_ufufu(void) {
 441   uf = uf >> u;
 442 }
 443
 444
 445 // CHECK-LABEL: @satleft_sassasi(
 446 // CHECK-NEXT:  entry:
 447 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2
 448 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 449 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 450 // CHECK-NEXT:    [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])
 451 // CHECK-NEXT:    store i16 [[TMP3]], ptr @sa_sat, align 2
 452 // CHECK-NEXT:    ret void
 453 //
 454 void satleft_sassasi(void) {
 455   sa_sat = sa_sat << i;
 456 }
 457
 458 // CHECK-LABEL: @satleft_asasi(
 459 // CHECK-NEXT:  entry:
 460 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @a_sat, align 4
 461 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 462 // CHECK-NEXT:    [[TMP2:%.*]] = call i32 @llvm.sshl.sat.i32(i32 [[TMP0]], i32 [[TMP1]])
 463 // CHECK-NEXT:    store i32 [[TMP2]], ptr @a_sat, align 4
 464 // CHECK-NEXT:    ret void
 465 //
 466 void satleft_asasi(void) {
 467   a_sat = a_sat << i;
 468 }
 469
 470 // CHECK-LABEL: @satleft_sfssfsi(
 471 // CHECK-NEXT:  entry:
 472 // CHECK-NEXT:    [[TMP0:%.*]] = load i8, ptr @sf_sat, align 1
 473 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 474 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
 475 // CHECK-NEXT:    [[TMP3:%.*]] = call i8 @llvm.sshl.sat.i8(i8 [[TMP0]], i8 [[TMP2]])
 476 // CHECK-NEXT:    store i8 [[TMP3]], ptr @sf_sat, align 1
 477 // CHECK-NEXT:    ret void
 478 //
 479 void satleft_sfssfsi(void) {
 480   sf_sat = sf_sat << i;
 481 }
 482
 483 // CHECK-LABEL: @satleft_fsfsi(
 484 // CHECK-NEXT:  entry:
 485 // CHECK-NEXT:    [[TMP0:%.*]] = load i16, ptr @f_sat, align 2
 486 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 487 // CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 488 // CHECK-NEXT:    [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])
 489 // CHECK-NEXT:    store i16 [[TMP3]], ptr @f_sat, align 2
 490 // CHECK-NEXT:    ret void
 491 //
 492 void satleft_fsfsi(void) {
 493   f_sat = f_sat << i;
 494 }
 495
 496 // SIGNED-LABEL: @satleft_usasusasi(
 497 // SIGNED-NEXT:  entry:
 498 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2
 499 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 500 // SIGNED-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 501 // SIGNED-NEXT:    [[TMP3:%.*]] = call i16 @llvm.ushl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])
 502 // SIGNED-NEXT:    store i16 [[TMP3]], ptr @usa_sat, align 2
 503 // SIGNED-NEXT:    ret void
 504 //
 505 // UNSIGNED-LABEL: @satleft_usasusasi(
 506 // UNSIGNED-NEXT:  entry:
 507 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2
 508 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 509 // UNSIGNED-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 510 // UNSIGNED-NEXT:    [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])
 511 // UNSIGNED-NEXT:    store i16 [[TMP3]], ptr @usa_sat, align 2
 512 // UNSIGNED-NEXT:    ret void
 513 //
 514 void satleft_usasusasi(void) {
 515   usa_sat = usa_sat << i;
 516 }
 517
 518 // SIGNED-LABEL: @satleft_uasuasi(
 519 // SIGNED-NEXT:  entry:
 520 // SIGNED-NEXT:    [[TMP0:%.*]] = load i32, ptr @ua_sat, align 4
 521 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 522 // SIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.ushl.sat.i32(i32 [[TMP0]], i32 [[TMP1]])
 523 // SIGNED-NEXT:    store i32 [[TMP2]], ptr @ua_sat, align 4
 524 // SIGNED-NEXT:    ret void
 525 //
 526 // UNSIGNED-LABEL: @satleft_uasuasi(
 527 // UNSIGNED-NEXT:  entry:
 528 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i32, ptr @ua_sat, align 4
 529 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 530 // UNSIGNED-NEXT:    [[TMP2:%.*]] = call i32 @llvm.sshl.sat.i32(i32 [[TMP0]], i32 [[TMP1]])
 531 // UNSIGNED-NEXT:    store i32 [[TMP2]], ptr @ua_sat, align 4
 532 // UNSIGNED-NEXT:    ret void
 533 //
 534 void satleft_uasuasi(void) {
 535   ua_sat = ua_sat << i;
 536 }
 537
 538 // SIGNED-LABEL: @satleft_usfsusfsi(
 539 // SIGNED-NEXT:  entry:
 540 // SIGNED-NEXT:    [[TMP0:%.*]] = load i8, ptr @usf_sat, align 1
 541 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 542 // SIGNED-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
 543 // SIGNED-NEXT:    [[TMP3:%.*]] = call i8 @llvm.ushl.sat.i8(i8 [[TMP0]], i8 [[TMP2]])
 544 // SIGNED-NEXT:    store i8 [[TMP3]], ptr @usf_sat, align 1
 545 // SIGNED-NEXT:    ret void
 546 //
 547 // UNSIGNED-LABEL: @satleft_usfsusfsi(
 548 // UNSIGNED-NEXT:  entry:
 549 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i8, ptr @usf_sat, align 1
 550 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 551 // UNSIGNED-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
 552 // UNSIGNED-NEXT:    [[TMP3:%.*]] = call i8 @llvm.sshl.sat.i8(i8 [[TMP0]], i8 [[TMP2]])
 553 // UNSIGNED-NEXT:    store i8 [[TMP3]], ptr @usf_sat, align 1
 554 // UNSIGNED-NEXT:    ret void
 555 //
 556 void satleft_usfsusfsi(void) {
 557   usf_sat = usf_sat << i;
 558 }
 559
 560 // SIGNED-LABEL: @satleft_ufsufsi(
 561 // SIGNED-NEXT:  entry:
 562 // SIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2
 563 // SIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 564 // SIGNED-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 565 // SIGNED-NEXT:    [[TMP3:%.*]] = call i16 @llvm.ushl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])
 566 // SIGNED-NEXT:    store i16 [[TMP3]], ptr @uf_sat, align 2
 567 // SIGNED-NEXT:    ret void
 568 //
 569 // UNSIGNED-LABEL: @satleft_ufsufsi(
 570 // UNSIGNED-NEXT:  entry:
 571 // UNSIGNED-NEXT:    [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2
 572 // UNSIGNED-NEXT:    [[TMP1:%.*]] = load i32, ptr @i, align 4
 573 // UNSIGNED-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
 574 // UNSIGNED-NEXT:    [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]])
 575 // UNSIGNED-NEXT:    store i16 [[TMP3]], ptr @uf_sat, align 2
 576 // UNSIGNED-NEXT:    ret void
 577 //
 578 void satleft_ufsufsi(void) {
 579   uf_sat = uf_sat << i;
 580 }