[ELF] Reorder SectionBase/InputSectionBase members
[llvm-project.git] / clang / test / Frontend / fixed_point_unary.c
blobe84b763f3250863a29a490bbc462be67c9811567
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
3 // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -fpadding-on-unsigned-fixed-point -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED
5 _Accum a;
6 _Fract f;
7 long _Fract lf;
8 unsigned _Accum ua;
9 short unsigned _Accum usa;
10 unsigned _Fract uf;
12 _Sat _Accum sa;
13 _Sat _Fract sf;
14 _Sat long _Fract slf;
15 _Sat unsigned _Accum sua;
16 _Sat short unsigned _Accum susa;
17 _Sat unsigned _Fract suf;
19 int i;
21 // CHECK-LABEL: @inc_a(
22 // CHECK-NEXT: entry:
23 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
24 // CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], -32768
25 // CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 4
26 // CHECK-NEXT: ret void
28 void inc_a(void) {
29 a++;
32 // CHECK-LABEL: @inc_f(
33 // CHECK-NEXT: entry:
34 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2
35 // CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], -32768
36 // CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 2
37 // CHECK-NEXT: ret void
39 void inc_f(void) {
40 f++;
43 // CHECK-LABEL: @inc_lf(
44 // CHECK-NEXT: entry:
45 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4
46 // CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], -2147483648
47 // CHECK-NEXT: store i32 [[TMP1]], ptr @lf, align 4
48 // CHECK-NEXT: ret void
50 void inc_lf(void) {
51 lf++;
54 // SIGNED-LABEL: @inc_ua(
55 // SIGNED-NEXT: entry:
56 // SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4
57 // SIGNED-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 65536
58 // SIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4
59 // SIGNED-NEXT: ret void
61 // UNSIGNED-LABEL: @inc_ua(
62 // UNSIGNED-NEXT: entry:
63 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4
64 // UNSIGNED-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 32768
65 // UNSIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4
66 // UNSIGNED-NEXT: ret void
68 void inc_ua(void) {
69 ua++;
72 // SIGNED-LABEL: @inc_usa(
73 // SIGNED-NEXT: entry:
74 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2
75 // SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 256
76 // SIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2
77 // SIGNED-NEXT: ret void
79 // UNSIGNED-LABEL: @inc_usa(
80 // UNSIGNED-NEXT: entry:
81 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2
82 // UNSIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 128
83 // UNSIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2
84 // UNSIGNED-NEXT: ret void
86 void inc_usa(void) {
87 usa++;
90 // SIGNED-LABEL: @inc_uf(
91 // SIGNED-NEXT: entry:
92 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2
93 // SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], poison
94 // SIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2
95 // SIGNED-NEXT: ret void
97 // UNSIGNED-LABEL: @inc_uf(
98 // UNSIGNED-NEXT: entry:
99 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2
100 // UNSIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -32768
101 // UNSIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2
102 // UNSIGNED-NEXT: ret void
104 void inc_uf(void) {
105 uf++;
108 // CHECK-LABEL: @inc_sa(
109 // CHECK-NEXT: entry:
110 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4
111 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -32768)
112 // CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4
113 // CHECK-NEXT: ret void
115 void inc_sa(void) {
116 sa++;
119 // CHECK-LABEL: @inc_sf(
120 // CHECK-NEXT: entry:
121 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2
122 // CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 -32768)
123 // CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2
124 // CHECK-NEXT: ret void
126 void inc_sf(void) {
127 sf++;
130 // CHECK-LABEL: @inc_slf(
131 // CHECK-NEXT: entry:
132 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @slf, align 4
133 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -2147483648)
134 // CHECK-NEXT: store i32 [[TMP1]], ptr @slf, align 4
135 // CHECK-NEXT: ret void
137 void inc_slf(void) {
138 slf++;
141 // SIGNED-LABEL: @inc_sua(
142 // SIGNED-NEXT: entry:
143 // SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4
144 // SIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 65536)
145 // SIGNED-NEXT: store i32 [[TMP1]], ptr @sua, align 4
146 // SIGNED-NEXT: ret void
148 // UNSIGNED-LABEL: @inc_sua(
149 // UNSIGNED-NEXT: entry:
150 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4
151 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 32768)
152 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP1]] to i31
153 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32
154 // UNSIGNED-NEXT: store i32 [[RESIZE1]], ptr @sua, align 4
155 // UNSIGNED-NEXT: ret void
157 void inc_sua(void) {
158 sua++;
161 // SIGNED-LABEL: @inc_susa(
162 // SIGNED-NEXT: entry:
163 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2
164 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 256)
165 // SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2
166 // SIGNED-NEXT: ret void
168 // UNSIGNED-LABEL: @inc_susa(
169 // UNSIGNED-NEXT: entry:
170 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2
171 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 128)
172 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15
173 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
174 // UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2
175 // UNSIGNED-NEXT: ret void
177 void inc_susa(void) {
178 susa++;
181 // SIGNED-LABEL: @inc_suf(
182 // SIGNED-NEXT: entry:
183 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2
184 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 -1)
185 // SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2
186 // SIGNED-NEXT: ret void
188 // UNSIGNED-LABEL: @inc_suf(
189 // UNSIGNED-NEXT: entry:
190 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2
191 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 32767)
192 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15
193 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
194 // UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2
195 // UNSIGNED-NEXT: ret void
197 void inc_suf(void) {
198 suf++;
202 // CHECK-LABEL: @dec_a(
203 // CHECK-NEXT: entry:
204 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
205 // CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -32768
206 // CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 4
207 // CHECK-NEXT: ret void
209 void dec_a(void) {
210 a--;
213 // CHECK-LABEL: @dec_f(
214 // CHECK-NEXT: entry:
215 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2
216 // CHECK-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -32768
217 // CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 2
218 // CHECK-NEXT: ret void
220 void dec_f(void) {
221 f--;
224 // CHECK-LABEL: @dec_lf(
225 // CHECK-NEXT: entry:
226 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4
227 // CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -2147483648
228 // CHECK-NEXT: store i32 [[TMP1]], ptr @lf, align 4
229 // CHECK-NEXT: ret void
231 void dec_lf(void) {
232 lf--;
235 // SIGNED-LABEL: @dec_ua(
236 // SIGNED-NEXT: entry:
237 // SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4
238 // SIGNED-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 65536
239 // SIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4
240 // SIGNED-NEXT: ret void
242 // UNSIGNED-LABEL: @dec_ua(
243 // UNSIGNED-NEXT: entry:
244 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4
245 // UNSIGNED-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 32768
246 // UNSIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4
247 // UNSIGNED-NEXT: ret void
249 void dec_ua(void) {
250 ua--;
253 // SIGNED-LABEL: @dec_usa(
254 // SIGNED-NEXT: entry:
255 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2
256 // SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 256
257 // SIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2
258 // SIGNED-NEXT: ret void
260 // UNSIGNED-LABEL: @dec_usa(
261 // UNSIGNED-NEXT: entry:
262 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2
263 // UNSIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 128
264 // UNSIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2
265 // UNSIGNED-NEXT: ret void
267 void dec_usa(void) {
268 usa--;
271 // SIGNED-LABEL: @dec_uf(
272 // SIGNED-NEXT: entry:
273 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2
274 // SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], poison
275 // SIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2
276 // SIGNED-NEXT: ret void
278 // UNSIGNED-LABEL: @dec_uf(
279 // UNSIGNED-NEXT: entry:
280 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2
281 // UNSIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], -32768
282 // UNSIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2
283 // UNSIGNED-NEXT: ret void
285 void dec_uf(void) {
286 uf--;
289 // CHECK-LABEL: @dec_sa(
290 // CHECK-NEXT: entry:
291 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4
292 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -32768)
293 // CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4
294 // CHECK-NEXT: ret void
296 void dec_sa(void) {
297 sa--;
300 // CHECK-LABEL: @dec_sf(
301 // CHECK-NEXT: entry:
302 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2
303 // CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 -32768)
304 // CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2
305 // CHECK-NEXT: ret void
307 void dec_sf(void) {
308 sf--;
311 // CHECK-LABEL: @dec_slf(
312 // CHECK-NEXT: entry:
313 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @slf, align 4
314 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -2147483648)
315 // CHECK-NEXT: store i32 [[TMP1]], ptr @slf, align 4
316 // CHECK-NEXT: ret void
318 void dec_slf(void) {
319 slf--;
322 // SIGNED-LABEL: @dec_sua(
323 // SIGNED-NEXT: entry:
324 // SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4
325 // SIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[TMP0]], i32 65536)
326 // SIGNED-NEXT: store i32 [[TMP1]], ptr @sua, align 4
327 // SIGNED-NEXT: ret void
329 // UNSIGNED-LABEL: @dec_sua(
330 // UNSIGNED-NEXT: entry:
331 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4
332 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 32768)
333 // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
334 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[TMP1]]
335 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i31
336 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32
337 // UNSIGNED-NEXT: store i32 [[RESIZE1]], ptr @sua, align 4
338 // UNSIGNED-NEXT: ret void
340 void dec_sua(void) {
341 sua--;
344 // SIGNED-LABEL: @dec_susa(
345 // SIGNED-NEXT: entry:
346 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2
347 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 256)
348 // SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2
349 // SIGNED-NEXT: ret void
351 // UNSIGNED-LABEL: @dec_susa(
352 // UNSIGNED-NEXT: entry:
353 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2
354 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 128)
355 // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
356 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
357 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
358 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
359 // UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2
360 // UNSIGNED-NEXT: ret void
362 void dec_susa(void) {
363 susa--;
366 // SIGNED-LABEL: @dec_suf(
367 // SIGNED-NEXT: entry:
368 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2
369 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 -1)
370 // SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2
371 // SIGNED-NEXT: ret void
373 // UNSIGNED-LABEL: @dec_suf(
374 // UNSIGNED-NEXT: entry:
375 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2
376 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 32767)
377 // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
378 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
379 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
380 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
381 // UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2
382 // UNSIGNED-NEXT: ret void
384 void dec_suf(void) {
385 suf--;
389 // CHECK-LABEL: @neg_a(
390 // CHECK-NEXT: entry:
391 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
392 // CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[TMP0]]
393 // CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 4
394 // CHECK-NEXT: ret void
396 void neg_a(void) {
397 a = -a;
400 // CHECK-LABEL: @neg_f(
401 // CHECK-NEXT: entry:
402 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2
403 // CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]
404 // CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 2
405 // CHECK-NEXT: ret void
407 void neg_f(void) {
408 f = -f;
411 // CHECK-LABEL: @neg_usa(
412 // CHECK-NEXT: entry:
413 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2
414 // CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]
415 // CHECK-NEXT: store i16 [[TMP1]], ptr @usa, align 2
416 // CHECK-NEXT: ret void
418 void neg_usa(void) {
419 usa = -usa;
422 // CHECK-LABEL: @neg_uf(
423 // CHECK-NEXT: entry:
424 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2
425 // CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]
426 // CHECK-NEXT: store i16 [[TMP1]], ptr @uf, align 2
427 // CHECK-NEXT: ret void
429 void neg_uf(void) {
430 uf = -uf;
433 // CHECK-LABEL: @neg_sa(
434 // CHECK-NEXT: entry:
435 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4
436 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 0, i32 [[TMP0]])
437 // CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4
438 // CHECK-NEXT: ret void
440 void neg_sa(void) {
441 sa = -sa;
444 // CHECK-LABEL: @neg_sf(
445 // CHECK-NEXT: entry:
446 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2
447 // CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
448 // CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2
449 // CHECK-NEXT: ret void
451 void neg_sf(void) {
452 sf = -sf;
455 // SIGNED-LABEL: @neg_susa(
456 // SIGNED-NEXT: entry:
457 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2
458 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])
459 // SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2
460 // SIGNED-NEXT: ret void
462 // UNSIGNED-LABEL: @neg_susa(
463 // UNSIGNED-NEXT: entry:
464 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2
465 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
466 // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
467 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
468 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
469 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
470 // UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2
471 // UNSIGNED-NEXT: ret void
473 void neg_susa(void) {
474 susa = -susa;
477 // SIGNED-LABEL: @neg_suf(
478 // SIGNED-NEXT: entry:
479 // SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2
480 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])
481 // SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2
482 // SIGNED-NEXT: ret void
484 // UNSIGNED-LABEL: @neg_suf(
485 // UNSIGNED-NEXT: entry:
486 // UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2
487 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
488 // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
489 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
490 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
491 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
492 // UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2
493 // UNSIGNED-NEXT: ret void
495 void neg_suf(void) {
496 suf = -suf;
500 // CHECK-LABEL: @plus_a(
501 // CHECK-NEXT: entry:
502 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
503 // CHECK-NEXT: store i32 [[TMP0]], ptr @a, align 4
504 // CHECK-NEXT: ret void
506 void plus_a(void) {
507 a = +a;
510 // CHECK-LABEL: @plus_uf(
511 // CHECK-NEXT: entry:
512 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2
513 // CHECK-NEXT: store i16 [[TMP0]], ptr @uf, align 2
514 // CHECK-NEXT: ret void
516 void plus_uf(void) {
517 uf = +uf;
520 // CHECK-LABEL: @plus_sa(
521 // CHECK-NEXT: entry:
522 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4
523 // CHECK-NEXT: store i32 [[TMP0]], ptr @sa, align 4
524 // CHECK-NEXT: ret void
526 void plus_sa(void) {
527 sa = +sa;
531 // CHECK-LABEL: @not_a(
532 // CHECK-NEXT: entry:
533 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4
534 // CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
535 // CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
536 // CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
537 // CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4
538 // CHECK-NEXT: ret void
540 void not_a(void) {
541 i = !a;
544 // CHECK-LABEL: @not_uf(
545 // CHECK-NEXT: entry:
546 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2
547 // CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0
548 // CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
549 // CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
550 // CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4
551 // CHECK-NEXT: ret void
553 void not_uf(void) {
554 i = !uf;
557 // CHECK-LABEL: @not_susa(
558 // CHECK-NEXT: entry:
559 // CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2
560 // CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0
561 // CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
562 // CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
563 // CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4
564 // CHECK-NEXT: ret void
566 void not_susa(void) {
567 i = !susa;