clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
   4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
   7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
   8
   9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5
  10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
  11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5
  12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7
  13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
  14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7
  15
  16 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
  17 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
  18 // RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
  19 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
  20 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
  21 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
  22
  23 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13
  24 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
  25 // RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13
  26 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15
  27 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -Wno-openmp-mapping
  28 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15
  29 // expected-no-diagnostics
  30 #ifndef HEADER
  31 #define HEADER
  32
  33 template <class T>
  34 struct S {
  35   T f;
  36   S(T a) : f(a) {}
  37   S() : f() {}
  38   operator T() { return T(); }
  39   ~S() {}
  40 };
  41
  42 template <typename T>
  43 T tmain() {
  44   S<T> test;
  45   T t_var = T();
  46   T vec[] = {1, 2};
  47   S<T> s_arr[] = {1, 2};
  48   S<T> &var = test;
  49   #pragma omp target
  50   #pragma omp teams distribute parallel for simd lastprivate(t_var, vec, s_arr, s_arr, var, var)
  51   for (int i = 0; i < 2; ++i) {
  52     vec[i] = t_var;
  53     s_arr[i] = var;
  54   }
  55   return T();
  56 }
  57
  58 int main() {
  59   static int svar;
  60   volatile double g;
  61   volatile double &g1 = g;
  62
  63   #ifdef LAMBDA
  64   [&]() {
  65     static float sfvar;
  66
  67     #pragma omp target
  68     #pragma omp teams distribute parallel for simd lastprivate(g, g1, svar, sfvar)
  69     for (int i = 0; i < 2; ++i) {
  70       // loop variables
  71
  72       // init private variables
  73       g = 1;
  74       g1 = 1;
  75       svar = 3;
  76       sfvar = 4.0;
  77       // skip final branch
  78
  79
  80
  81       // loop variables
  82
  83       // init private variables
  84
  85
  86       // skip 'final' simd branch and block (checked as part of simd)
  87
  88
  89
  90
  91       [&]() {
  92         g = 2;
  93         g1 = 2;
  94         svar = 4;
  95         sfvar = 8.0;
  96
  97       }();
  98     }
  99   }();
 100   return 0;
 101
 102
 103   #else
 104   S<float> test;
 105   int t_var = 0;
 106   int vec[] = {1, 2};
 107   S<float> s_arr[] = {1, 2};
 108   S<float> &var = test;
 109
 110   #pragma omp target
 111   #pragma omp teams distribute parallel for simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
 112   for (int i = 0; i < 2; ++i) {
 113     vec[i] = t_var;
 114     s_arr[i] = var;
 115   }
 116   int i;
 117
 118   return tmain<int>();
 119   #endif
 120 }
 121
 122
 123 // skip loop variables
 124
 125 // copy from parameters to local address variables
 126
 127 // load content of local address variables
 128 // the distribute loop
 129
 130 // lastprivates
 131
 132
 133 // gbl and bound tid vars, prev lb and ub vars
 134 // skip loop variables
 135
 136 // copy from parameters to local address variables
 137
 138 // load content of local address variables
 139 // the distribute loop
 140
 141 // assignment: vec[i] = t_var;
 142
 143 // assignment: s_arr[i] = var;
 144
 145
 146 // skip final branch and block
 147
 148 // lastprivates
 149
 150
 151 // template tmain
 152
 153
 154 // skip alloca of global_tid and bound_tid
 155 // skip loop variables
 156
 157 // skip init of bound and global tid
 158 // copy from parameters to local address variables
 159
 160 // load content of local address variables
 161
 162
 163 // lastprivates
 164
 165
 166 // skip alloca of global_tid and bound_tid, and prev lb and ub vars
 167 // skip loop variables
 168
 169 // skip init of bound and global tid
 170 // copy from parameters to local address variables
 171
 172 // load content of local address variables
 173
 174
 175 // assignment: vec[i] = t_var;
 176
 177 // assignment: s_arr[i] = var;
 178
 179
 180 // skip final branch and block
 181
 182 // lastprivates
 183
 184
 185
 186 #endif
 187 // CHECK1-LABEL: define {{[^@]+}}@main
 188 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 189 // CHECK1-NEXT:  entry:
 190 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 191 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
 192 // CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 193 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
 194 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 195 // CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 196 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 197 // CHECK1-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8
 198 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 199 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8
 200 // CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8
 201 // CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
 202 // CHECK1-NEXT:    ret i32 0
 203 //
 204 //
 205 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
 206 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
 207 // CHECK1-NEXT:  entry:
 208 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
 209 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
 210 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
 211 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
 212 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 213 // CHECK1-NEXT:    store i64 [[G]], ptr [[G_ADDR]], align 8
 214 // CHECK1-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 8
 215 // CHECK1-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
 216 // CHECK1-NEXT:    store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 217 // CHECK1-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 8
 218 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8
 219 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])
 220 // CHECK1-NEXT:    ret void
 221 //
 222 //
 223 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
 224 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 225 // CHECK1-NEXT:  entry:
 226 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 227 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 228 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 229 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 8
 230 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
 231 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 8
 232 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 233 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 234 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 235 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 236 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 237 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 238 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 239 // CHECK1-NEXT:    [[G2:%.*]] = alloca double, align 8
 240 // CHECK1-NEXT:    [[G13:%.*]] = alloca double, align 8
 241 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
 242 // CHECK1-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
 243 // CHECK1-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
 244 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 245 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 246 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 247 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 248 // CHECK1-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 8
 249 // CHECK1-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
 250 // CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 251 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 252 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8
 253 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
 254 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8
 255 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
 256 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 257 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 258 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 259 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 260 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
 261 // CHECK1-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 8
 262 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 263 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 264 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 265 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 266 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
 267 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 268 // CHECK1:       cond.true:
 269 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 270 // CHECK1:       cond.false:
 271 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 272 // CHECK1-NEXT:    br label [[COND_END]]
 273 // CHECK1:       cond.end:
 274 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
 275 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 276 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 277 // CHECK1-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
 278 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 279 // CHECK1:       omp.inner.for.cond:
 280 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
 281 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP4]]
 282 // CHECK1-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
 283 // CHECK1-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 284 // CHECK1:       omp.inner.for.body:
 285 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP4]]
 286 // CHECK1-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
 287 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP4]]
 288 // CHECK1-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
 289 // CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 8, !llvm.access.group [[ACC_GRP4]]
 290 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined, i64 [[TMP13]], i64 [[TMP15]], ptr [[G2]], ptr [[TMP16]], ptr [[SVAR5]], ptr [[SFVAR6]]), !llvm.access.group [[ACC_GRP4]]
 291 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 292 // CHECK1:       omp.inner.for.inc:
 293 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
 294 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP4]]
 295 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
 296 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
 297 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
 298 // CHECK1:       omp.inner.for.end:
 299 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 300 // CHECK1:       omp.loop.exit:
 301 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])
 302 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 303 // CHECK1-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
 304 // CHECK1-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 305 // CHECK1:       .omp.final.then:
 306 // CHECK1-NEXT:    store i32 2, ptr [[I]], align 4
 307 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 308 // CHECK1:       .omp.final.done:
 309 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 310 // CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
 311 // CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 312 // CHECK1:       .omp.lastprivate.then:
 313 // CHECK1-NEXT:    [[TMP23:%.*]] = load double, ptr [[G2]], align 8
 314 // CHECK1-NEXT:    store volatile double [[TMP23]], ptr [[TMP0]], align 8
 315 // CHECK1-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[_TMP4]], align 8
 316 // CHECK1-NEXT:    [[TMP25:%.*]] = load double, ptr [[TMP24]], align 8
 317 // CHECK1-NEXT:    store volatile double [[TMP25]], ptr [[TMP4]], align 8
 318 // CHECK1-NEXT:    [[TMP26:%.*]] = load i32, ptr [[SVAR5]], align 4
 319 // CHECK1-NEXT:    store i32 [[TMP26]], ptr [[TMP2]], align 4
 320 // CHECK1-NEXT:    [[TMP27:%.*]] = load float, ptr [[SFVAR6]], align 4
 321 // CHECK1-NEXT:    store float [[TMP27]], ptr [[TMP3]], align 4
 322 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 323 // CHECK1:       .omp.lastprivate.done:
 324 // CHECK1-NEXT:    ret void
 325 //
 326 //
 327 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
 328 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 329 // CHECK1-NEXT:  entry:
 330 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 331 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 332 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 333 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 334 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 335 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 8
 336 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
 337 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 8
 338 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 339 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 340 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 341 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 342 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 343 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 344 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 345 // CHECK1-NEXT:    [[G3:%.*]] = alloca double, align 8
 346 // CHECK1-NEXT:    [[G14:%.*]] = alloca double, align 8
 347 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8
 348 // CHECK1-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
 349 // CHECK1-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
 350 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 351 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
 352 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 353 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 354 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 355 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 356 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 357 // CHECK1-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 8
 358 // CHECK1-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
 359 // CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 360 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 361 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8
 362 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
 363 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8
 364 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
 365 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 366 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 367 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 368 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP4]] to i32
 369 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 370 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32
 371 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 372 // CHECK1-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
 373 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 374 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 375 // CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
 376 // CHECK1-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 8
 377 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 378 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
 379 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 380 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 381 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
 382 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 383 // CHECK1:       cond.true:
 384 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 385 // CHECK1:       cond.false:
 386 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 387 // CHECK1-NEXT:    br label [[COND_END]]
 388 // CHECK1:       cond.end:
 389 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 390 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 391 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 392 // CHECK1-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 393 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 394 // CHECK1:       omp.inner.for.cond:
 395 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]
 396 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]
 397 // CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 398 // CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 399 // CHECK1:       omp.inner.for.body:
 400 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 401 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
 402 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 403 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]
 404 // CHECK1-NEXT:    store double 1.000000e+00, ptr [[G3]], align 8, !llvm.access.group [[ACC_GRP8]]
 405 // CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP5]], align 8, !llvm.access.group [[ACC_GRP8]]
 406 // CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP8]]
 407 // CHECK1-NEXT:    store i32 3, ptr [[SVAR6]], align 4, !llvm.access.group [[ACC_GRP8]]
 408 // CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR7]], align 4, !llvm.access.group [[ACC_GRP8]]
 409 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
 410 // CHECK1-NEXT:    store ptr [[G3]], ptr [[TMP16]], align 8, !llvm.access.group [[ACC_GRP8]]
 411 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
 412 // CHECK1-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP5]], align 8, !llvm.access.group [[ACC_GRP8]]
 413 // CHECK1-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 8, !llvm.access.group [[ACC_GRP8]]
 414 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
 415 // CHECK1-NEXT:    store ptr [[SVAR6]], ptr [[TMP19]], align 8, !llvm.access.group [[ACC_GRP8]]
 416 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
 417 // CHECK1-NEXT:    store ptr [[SFVAR7]], ptr [[TMP20]], align 8, !llvm.access.group [[ACC_GRP8]]
 418 // CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]]
 419 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 420 // CHECK1:       omp.body.continue:
 421 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 422 // CHECK1:       omp.inner.for.inc:
 423 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 424 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
 425 // CHECK1-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 426 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
 427 // CHECK1:       omp.inner.for.end:
 428 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 429 // CHECK1:       omp.loop.exit:
 430 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP8]])
 431 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 432 // CHECK1-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
 433 // CHECK1-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 434 // CHECK1:       .omp.final.then:
 435 // CHECK1-NEXT:    store i32 2, ptr [[I]], align 4
 436 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 437 // CHECK1:       .omp.final.done:
 438 // CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 439 // CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
 440 // CHECK1-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 441 // CHECK1:       .omp.lastprivate.then:
 442 // CHECK1-NEXT:    [[TMP26:%.*]] = load double, ptr [[G3]], align 8
 443 // CHECK1-NEXT:    store volatile double [[TMP26]], ptr [[TMP0]], align 8
 444 // CHECK1-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP5]], align 8
 445 // CHECK1-NEXT:    [[TMP28:%.*]] = load double, ptr [[TMP27]], align 8
 446 // CHECK1-NEXT:    store volatile double [[TMP28]], ptr [[TMP6]], align 8
 447 // CHECK1-NEXT:    [[TMP29:%.*]] = load i32, ptr [[SVAR6]], align 4
 448 // CHECK1-NEXT:    store i32 [[TMP29]], ptr [[TMP2]], align 4
 449 // CHECK1-NEXT:    [[TMP30:%.*]] = load float, ptr [[SFVAR7]], align 4
 450 // CHECK1-NEXT:    store float [[TMP30]], ptr [[TMP3]], align 4
 451 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 452 // CHECK1:       .omp.lastprivate.done:
 453 // CHECK1-NEXT:    ret void
 454 //
 455 //
 456 // CHECK3-LABEL: define {{[^@]+}}@main
 457 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
 458 // CHECK3-NEXT:  entry:
 459 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 460 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
 461 // CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4
 462 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
 463 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 464 // CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4
 465 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 466 // CHECK3-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4
 467 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 468 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4
 469 // CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4
 470 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
 471 // CHECK3-NEXT:    ret i32 0
 472 //
 473 //
 474 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
 475 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
 476 // CHECK3-NEXT:  entry:
 477 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 478 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4
 479 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
 480 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
 481 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 482 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
 483 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
 484 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4
 485 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 486 // CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4
 487 // CHECK3-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
 488 // CHECK3-NEXT:    store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 489 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 490 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
 491 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4
 492 // CHECK3-NEXT:    [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8
 493 // CHECK3-NEXT:    store double [[TMP2]], ptr [[G2]], align 8
 494 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
 495 // CHECK3-NEXT:    [[TMP4:%.*]] = load double, ptr [[TMP3]], align 4
 496 // CHECK3-NEXT:    store double [[TMP4]], ptr [[G13]], align 8
 497 // CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4
 498 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4
 499 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])
 500 // CHECK3-NEXT:    ret void
 501 //
 502 //
 503 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
 504 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 505 // CHECK3-NEXT:  entry:
 506 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 507 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 508 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 509 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4
 510 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
 511 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 4
 512 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 513 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 514 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 515 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 516 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 517 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 518 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 519 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
 520 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
 521 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4
 522 // CHECK3-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
 523 // CHECK3-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
 524 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 525 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 526 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 527 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 528 // CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4
 529 // CHECK3-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
 530 // CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 531 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 532 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
 533 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
 534 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4
 535 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4
 536 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 537 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 538 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 539 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 540 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
 541 // CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4
 542 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 543 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 544 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 545 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 546 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
 547 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 548 // CHECK3:       cond.true:
 549 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 550 // CHECK3:       cond.false:
 551 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 552 // CHECK3-NEXT:    br label [[COND_END]]
 553 // CHECK3:       cond.end:
 554 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
 555 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 556 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 557 // CHECK3-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
 558 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 559 // CHECK3:       omp.inner.for.cond:
 560 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
 561 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
 562 // CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
 563 // CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 564 // CHECK3:       omp.inner.for.body:
 565 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]]
 566 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
 567 // CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP5]]
 568 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined, i32 [[TMP12]], i32 [[TMP13]], ptr [[G2]], ptr [[TMP14]], ptr [[SVAR5]], ptr [[SFVAR6]]), !llvm.access.group [[ACC_GRP5]]
 569 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 570 // CHECK3:       omp.inner.for.inc:
 571 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
 572 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]]
 573 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
 574 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
 575 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
 576 // CHECK3:       omp.inner.for.end:
 577 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 578 // CHECK3:       omp.loop.exit:
 579 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP6]])
 580 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 581 // CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
 582 // CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 583 // CHECK3:       .omp.final.then:
 584 // CHECK3-NEXT:    store i32 2, ptr [[I]], align 4
 585 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 586 // CHECK3:       .omp.final.done:
 587 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 588 // CHECK3-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
 589 // CHECK3-NEXT:    br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 590 // CHECK3:       .omp.lastprivate.then:
 591 // CHECK3-NEXT:    [[TMP21:%.*]] = load double, ptr [[G2]], align 8
 592 // CHECK3-NEXT:    store volatile double [[TMP21]], ptr [[TMP0]], align 8
 593 // CHECK3-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[_TMP4]], align 4
 594 // CHECK3-NEXT:    [[TMP23:%.*]] = load double, ptr [[TMP22]], align 4
 595 // CHECK3-NEXT:    store volatile double [[TMP23]], ptr [[TMP4]], align 4
 596 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[SVAR5]], align 4
 597 // CHECK3-NEXT:    store i32 [[TMP24]], ptr [[TMP2]], align 4
 598 // CHECK3-NEXT:    [[TMP25:%.*]] = load float, ptr [[SFVAR6]], align 4
 599 // CHECK3-NEXT:    store float [[TMP25]], ptr [[TMP3]], align 4
 600 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 601 // CHECK3:       .omp.lastprivate.done:
 602 // CHECK3-NEXT:    ret void
 603 //
 604 //
 605 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
 606 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 607 // CHECK3-NEXT:  entry:
 608 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 609 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 610 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
 611 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
 612 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 613 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4
 614 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
 615 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 4
 616 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 617 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 618 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 619 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 620 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 621 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 622 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 623 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
 624 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
 625 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4
 626 // CHECK3-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
 627 // CHECK3-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
 628 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 629 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
 630 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 631 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 632 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 633 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 634 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 635 // CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4
 636 // CHECK3-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
 637 // CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 638 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 639 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
 640 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
 641 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4
 642 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4
 643 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 644 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 645 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 646 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 647 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_LB]], align 4
 648 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
 649 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 650 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 651 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
 652 // CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4
 653 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 654 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
 655 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 656 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 657 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
 658 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 659 // CHECK3:       cond.true:
 660 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 661 // CHECK3:       cond.false:
 662 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 663 // CHECK3-NEXT:    br label [[COND_END]]
 664 // CHECK3:       cond.end:
 665 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 666 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 667 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 668 // CHECK3-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 669 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 670 // CHECK3:       omp.inner.for.cond:
 671 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
 672 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
 673 // CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 674 // CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 675 // CHECK3:       omp.inner.for.body:
 676 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 677 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
 678 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 679 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
 680 // CHECK3-NEXT:    store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP9]]
 681 // CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP9]]
 682 // CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP9]]
 683 // CHECK3-NEXT:    store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP9]]
 684 // CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP9]]
 685 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
 686 // CHECK3-NEXT:    store ptr [[G2]], ptr [[TMP16]], align 4, !llvm.access.group [[ACC_GRP9]]
 687 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
 688 // CHECK3-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP9]]
 689 // CHECK3-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 4, !llvm.access.group [[ACC_GRP9]]
 690 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
 691 // CHECK3-NEXT:    store ptr [[SVAR5]], ptr [[TMP19]], align 4, !llvm.access.group [[ACC_GRP9]]
 692 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
 693 // CHECK3-NEXT:    store ptr [[SFVAR6]], ptr [[TMP20]], align 4, !llvm.access.group [[ACC_GRP9]]
 694 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP9]]
 695 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 696 // CHECK3:       omp.body.continue:
 697 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 698 // CHECK3:       omp.inner.for.inc:
 699 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 700 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
 701 // CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 702 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
 703 // CHECK3:       omp.inner.for.end:
 704 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 705 // CHECK3:       omp.loop.exit:
 706 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP8]])
 707 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 708 // CHECK3-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
 709 // CHECK3-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 710 // CHECK3:       .omp.final.then:
 711 // CHECK3-NEXT:    store i32 2, ptr [[I]], align 4
 712 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 713 // CHECK3:       .omp.final.done:
 714 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 715 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
 716 // CHECK3-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 717 // CHECK3:       .omp.lastprivate.then:
 718 // CHECK3-NEXT:    [[TMP26:%.*]] = load double, ptr [[G2]], align 8
 719 // CHECK3-NEXT:    store volatile double [[TMP26]], ptr [[TMP0]], align 8
 720 // CHECK3-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP4]], align 4
 721 // CHECK3-NEXT:    [[TMP28:%.*]] = load double, ptr [[TMP27]], align 4
 722 // CHECK3-NEXT:    store volatile double [[TMP28]], ptr [[TMP6]], align 4
 723 // CHECK3-NEXT:    [[TMP29:%.*]] = load i32, ptr [[SVAR5]], align 4
 724 // CHECK3-NEXT:    store i32 [[TMP29]], ptr [[TMP2]], align 4
 725 // CHECK3-NEXT:    [[TMP30:%.*]] = load float, ptr [[SFVAR6]], align 4
 726 // CHECK3-NEXT:    store float [[TMP30]], ptr [[TMP3]], align 4
 727 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 728 // CHECK3:       .omp.lastprivate.done:
 729 // CHECK3-NEXT:    ret void
 730 //
 731 //
 732 // CHECK5-LABEL: define {{[^@]+}}@main
 733 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
 734 // CHECK5-NEXT:  entry:
 735 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 736 // CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8
 737 // CHECK5-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 738 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
 739 // CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 740 // CHECK5-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 741 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 742 // CHECK5-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8
 743 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 744 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8
 745 // CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8
 746 // CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
 747 // CHECK5-NEXT:    ret i32 0
 748 //
 749 //
 750 // CHECK7-LABEL: define {{[^@]+}}@main
 751 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
 752 // CHECK7-NEXT:  entry:
 753 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 754 // CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8
 755 // CHECK7-NEXT:    [[G1:%.*]] = alloca ptr, align 4
 756 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
 757 // CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 758 // CHECK7-NEXT:    store ptr [[G]], ptr [[G1]], align 4
 759 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 760 // CHECK7-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4
 761 // CHECK7-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 762 // CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4
 763 // CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4
 764 // CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
 765 // CHECK7-NEXT:    ret i32 0
 766 //
 767 //
 768 // CHECK9-LABEL: define {{[^@]+}}@main
 769 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
 770 // CHECK9-NEXT:  entry:
 771 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 772 // CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8
 773 // CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 774 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 775 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
 776 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 777 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
 778 // CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
 779 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 780 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
 781 // CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
 782 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8
 783 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8
 784 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8
 785 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 786 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 787 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
 788 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 789 // CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 790 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 791 // CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4
 792 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
 793 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)
 794 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1
 795 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
 796 // CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
 797 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
 798 // CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
 799 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
 800 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
 801 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
 802 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
 803 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
 804 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
 805 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
 806 // CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
 807 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8
 808 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 809 // CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP8]], align 8
 810 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 811 // CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP9]], align 8
 812 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 813 // CHECK9-NEXT:    store ptr null, ptr [[TMP10]], align 8
 814 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 815 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 8
 816 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 817 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 8
 818 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
 819 // CHECK9-NEXT:    store ptr null, ptr [[TMP13]], align 8
 820 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
 821 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 8
 822 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
 823 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 8
 824 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
 825 // CHECK9-NEXT:    store ptr null, ptr [[TMP16]], align 8
 826 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
 827 // CHECK9-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 8
 828 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
 829 // CHECK9-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 8
 830 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
 831 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
 832 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
 833 // CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP20]], align 8
 834 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
 835 // CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP21]], align 8
 836 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
 837 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
 838 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 839 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 840 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 841 // CHECK9-NEXT:    store i32 3, ptr [[TMP25]], align 4
 842 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 843 // CHECK9-NEXT:    store i32 5, ptr [[TMP26]], align 4
 844 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 845 // CHECK9-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
 846 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 847 // CHECK9-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
 848 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 849 // CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8
 850 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 851 // CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8
 852 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 853 // CHECK9-NEXT:    store ptr null, ptr [[TMP31]], align 8
 854 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 855 // CHECK9-NEXT:    store ptr null, ptr [[TMP32]], align 8
 856 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 857 // CHECK9-NEXT:    store i64 2, ptr [[TMP33]], align 8
 858 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 859 // CHECK9-NEXT:    store i64 0, ptr [[TMP34]], align 8
 860 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 861 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
 862 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 863 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
 864 // CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 865 // CHECK9-NEXT:    store i32 0, ptr [[TMP37]], align 4
 866 // CHECK9-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, ptr [[KERNEL_ARGS]])
 867 // CHECK9-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
 868 // CHECK9-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 869 // CHECK9:       omp_offload.failed:
 870 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]
 871 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 872 // CHECK9:       omp_offload.cont:
 873 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
 874 // CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
 875 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 876 // CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 877 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 878 // CHECK9:       arraydestroy.body:
 879 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 880 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 881 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 882 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
 883 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
 884 // CHECK9:       arraydestroy.done2:
 885 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
 886 // CHECK9-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
 887 // CHECK9-NEXT:    ret i32 [[TMP41]]
 888 //
 889 //
 890 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
 891 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
 892 // CHECK9-NEXT:  entry:
 893 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 894 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 895 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 896 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
 897 // CHECK9-NEXT:    ret void
 898 //
 899 //
 900 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
 901 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
 902 // CHECK9-NEXT:  entry:
 903 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 904 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
 905 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 906 // CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
 907 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 908 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
 909 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
 910 // CHECK9-NEXT:    ret void
 911 //
 912 //
 913 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110
 914 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
 915 // CHECK9-NEXT:  entry:
 916 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
 917 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 918 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 919 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 920 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
 921 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 922 // CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
 923 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
 924 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
 925 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
 926 // CHECK9-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
 927 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
 928 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
 929 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
 930 // CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
 931 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
 932 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])
 933 // CHECK9-NEXT:    ret void
 934 //
 935 //
 936 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined
 937 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
 938 // CHECK9-NEXT:  entry:
 939 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 940 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 941 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 942 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
 943 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 944 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 945 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
 946 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 947 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 948 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 949 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 950 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 951 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 952 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 953 // CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
 954 // CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
 955 // CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
 956 // CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 957 // CHECK9-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
 958 // CHECK9-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
 959 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
 960 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 961 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 962 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
 963 // CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
 964 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
 965 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
 966 // CHECK9-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
 967 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
 968 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
 969 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
 970 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
 971 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
 972 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
 973 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 974 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 975 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 976 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 977 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
 978 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 979 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
 980 // CHECK9:       arrayctor.loop:
 981 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
 982 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
 983 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
 984 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
 985 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
 986 // CHECK9:       arrayctor.cont:
 987 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
 988 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
 989 // CHECK9-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 8
 990 // CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 991 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
 992 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 993 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 994 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
 995 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 996 // CHECK9:       cond.true:
 997 // CHECK9-NEXT:    br label [[COND_END:%.*]]
 998 // CHECK9:       cond.false:
 999 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1000 // CHECK9-NEXT:    br label [[COND_END]]
1001 // CHECK9:       cond.end:
1002 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1003 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1004 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1005 // CHECK9-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
1006 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1007 // CHECK9:       omp.inner.for.cond:
1008 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
1009 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
1010 // CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1011 // CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1012 // CHECK9:       omp.inner.for.cond.cleanup:
1013 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1014 // CHECK9:       omp.inner.for.body:
1015 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]]
1016 // CHECK9-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
1017 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
1018 // CHECK9-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
1019 // CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP5]]
1020 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined.omp_outlined, i64 [[TMP14]], i64 [[TMP16]], ptr [[VEC3]], ptr [[T_VAR2]], ptr [[S_ARR4]], ptr [[TMP17]], ptr [[SVAR7]]), !llvm.access.group [[ACC_GRP5]]
1021 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1022 // CHECK9:       omp.inner.for.inc:
1023 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
1024 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]]
1025 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1026 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
1027 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1028 // CHECK9:       omp.inner.for.end:
1029 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1030 // CHECK9:       omp.loop.exit:
1031 // CHECK9-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1032 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1033 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
1034 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1035 // CHECK9-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1036 // CHECK9-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1037 // CHECK9:       .omp.final.then:
1038 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1039 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1040 // CHECK9:       .omp.final.done:
1041 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1042 // CHECK9-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1043 // CHECK9-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1044 // CHECK9:       .omp.lastprivate.then:
1045 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR2]], align 4
1046 // CHECK9-NEXT:    store i32 [[TMP26]], ptr [[TMP1]], align 4
1047 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)
1048 // CHECK9-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
1049 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i64 2
1050 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP27]]
1051 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1052 // CHECK9:       omp.arraycpy.body:
1053 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1054 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1055 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1056 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1057 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1058 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1059 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
1060 // CHECK9:       omp.arraycpy.done10:
1061 // CHECK9-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP6]], align 8
1062 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP28]], i64 4, i1 false)
1063 // CHECK9-NEXT:    [[TMP29:%.*]] = load i32, ptr [[SVAR7]], align 4
1064 // CHECK9-NEXT:    store i32 [[TMP29]], ptr [[TMP4]], align 4
1065 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1066 // CHECK9:       .omp.lastprivate.done:
1067 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1068 // CHECK9-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
1069 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
1070 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1071 // CHECK9:       arraydestroy.body:
1072 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1073 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1074 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1075 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
1076 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
1077 // CHECK9:       arraydestroy.done12:
1078 // CHECK9-NEXT:    ret void
1079 //
1080 //
1081 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined.omp_outlined
1082 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1083 // CHECK9-NEXT:  entry:
1084 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1085 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1086 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1087 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1088 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1089 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1090 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1091 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1092 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
1093 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1094 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1095 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1096 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1097 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1098 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1099 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1100 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1101 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1102 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1103 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1104 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1105 // CHECK9-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
1106 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1107 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1108 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1109 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1110 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1111 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1112 // CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1113 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1114 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1115 // CHECK9-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
1116 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1117 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1118 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1119 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1120 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
1121 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1122 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1123 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1124 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1125 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
1126 // CHECK9-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1127 // CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
1128 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1129 // CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
1130 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1131 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1132 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1133 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
1134 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1135 // CHECK9:       arrayctor.loop:
1136 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1137 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1138 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
1139 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1140 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1141 // CHECK9:       arrayctor.cont:
1142 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8
1143 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1144 // CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1145 // CHECK9-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1146 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
1147 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1148 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1149 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
1150 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1151 // CHECK9:       cond.true:
1152 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1153 // CHECK9:       cond.false:
1154 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1155 // CHECK9-NEXT:    br label [[COND_END]]
1156 // CHECK9:       cond.end:
1157 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1158 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1159 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1160 // CHECK9-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
1161 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1162 // CHECK9:       omp.inner.for.cond:
1163 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
1164 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
1165 // CHECK9-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1166 // CHECK9-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1167 // CHECK9:       omp.inner.for.cond.cleanup:
1168 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1169 // CHECK9:       omp.inner.for.body:
1170 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1171 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1172 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1173 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
1174 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP9]]
1175 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
1176 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
1177 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
1178 // CHECK9-NEXT:    store i32 [[TMP16]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]
1179 // CHECK9-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP9]]
1180 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
1181 // CHECK9-NEXT:    [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i64
1182 // CHECK9-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1183 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP18]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]]
1184 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1185 // CHECK9:       omp.body.continue:
1186 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1187 // CHECK9:       omp.inner.for.inc:
1188 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1189 // CHECK9-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP20]], 1
1190 // CHECK9-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1191 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1192 // CHECK9:       omp.inner.for.end:
1193 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1194 // CHECK9:       omp.loop.exit:
1195 // CHECK9-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1196 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1197 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
1198 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1199 // CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1200 // CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1201 // CHECK9:       .omp.final.then:
1202 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1203 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1204 // CHECK9:       .omp.final.done:
1205 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1206 // CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1207 // CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1208 // CHECK9:       .omp.lastprivate.then:
1209 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[T_VAR3]], align 4
1210 // CHECK9-NEXT:    store i32 [[TMP27]], ptr [[TMP1]], align 4
1211 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC4]], i64 8, i1 false)
1212 // CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
1213 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 2
1214 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN13]], [[TMP28]]
1215 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1216 // CHECK9:       omp.arraycpy.body:
1217 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1218 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1219 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1220 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1221 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1222 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]
1223 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1224 // CHECK9:       omp.arraycpy.done14:
1225 // CHECK9-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP7]], align 8
1226 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP7]], ptr align 4 [[TMP29]], i64 4, i1 false)
1227 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[SVAR8]], align 4
1228 // CHECK9-NEXT:    store i32 [[TMP30]], ptr [[TMP4]], align 4
1229 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1230 // CHECK9:       .omp.lastprivate.done:
1231 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1232 // CHECK9-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1233 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
1234 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1235 // CHECK9:       arraydestroy.body:
1236 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1237 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1238 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1239 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1240 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1241 // CHECK9:       arraydestroy.done16:
1242 // CHECK9-NEXT:    ret void
1243 //
1244 //
1245 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1246 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1247 // CHECK9-NEXT:  entry:
1248 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1249 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1250 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1251 // CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1252 // CHECK9-NEXT:    ret void
1253 //
1254 //
1255 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1256 // CHECK9-SAME: () #[[ATTR1]] comdat {
1257 // CHECK9-NEXT:  entry:
1258 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1259 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1260 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1261 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1262 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1263 // CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
1264 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1265 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1266 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
1267 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
1268 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
1269 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1270 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1271 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1272 // CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4
1273 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
1274 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)
1275 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1
1276 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1277 // CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
1278 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
1279 // CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
1280 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1281 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1282 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
1283 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
1284 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1285 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
1286 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1287 // CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP6]], align 8
1288 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1289 // CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP7]], align 8
1290 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1291 // CHECK9-NEXT:    store ptr null, ptr [[TMP8]], align 8
1292 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1293 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 8
1294 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1295 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 8
1296 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1297 // CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8
1298 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1299 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 8
1300 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1301 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 8
1302 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1303 // CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8
1304 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1305 // CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 8
1306 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1307 // CHECK9-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 8
1308 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1309 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
1310 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1311 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1312 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1313 // CHECK9-NEXT:    store i32 3, ptr [[TMP20]], align 4
1314 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1315 // CHECK9-NEXT:    store i32 4, ptr [[TMP21]], align 4
1316 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1317 // CHECK9-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 8
1318 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1319 // CHECK9-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 8
1320 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1321 // CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 8
1322 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1323 // CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8
1324 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1325 // CHECK9-NEXT:    store ptr null, ptr [[TMP26]], align 8
1326 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1327 // CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 8
1328 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1329 // CHECK9-NEXT:    store i64 2, ptr [[TMP28]], align 8
1330 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1331 // CHECK9-NEXT:    store i64 0, ptr [[TMP29]], align 8
1332 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1333 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4
1334 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1335 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4
1336 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1337 // CHECK9-NEXT:    store i32 0, ptr [[TMP32]], align 4
1338 // CHECK9-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
1339 // CHECK9-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
1340 // CHECK9-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1341 // CHECK9:       omp_offload.failed:
1342 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
1343 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1344 // CHECK9:       omp_offload.cont:
1345 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1346 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1347 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1348 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1349 // CHECK9:       arraydestroy.body:
1350 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1351 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1352 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1353 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1354 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1355 // CHECK9:       arraydestroy.done2:
1356 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1357 // CHECK9-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4
1358 // CHECK9-NEXT:    ret i32 [[TMP36]]
1359 //
1360 //
1361 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1362 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1363 // CHECK9-NEXT:  entry:
1364 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1365 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1366 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1367 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1368 // CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
1369 // CHECK9-NEXT:    ret void
1370 //
1371 //
1372 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1373 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1374 // CHECK9-NEXT:  entry:
1375 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1376 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1377 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1378 // CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1379 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1380 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1381 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1382 // CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 4
1383 // CHECK9-NEXT:    ret void
1384 //
1385 //
1386 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1387 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1388 // CHECK9-NEXT:  entry:
1389 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1390 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1391 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1392 // CHECK9-NEXT:    ret void
1393 //
1394 //
1395 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1396 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1397 // CHECK9-NEXT:  entry:
1398 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1399 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1400 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1401 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1402 // CHECK9-NEXT:    ret void
1403 //
1404 //
1405 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1406 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1407 // CHECK9-NEXT:  entry:
1408 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1409 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1410 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1411 // CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1412 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1413 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1414 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
1415 // CHECK9-NEXT:    ret void
1416 //
1417 //
1418 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1419 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1420 // CHECK9-NEXT:  entry:
1421 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1422 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1423 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1424 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1425 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1426 // CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1427 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1428 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1429 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1430 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1431 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1432 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1433 // CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
1434 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
1435 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]])
1436 // CHECK9-NEXT:    ret void
1437 //
1438 //
1439 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
1440 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1441 // CHECK9-NEXT:  entry:
1442 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1443 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1444 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1445 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1446 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1447 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1448 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1449 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1450 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1451 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1452 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1453 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1454 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1455 // CHECK9-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
1456 // CHECK9-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1457 // CHECK9-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
1458 // CHECK9-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1459 // CHECK9-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
1460 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1461 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1462 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1463 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1464 // CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1465 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1466 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1467 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1468 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1469 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1470 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1471 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1472 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1473 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1474 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1475 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1476 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
1477 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1478 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1479 // CHECK9:       arrayctor.loop:
1480 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1481 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1482 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1483 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1484 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1485 // CHECK9:       arrayctor.cont:
1486 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1487 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
1488 // CHECK9-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 8
1489 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1490 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1491 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1492 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1493 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
1494 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1495 // CHECK9:       cond.true:
1496 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1497 // CHECK9:       cond.false:
1498 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1499 // CHECK9-NEXT:    br label [[COND_END]]
1500 // CHECK9:       cond.end:
1501 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1502 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1503 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1504 // CHECK9-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
1505 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1506 // CHECK9:       omp.inner.for.cond:
1507 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
1508 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1509 // CHECK9-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1510 // CHECK9-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1511 // CHECK9:       omp.inner.for.cond.cleanup:
1512 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1513 // CHECK9:       omp.inner.for.body:
1514 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP14]]
1515 // CHECK9-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
1516 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1517 // CHECK9-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1518 // CHECK9-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP14]]
1519 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i64 [[TMP13]], i64 [[TMP15]], ptr [[VEC3]], ptr [[T_VAR2]], ptr [[S_ARR4]], ptr [[TMP16]]), !llvm.access.group [[ACC_GRP14]]
1520 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1521 // CHECK9:       omp.inner.for.inc:
1522 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1523 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP14]]
1524 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1525 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1526 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1527 // CHECK9:       omp.inner.for.end:
1528 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1529 // CHECK9:       omp.loop.exit:
1530 // CHECK9-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1531 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1532 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
1533 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1534 // CHECK9-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1535 // CHECK9-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1536 // CHECK9:       .omp.final.then:
1537 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1538 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1539 // CHECK9:       .omp.final.done:
1540 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1541 // CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1542 // CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1543 // CHECK9:       .omp.lastprivate.then:
1544 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[T_VAR2]], align 4
1545 // CHECK9-NEXT:    store i32 [[TMP25]], ptr [[TMP1]], align 4
1546 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)
1547 // CHECK9-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
1548 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN8]], i64 2
1549 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN8]], [[TMP26]]
1550 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1551 // CHECK9:       omp.arraycpy.body:
1552 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1553 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN8]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1554 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1555 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1556 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1557 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]
1558 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
1559 // CHECK9:       omp.arraycpy.done9:
1560 // CHECK9-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP6]], align 8
1561 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[TMP27]], i64 4, i1 false)
1562 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1563 // CHECK9:       .omp.lastprivate.done:
1564 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1565 // CHECK9-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
1566 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
1567 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1568 // CHECK9:       arraydestroy.body:
1569 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1570 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1571 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1572 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
1573 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
1574 // CHECK9:       arraydestroy.done11:
1575 // CHECK9-NEXT:    ret void
1576 //
1577 //
1578 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
1579 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1580 // CHECK9-NEXT:  entry:
1581 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1582 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1583 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1584 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1585 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1586 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1587 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1588 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1589 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1590 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1591 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1592 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1593 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1594 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1595 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1596 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1597 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1598 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1599 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1600 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1601 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1602 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1603 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1604 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1605 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1606 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1607 // CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1608 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1609 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1610 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1611 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1612 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1613 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1614 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1615 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1616 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1617 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1618 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP4]] to i32
1619 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1620 // CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32
1621 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1622 // CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
1623 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1624 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1625 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1626 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1627 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1628 // CHECK9:       arrayctor.loop:
1629 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1630 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1631 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1632 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1633 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1634 // CHECK9:       arrayctor.cont:
1635 // CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
1636 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1637 // CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1638 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1639 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1640 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1641 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1642 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1643 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1644 // CHECK9:       cond.true:
1645 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1646 // CHECK9:       cond.false:
1647 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1648 // CHECK9-NEXT:    br label [[COND_END]]
1649 // CHECK9:       cond.end:
1650 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1651 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1652 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1653 // CHECK9-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1654 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1655 // CHECK9:       omp.inner.for.cond:
1656 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]]
1657 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]]
1658 // CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1659 // CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1660 // CHECK9:       omp.inner.for.cond.cleanup:
1661 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1662 // CHECK9:       omp.inner.for.body:
1663 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1664 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1665 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1666 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1667 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP17]]
1668 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1669 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1670 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
1671 // CHECK9-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]]
1672 // CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP17]]
1673 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1674 // CHECK9-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i64
1675 // CHECK9-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
1676 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group [[ACC_GRP17]]
1677 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1678 // CHECK9:       omp.body.continue:
1679 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1680 // CHECK9:       omp.inner.for.inc:
1681 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1682 // CHECK9-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP19]], 1
1683 // CHECK9-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1684 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1685 // CHECK9:       omp.inner.for.end:
1686 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1687 // CHECK9:       omp.loop.exit:
1688 // CHECK9-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1689 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1690 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]])
1691 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1692 // CHECK9-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1693 // CHECK9-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1694 // CHECK9:       .omp.final.then:
1695 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1696 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1697 // CHECK9:       .omp.final.done:
1698 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1699 // CHECK9-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1700 // CHECK9-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1701 // CHECK9:       .omp.lastprivate.then:
1702 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 4
1703 // CHECK9-NEXT:    store i32 [[TMP26]], ptr [[TMP1]], align 4
1704 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC4]], i64 8, i1 false)
1705 // CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
1706 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
1707 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP27]]
1708 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1709 // CHECK9:       omp.arraycpy.body:
1710 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1711 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1712 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1713 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1714 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1715 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1716 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1717 // CHECK9:       omp.arraycpy.done13:
1718 // CHECK9-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 8
1719 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i64 4, i1 false)
1720 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1721 // CHECK9:       .omp.lastprivate.done:
1722 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1723 // CHECK9-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1724 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
1725 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1726 // CHECK9:       arraydestroy.body:
1727 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1728 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1729 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1730 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1731 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1732 // CHECK9:       arraydestroy.done15:
1733 // CHECK9-NEXT:    ret void
1734 //
1735 //
1736 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1737 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1738 // CHECK9-NEXT:  entry:
1739 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1740 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1741 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1742 // CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1743 // CHECK9-NEXT:    ret void
1744 //
1745 //
1746 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1747 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1748 // CHECK9-NEXT:  entry:
1749 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1750 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1751 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1752 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1753 // CHECK9-NEXT:    store i32 0, ptr [[F]], align 4
1754 // CHECK9-NEXT:    ret void
1755 //
1756 //
1757 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1758 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1759 // CHECK9-NEXT:  entry:
1760 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1761 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1762 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1763 // CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1764 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1765 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1766 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1767 // CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
1768 // CHECK9-NEXT:    ret void
1769 //
1770 //
1771 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1772 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1773 // CHECK9-NEXT:  entry:
1774 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1775 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1776 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1777 // CHECK9-NEXT:    ret void
1778 //
1779 //
1780 // CHECK11-LABEL: define {{[^@]+}}@main
1781 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1782 // CHECK11-NEXT:  entry:
1783 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1784 // CHECK11-NEXT:    [[G:%.*]] = alloca double, align 8
1785 // CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 4
1786 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1787 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1788 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1789 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1790 // CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
1791 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
1792 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1793 // CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
1794 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4
1795 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4
1796 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4
1797 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1798 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1799 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1800 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1801 // CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 4
1802 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1803 // CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 4
1804 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
1805 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)
1806 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1
1807 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1808 // CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
1809 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
1810 // CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
1811 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1812 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1813 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1814 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1815 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
1816 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
1817 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
1818 // CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
1819 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4
1820 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1821 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP8]], align 4
1822 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1823 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP9]], align 4
1824 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1825 // CHECK11-NEXT:    store ptr null, ptr [[TMP10]], align 4
1826 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1827 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 4
1828 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1829 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 4
1830 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1831 // CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 4
1832 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1833 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 4
1834 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1835 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 4
1836 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1837 // CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 4
1838 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1839 // CHECK11-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 4
1840 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1841 // CHECK11-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 4
1842 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1843 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 4
1844 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1845 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP20]], align 4
1846 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1847 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP21]], align 4
1848 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1849 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 4
1850 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1851 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1852 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1853 // CHECK11-NEXT:    store i32 3, ptr [[TMP25]], align 4
1854 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1855 // CHECK11-NEXT:    store i32 5, ptr [[TMP26]], align 4
1856 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1857 // CHECK11-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
1858 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1859 // CHECK11-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
1860 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1861 // CHECK11-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 4
1862 // CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1863 // CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 4
1864 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1865 // CHECK11-NEXT:    store ptr null, ptr [[TMP31]], align 4
1866 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1867 // CHECK11-NEXT:    store ptr null, ptr [[TMP32]], align 4
1868 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1869 // CHECK11-NEXT:    store i64 2, ptr [[TMP33]], align 8
1870 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1871 // CHECK11-NEXT:    store i64 0, ptr [[TMP34]], align 8
1872 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1873 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1874 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1875 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
1876 // CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1877 // CHECK11-NEXT:    store i32 0, ptr [[TMP37]], align 4
1878 // CHECK11-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, ptr [[KERNEL_ARGS]])
1879 // CHECK11-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1880 // CHECK11-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1881 // CHECK11:       omp_offload.failed:
1882 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]
1883 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1884 // CHECK11:       omp_offload.cont:
1885 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1886 // CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
1887 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1888 // CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1889 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1890 // CHECK11:       arraydestroy.body:
1891 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1892 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1893 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1894 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1895 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1896 // CHECK11:       arraydestroy.done2:
1897 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1898 // CHECK11-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
1899 // CHECK11-NEXT:    ret i32 [[TMP41]]
1900 //
1901 //
1902 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1903 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1904 // CHECK11-NEXT:  entry:
1905 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1906 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1907 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1908 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1909 // CHECK11-NEXT:    ret void
1910 //
1911 //
1912 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1913 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1914 // CHECK11-NEXT:  entry:
1915 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1916 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1917 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1918 // CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1919 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1920 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1921 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1922 // CHECK11-NEXT:    ret void
1923 //
1924 //
1925 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110
1926 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1927 // CHECK11-NEXT:  entry:
1928 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1929 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
1930 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1931 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
1932 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
1933 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
1934 // CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1935 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1936 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1937 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1938 // CHECK11-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
1939 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1940 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1941 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1942 // CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 4
1943 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1944 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])
1945 // CHECK11-NEXT:    ret void
1946 //
1947 //
1948 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined
1949 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1950 // CHECK11-NEXT:  entry:
1951 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1952 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1953 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
1954 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
1955 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1956 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
1957 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
1958 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
1959 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1960 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1961 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1962 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1963 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1964 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1965 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
1966 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1967 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
1968 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1969 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
1970 // CHECK11-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
1971 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1972 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1973 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1974 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1975 // CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1976 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1977 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1978 // CHECK11-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
1979 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1980 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
1981 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1982 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1983 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
1984 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
1985 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1986 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1987 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1988 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1989 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
1990 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1991 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1992 // CHECK11:       arrayctor.loop:
1993 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1994 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1995 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
1996 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1997 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1998 // CHECK11:       arrayctor.cont:
1999 // CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
2000 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2001 // CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2002 // CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2003 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2004 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2005 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2006 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2007 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2008 // CHECK11:       cond.true:
2009 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2010 // CHECK11:       cond.false:
2011 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2012 // CHECK11-NEXT:    br label [[COND_END]]
2013 // CHECK11:       cond.end:
2014 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2015 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2016 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2017 // CHECK11-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
2018 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2019 // CHECK11:       omp.inner.for.cond:
2020 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
2021 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
2022 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2023 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2024 // CHECK11:       omp.inner.for.cond.cleanup:
2025 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2026 // CHECK11:       omp.inner.for.body:
2027 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP6]]
2028 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
2029 // CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP6]]
2030 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined.omp_outlined, i32 [[TMP13]], i32 [[TMP14]], ptr [[VEC3]], ptr [[T_VAR2]], ptr [[S_ARR4]], ptr [[TMP15]], ptr [[SVAR7]]), !llvm.access.group [[ACC_GRP6]]
2031 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2032 // CHECK11:       omp.inner.for.inc:
2033 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2034 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP6]]
2035 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2036 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2037 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2038 // CHECK11:       omp.inner.for.end:
2039 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2040 // CHECK11:       omp.loop.exit:
2041 // CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2042 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
2043 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
2044 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2045 // CHECK11-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2046 // CHECK11-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2047 // CHECK11:       .omp.final.then:
2048 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
2049 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2050 // CHECK11:       .omp.final.done:
2051 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2052 // CHECK11-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2053 // CHECK11-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2054 // CHECK11:       .omp.lastprivate.then:
2055 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[T_VAR2]], align 4
2056 // CHECK11-NEXT:    store i32 [[TMP24]], ptr [[TMP1]], align 4
2057 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)
2058 // CHECK11-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
2059 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i32 2
2060 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP25]]
2061 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2062 // CHECK11:       omp.arraycpy.body:
2063 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2064 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2065 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2066 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2067 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2068 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]]
2069 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
2070 // CHECK11:       omp.arraycpy.done10:
2071 // CHECK11-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[_TMP6]], align 4
2072 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP26]], i32 4, i1 false)
2073 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[SVAR7]], align 4
2074 // CHECK11-NEXT:    store i32 [[TMP27]], ptr [[TMP4]], align 4
2075 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2076 // CHECK11:       .omp.lastprivate.done:
2077 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2078 // CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2079 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
2080 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2081 // CHECK11:       arraydestroy.body:
2082 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2083 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2084 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2085 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
2086 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
2087 // CHECK11:       arraydestroy.done12:
2088 // CHECK11-NEXT:    ret void
2089 //
2090 //
2091 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined.omp_outlined
2092 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2093 // CHECK11-NEXT:  entry:
2094 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2095 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2096 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2097 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2098 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2099 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
2100 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2101 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2102 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
2103 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2104 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2105 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2106 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2107 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2108 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2109 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2110 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2111 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2112 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
2113 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2114 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2115 // CHECK11-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
2116 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2117 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2118 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2119 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2120 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2121 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2122 // CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2123 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2124 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2125 // CHECK11-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
2126 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2127 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
2128 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2129 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2130 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
2131 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
2132 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2133 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2134 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2135 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2136 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
2137 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2138 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2139 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2140 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2141 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
2142 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2143 // CHECK11:       arrayctor.loop:
2144 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2145 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2146 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
2147 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2148 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2149 // CHECK11:       arrayctor.cont:
2150 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4
2151 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2152 // CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2153 // CHECK11-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2154 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
2155 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2156 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2157 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
2158 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2159 // CHECK11:       cond.true:
2160 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2161 // CHECK11:       cond.false:
2162 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2163 // CHECK11-NEXT:    br label [[COND_END]]
2164 // CHECK11:       cond.end:
2165 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2166 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2167 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2168 // CHECK11-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2169 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2170 // CHECK11:       omp.inner.for.cond:
2171 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
2172 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
2173 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2174 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2175 // CHECK11:       omp.inner.for.cond.cleanup:
2176 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2177 // CHECK11:       omp.inner.for.body:
2178 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2179 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2180 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2181 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
2182 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP10]]
2183 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
2184 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP17]]
2185 // CHECK11-NEXT:    store i32 [[TMP16]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
2186 // CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP10]]
2187 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
2188 // CHECK11-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP19]]
2189 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP18]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]]
2190 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2191 // CHECK11:       omp.body.continue:
2192 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2193 // CHECK11:       omp.inner.for.inc:
2194 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2195 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
2196 // CHECK11-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2197 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2198 // CHECK11:       omp.inner.for.end:
2199 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2200 // CHECK11:       omp.loop.exit:
2201 // CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2202 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2203 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
2204 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2205 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2206 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2207 // CHECK11:       .omp.final.then:
2208 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
2209 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2210 // CHECK11:       .omp.final.done:
2211 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2212 // CHECK11-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2213 // CHECK11-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2214 // CHECK11:       .omp.lastprivate.then:
2215 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[T_VAR2]], align 4
2216 // CHECK11-NEXT:    store i32 [[TMP27]], ptr [[TMP1]], align 4
2217 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)
2218 // CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
2219 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
2220 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP28]]
2221 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2222 // CHECK11:       omp.arraycpy.body:
2223 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2224 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2225 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2226 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2227 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2228 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]
2229 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2230 // CHECK11:       omp.arraycpy.done12:
2231 // CHECK11-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP6]], align 4
2232 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP7]], ptr align 4 [[TMP29]], i32 4, i1 false)
2233 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[SVAR7]], align 4
2234 // CHECK11-NEXT:    store i32 [[TMP30]], ptr [[TMP4]], align 4
2235 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2236 // CHECK11:       .omp.lastprivate.done:
2237 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2238 // CHECK11-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2239 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
2240 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2241 // CHECK11:       arraydestroy.body:
2242 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2243 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2244 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2245 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2246 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2247 // CHECK11:       arraydestroy.done14:
2248 // CHECK11-NEXT:    ret void
2249 //
2250 //
2251 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2252 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2253 // CHECK11-NEXT:  entry:
2254 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2255 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2256 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2257 // CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2258 // CHECK11-NEXT:    ret void
2259 //
2260 //
2261 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2262 // CHECK11-SAME: () #[[ATTR1]] comdat {
2263 // CHECK11-NEXT:  entry:
2264 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2265 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2266 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2267 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2268 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2269 // CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
2270 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2271 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2272 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
2273 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
2274 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
2275 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2276 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2277 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2278 // CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2279 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
2280 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)
2281 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1
2282 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2283 // CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
2284 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
2285 // CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
2286 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
2287 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
2288 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
2289 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
2290 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
2291 // CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
2292 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2293 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP6]], align 4
2294 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2295 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP7]], align 4
2296 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2297 // CHECK11-NEXT:    store ptr null, ptr [[TMP8]], align 4
2298 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2299 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 4
2300 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2301 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 4
2302 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2303 // CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 4
2304 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2305 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 4
2306 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2307 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 4
2308 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2309 // CHECK11-NEXT:    store ptr null, ptr [[TMP14]], align 4
2310 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2311 // CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 4
2312 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2313 // CHECK11-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 4
2314 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2315 // CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 4
2316 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2317 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2318 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2319 // CHECK11-NEXT:    store i32 3, ptr [[TMP20]], align 4
2320 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2321 // CHECK11-NEXT:    store i32 4, ptr [[TMP21]], align 4
2322 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2323 // CHECK11-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 4
2324 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2325 // CHECK11-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 4
2326 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2327 // CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 4
2328 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2329 // CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 4
2330 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2331 // CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 4
2332 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2333 // CHECK11-NEXT:    store ptr null, ptr [[TMP27]], align 4
2334 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2335 // CHECK11-NEXT:    store i64 2, ptr [[TMP28]], align 8
2336 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2337 // CHECK11-NEXT:    store i64 0, ptr [[TMP29]], align 8
2338 // CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2339 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4
2340 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2341 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4
2342 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2343 // CHECK11-NEXT:    store i32 0, ptr [[TMP32]], align 4
2344 // CHECK11-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
2345 // CHECK11-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
2346 // CHECK11-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2347 // CHECK11:       omp_offload.failed:
2348 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
2349 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2350 // CHECK11:       omp_offload.cont:
2351 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2352 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2353 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2354 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2355 // CHECK11:       arraydestroy.body:
2356 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2357 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2358 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2359 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2360 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2361 // CHECK11:       arraydestroy.done2:
2362 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2363 // CHECK11-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4
2364 // CHECK11-NEXT:    ret i32 [[TMP36]]
2365 //
2366 //
2367 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2368 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2369 // CHECK11-NEXT:  entry:
2370 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2371 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2372 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2373 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2374 // CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
2375 // CHECK11-NEXT:    ret void
2376 //
2377 //
2378 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2379 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2380 // CHECK11-NEXT:  entry:
2381 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2382 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2383 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2384 // CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2385 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2386 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2387 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2388 // CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 4
2389 // CHECK11-NEXT:    ret void
2390 //
2391 //
2392 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2393 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2394 // CHECK11-NEXT:  entry:
2395 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2396 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2397 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2398 // CHECK11-NEXT:    ret void
2399 //
2400 //
2401 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2402 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2403 // CHECK11-NEXT:  entry:
2404 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2405 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2406 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2407 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2408 // CHECK11-NEXT:    ret void
2409 //
2410 //
2411 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2412 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2413 // CHECK11-NEXT:  entry:
2414 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2415 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2416 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2417 // CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2418 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2419 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2420 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2421 // CHECK11-NEXT:    ret void
2422 //
2423 //
2424 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2425 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2426 // CHECK11-NEXT:  entry:
2427 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2428 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2429 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2430 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2431 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2432 // CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2433 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2434 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2435 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2436 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2437 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2438 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2439 // CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 4
2440 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
2441 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], ptr [[T_VAR_ADDR]], ptr [[TMP1]], ptr [[TMP3]])
2442 // CHECK11-NEXT:    ret void
2443 //
2444 //
2445 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
2446 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2447 // CHECK11-NEXT:  entry:
2448 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2449 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2450 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2451 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
2452 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2453 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2454 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2455 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2456 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2457 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2458 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2459 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2460 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2461 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2462 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2463 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2464 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2465 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2466 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2467 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2468 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2469 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2470 // CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2471 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2472 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2473 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2474 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
2475 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2476 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2477 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
2478 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2479 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
2480 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2481 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2482 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2483 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2484 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2485 // CHECK11:       arrayctor.loop:
2486 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2487 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2488 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
2489 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2490 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2491 // CHECK11:       arrayctor.cont:
2492 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
2493 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2494 // CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2495 // CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2496 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2497 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2498 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2499 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
2500 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2501 // CHECK11:       cond.true:
2502 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2503 // CHECK11:       cond.false:
2504 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2505 // CHECK11-NEXT:    br label [[COND_END]]
2506 // CHECK11:       cond.end:
2507 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2508 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2509 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2510 // CHECK11-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
2511 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2512 // CHECK11:       omp.inner.for.cond:
2513 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
2514 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
2515 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2516 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2517 // CHECK11:       omp.inner.for.cond.cleanup:
2518 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2519 // CHECK11:       omp.inner.for.body:
2520 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP15]]
2521 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
2522 // CHECK11-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP15]]
2523 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i32 [[TMP12]], i32 [[TMP13]], ptr [[VEC3]], ptr [[T_VAR2]], ptr [[S_ARR4]], ptr [[TMP14]]), !llvm.access.group [[ACC_GRP15]]
2524 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2525 // CHECK11:       omp.inner.for.inc:
2526 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
2527 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP15]]
2528 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2529 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
2530 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2531 // CHECK11:       omp.inner.for.end:
2532 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2533 // CHECK11:       omp.loop.exit:
2534 // CHECK11-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2535 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
2536 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])
2537 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2538 // CHECK11-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
2539 // CHECK11-NEXT:    br i1 [[TMP20]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2540 // CHECK11:       .omp.final.then:
2541 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
2542 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2543 // CHECK11:       .omp.final.done:
2544 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2545 // CHECK11-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2546 // CHECK11-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2547 // CHECK11:       .omp.lastprivate.then:
2548 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR2]], align 4
2549 // CHECK11-NEXT:    store i32 [[TMP23]], ptr [[TMP1]], align 4
2550 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)
2551 // CHECK11-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
2552 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN8]], i32 2
2553 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN8]], [[TMP24]]
2554 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE9:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2555 // CHECK11:       omp.arraycpy.body:
2556 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2557 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN8]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2558 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2559 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2560 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2561 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
2562 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE9]], label [[OMP_ARRAYCPY_BODY]]
2563 // CHECK11:       omp.arraycpy.done9:
2564 // CHECK11-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP6]], align 4
2565 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP4]], ptr align 4 [[TMP25]], i32 4, i1 false)
2566 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2567 // CHECK11:       .omp.lastprivate.done:
2568 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2569 // CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2570 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
2571 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2572 // CHECK11:       arraydestroy.body:
2573 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2574 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2575 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2576 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2577 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2578 // CHECK11:       arraydestroy.done11:
2579 // CHECK11-NEXT:    ret void
2580 //
2581 //
2582 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
2583 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2584 // CHECK11-NEXT:  entry:
2585 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2586 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2587 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2588 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2589 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2590 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
2591 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2592 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2593 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2594 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2595 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2596 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2597 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2598 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2599 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2600 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2601 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2602 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2603 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2604 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2605 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2606 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2607 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2608 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2609 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2610 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2611 // CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2612 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2613 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2614 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2615 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
2616 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2617 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2618 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
2619 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2620 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2621 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2622 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2623 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_LB]], align 4
2624 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
2625 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2626 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2627 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2628 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2629 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2630 // CHECK11:       arrayctor.loop:
2631 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2632 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2633 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
2634 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2635 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2636 // CHECK11:       arrayctor.cont:
2637 // CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
2638 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2639 // CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2640 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2641 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2642 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2643 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2644 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2645 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2646 // CHECK11:       cond.true:
2647 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2648 // CHECK11:       cond.false:
2649 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2650 // CHECK11-NEXT:    br label [[COND_END]]
2651 // CHECK11:       cond.end:
2652 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2653 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2654 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2655 // CHECK11-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2656 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2657 // CHECK11:       omp.inner.for.cond:
2658 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
2659 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
2660 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2661 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2662 // CHECK11:       omp.inner.for.cond.cleanup:
2663 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2664 // CHECK11:       omp.inner.for.body:
2665 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
2666 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2667 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2668 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
2669 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP18]]
2670 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
2671 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP16]]
2672 // CHECK11-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
2673 // CHECK11-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP18]]
2674 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
2675 // CHECK11-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP18]]
2676 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group [[ACC_GRP18]]
2677 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2678 // CHECK11:       omp.body.continue:
2679 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2680 // CHECK11:       omp.inner.for.inc:
2681 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
2682 // CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1
2683 // CHECK11-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
2684 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
2685 // CHECK11:       omp.inner.for.end:
2686 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2687 // CHECK11:       omp.loop.exit:
2688 // CHECK11-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2689 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
2690 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP21]])
2691 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2692 // CHECK11-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2693 // CHECK11-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2694 // CHECK11:       .omp.final.then:
2695 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
2696 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2697 // CHECK11:       .omp.final.done:
2698 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2699 // CHECK11-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2700 // CHECK11-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2701 // CHECK11:       .omp.lastprivate.then:
2702 // CHECK11-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR2]], align 4
2703 // CHECK11-NEXT:    store i32 [[TMP26]], ptr [[TMP1]], align 4
2704 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)
2705 // CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
2706 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
2707 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP27]]
2708 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2709 // CHECK11:       omp.arraycpy.body:
2710 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2711 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2712 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2713 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2714 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2715 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
2716 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
2717 // CHECK11:       omp.arraycpy.done11:
2718 // CHECK11-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP6]], align 4
2719 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i32 4, i1 false)
2720 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2721 // CHECK11:       .omp.lastprivate.done:
2722 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2723 // CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2724 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
2725 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2726 // CHECK11:       arraydestroy.body:
2727 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2728 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2729 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2730 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
2731 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
2732 // CHECK11:       arraydestroy.done13:
2733 // CHECK11-NEXT:    ret void
2734 //
2735 //
2736 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2737 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2738 // CHECK11-NEXT:  entry:
2739 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2740 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2741 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2742 // CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2743 // CHECK11-NEXT:    ret void
2744 //
2745 //
2746 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2747 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2748 // CHECK11-NEXT:  entry:
2749 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2750 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2751 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2752 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2753 // CHECK11-NEXT:    store i32 0, ptr [[F]], align 4
2754 // CHECK11-NEXT:    ret void
2755 //
2756 //
2757 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2758 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2759 // CHECK11-NEXT:  entry:
2760 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2761 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2762 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2763 // CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2764 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2765 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2766 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2767 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
2768 // CHECK11-NEXT:    ret void
2769 //
2770 //
2771 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2772 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2773 // CHECK11-NEXT:  entry:
2774 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2775 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2776 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2777 // CHECK11-NEXT:    ret void
2778 //
2779 //
2780 // CHECK13-LABEL: define {{[^@]+}}@main
2781 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
2782 // CHECK13-NEXT:  entry:
2783 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2784 // CHECK13-NEXT:    [[G:%.*]] = alloca double, align 8
2785 // CHECK13-NEXT:    [[G1:%.*]] = alloca ptr, align 8
2786 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2787 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2788 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2789 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2790 // CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
2791 // CHECK13-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2792 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2793 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2794 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2795 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2796 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2797 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
2798 // CHECK13-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
2799 // CHECK13-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
2800 // CHECK13-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2801 // CHECK13-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S]], align 4
2802 // CHECK13-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
2803 // CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
2804 // CHECK13-NEXT:    [[I15:%.*]] = alloca i32, align 4
2805 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2806 // CHECK13-NEXT:    store ptr [[G]], ptr [[G1]], align 8
2807 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2808 // CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2809 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
2810 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)
2811 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1
2812 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2813 // CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
2814 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
2815 // CHECK13-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
2816 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8
2817 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
2818 // CHECK13-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 8
2819 // CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
2820 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2821 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2822 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2823 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2824 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
2825 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
2826 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2827 // CHECK13:       arrayctor.loop:
2828 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2829 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2830 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
2831 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2832 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2833 // CHECK13:       arrayctor.cont:
2834 // CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
2835 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
2836 // CHECK13-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
2837 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2838 // CHECK13:       omp.inner.for.cond:
2839 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
2840 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
2841 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2842 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2843 // CHECK13:       omp.inner.for.cond.cleanup:
2844 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2845 // CHECK13:       omp.inner.for.body:
2846 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2847 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2848 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2849 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2850 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP2]]
2851 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2852 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
2853 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
2854 // CHECK13-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
2855 // CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP2]]
2856 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2857 // CHECK13-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP12]] to i64
2858 // CHECK13-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM8]]
2859 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]]
2860 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2861 // CHECK13:       omp.body.continue:
2862 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2863 // CHECK13:       omp.inner.for.inc:
2864 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2865 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP13]], 1
2866 // CHECK13-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2867 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2868 // CHECK13:       omp.inner.for.end:
2869 // CHECK13-NEXT:    store i32 2, ptr [[I]], align 4
2870 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 4
2871 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 4
2872 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i64 8, i1 false)
2873 // CHECK13-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2874 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
2875 // CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]
2876 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2877 // CHECK13:       omp.arraycpy.body:
2878 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2879 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2880 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
2881 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2882 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2883 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
2884 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2885 // CHECK13:       omp.arraycpy.done12:
2886 // CHECK13-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 8
2887 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)
2888 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 4
2889 // CHECK13-NEXT:    store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 4
2890 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3:[0-9]+]]
2891 // CHECK13-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
2892 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 2
2893 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2894 // CHECK13:       arraydestroy.body:
2895 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2896 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2897 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
2898 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2899 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2900 // CHECK13:       arraydestroy.done14:
2901 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
2902 // CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
2903 // CHECK13-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2904 // CHECK13-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN16]], i64 2
2905 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
2906 // CHECK13:       arraydestroy.body17:
2907 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
2908 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1
2909 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR3]]
2910 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
2911 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
2912 // CHECK13:       arraydestroy.done21:
2913 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]
2914 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 4
2915 // CHECK13-NEXT:    ret i32 [[TMP20]]
2916 //
2917 //
2918 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2919 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
2920 // CHECK13-NEXT:  entry:
2921 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2922 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2923 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2924 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2925 // CHECK13-NEXT:    ret void
2926 //
2927 //
2928 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2929 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2930 // CHECK13-NEXT:  entry:
2931 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2932 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2933 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2934 // CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2935 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2936 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2937 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
2938 // CHECK13-NEXT:    ret void
2939 //
2940 //
2941 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2942 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2943 // CHECK13-NEXT:  entry:
2944 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2945 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2946 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2947 // CHECK13-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]
2948 // CHECK13-NEXT:    ret void
2949 //
2950 //
2951 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2952 // CHECK13-SAME: () #[[ATTR1]] comdat {
2953 // CHECK13-NEXT:  entry:
2954 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2955 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2956 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2957 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2958 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2959 // CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
2960 // CHECK13-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2961 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2962 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2963 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2964 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2965 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2966 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
2967 // CHECK13-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
2968 // CHECK13-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
2969 // CHECK13-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2970 // CHECK13-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 4
2971 // CHECK13-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
2972 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2973 // CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2974 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
2975 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef signext 1)
2976 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1
2977 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
2978 // CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
2979 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
2980 // CHECK13-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
2981 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8
2982 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
2983 // CHECK13-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 8
2984 // CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
2985 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2986 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2987 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2988 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2989 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
2990 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
2991 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2992 // CHECK13:       arrayctor.loop:
2993 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2994 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2995 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
2996 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2997 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2998 // CHECK13:       arrayctor.cont:
2999 // CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
3000 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
3001 // CHECK13-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
3002 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3003 // CHECK13:       omp.inner.for.cond:
3004 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3005 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
3006 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3007 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3008 // CHECK13:       omp.inner.for.cond.cleanup:
3009 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3010 // CHECK13:       omp.inner.for.body:
3011 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
3012 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3013 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3014 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
3015 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP6]]
3016 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
3017 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
3018 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
3019 // CHECK13-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
3020 // CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP6]]
3021 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
3022 // CHECK13-NEXT:    [[IDXPROM8:%.*]] = sext i32 [[TMP12]] to i64
3023 // CHECK13-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM8]]
3024 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]]
3025 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3026 // CHECK13:       omp.body.continue:
3027 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3028 // CHECK13:       omp.inner.for.inc:
3029 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
3030 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP13]], 1
3031 // CHECK13-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
3032 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3033 // CHECK13:       omp.inner.for.end:
3034 // CHECK13-NEXT:    store i32 2, ptr [[I]], align 4
3035 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 4
3036 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 4
3037 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i64 8, i1 false)
3038 // CHECK13-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3039 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2
3040 // CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]
3041 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3042 // CHECK13:       omp.arraycpy.body:
3043 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3044 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3045 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
3046 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3047 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3048 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
3049 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3050 // CHECK13:       omp.arraycpy.done12:
3051 // CHECK13-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 8
3052 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)
3053 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3]]
3054 // CHECK13-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
3055 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2
3056 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3057 // CHECK13:       arraydestroy.body:
3058 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3059 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3060 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
3061 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3062 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3063 // CHECK13:       arraydestroy.done14:
3064 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3065 // CHECK13-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3066 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN15]], i64 2
3067 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
3068 // CHECK13:       arraydestroy.body16:
3069 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
3070 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i64 -1
3071 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]]
3072 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
3073 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
3074 // CHECK13:       arraydestroy.done20:
3075 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]
3076 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4
3077 // CHECK13-NEXT:    ret i32 [[TMP19]]
3078 //
3079 //
3080 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3081 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3082 // CHECK13-NEXT:  entry:
3083 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3084 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3085 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3086 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3087 // CHECK13-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
3088 // CHECK13-NEXT:    ret void
3089 //
3090 //
3091 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3092 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3093 // CHECK13-NEXT:  entry:
3094 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3095 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3096 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3097 // CHECK13-NEXT:    ret void
3098 //
3099 //
3100 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3101 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3102 // CHECK13-NEXT:  entry:
3103 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3104 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3105 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3106 // CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
3107 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3108 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3109 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
3110 // CHECK13-NEXT:    store float [[TMP0]], ptr [[F]], align 4
3111 // CHECK13-NEXT:    ret void
3112 //
3113 //
3114 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3115 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3116 // CHECK13-NEXT:  entry:
3117 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3118 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3119 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3120 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3121 // CHECK13-NEXT:    ret void
3122 //
3123 //
3124 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3125 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3126 // CHECK13-NEXT:  entry:
3127 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3128 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3129 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3130 // CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3131 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3132 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3133 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
3134 // CHECK13-NEXT:    ret void
3135 //
3136 //
3137 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3138 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3139 // CHECK13-NEXT:  entry:
3140 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3141 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3142 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3143 // CHECK13-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]
3144 // CHECK13-NEXT:    ret void
3145 //
3146 //
3147 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3148 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3149 // CHECK13-NEXT:  entry:
3150 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3151 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3152 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3153 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3154 // CHECK13-NEXT:    store i32 0, ptr [[F]], align 4
3155 // CHECK13-NEXT:    ret void
3156 //
3157 //
3158 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3159 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3160 // CHECK13-NEXT:  entry:
3161 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3162 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3163 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3164 // CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3165 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3166 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3167 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3168 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
3169 // CHECK13-NEXT:    ret void
3170 //
3171 //
3172 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3173 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3174 // CHECK13-NEXT:  entry:
3175 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3176 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3177 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3178 // CHECK13-NEXT:    ret void
3179 //
3180 //
3181 // CHECK15-LABEL: define {{[^@]+}}@main
3182 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
3183 // CHECK15-NEXT:  entry:
3184 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3185 // CHECK15-NEXT:    [[G:%.*]] = alloca double, align 8
3186 // CHECK15-NEXT:    [[G1:%.*]] = alloca ptr, align 4
3187 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3188 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3189 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3190 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3191 // CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
3192 // CHECK15-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
3193 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
3194 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3195 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3196 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3197 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3198 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
3199 // CHECK15-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
3200 // CHECK15-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
3201 // CHECK15-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
3202 // CHECK15-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S]], align 4
3203 // CHECK15-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 4
3204 // CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
3205 // CHECK15-NEXT:    [[I14:%.*]] = alloca i32, align 4
3206 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3207 // CHECK15-NEXT:    store ptr [[G]], ptr [[G1]], align 4
3208 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
3209 // CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 4
3210 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
3211 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)
3212 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i32 1
3213 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
3214 // CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
3215 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
3216 // CHECK15-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
3217 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4
3218 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4
3219 // CHECK15-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 4
3220 // CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
3221 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3222 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3223 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3224 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3225 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
3226 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
3227 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3228 // CHECK15:       arrayctor.loop:
3229 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3230 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3231 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
3232 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3233 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3234 // CHECK15:       arrayctor.cont:
3235 // CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4
3236 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
3237 // CHECK15-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 4
3238 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3239 // CHECK15:       omp.inner.for.cond:
3240 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]
3241 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]
3242 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3243 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3244 // CHECK15:       omp.inner.for.cond.cleanup:
3245 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3246 // CHECK15:       omp.inner.for.body:
3247 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3248 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3249 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3250 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
3251 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP3]]
3252 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
3253 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP10]]
3254 // CHECK15-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]
3255 // CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP7]], align 4, !llvm.access.group [[ACC_GRP3]]
3256 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
3257 // CHECK15-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 [[TMP12]]
3258 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]]
3259 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3260 // CHECK15:       omp.body.continue:
3261 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3262 // CHECK15:       omp.inner.for.inc:
3263 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3264 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1
3265 // CHECK15-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3266 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3267 // CHECK15:       omp.inner.for.end:
3268 // CHECK15-NEXT:    store i32 2, ptr [[I]], align 4
3269 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 4
3270 // CHECK15-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 4
3271 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i32 8, i1 false)
3272 // CHECK15-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
3273 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 2
3274 // CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP15]]
3275 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3276 // CHECK15:       omp.arraycpy.body:
3277 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3278 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3279 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
3280 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3281 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3282 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
3283 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
3284 // CHECK15:       omp.arraycpy.done11:
3285 // CHECK15-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 4
3286 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)
3287 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 4
3288 // CHECK15-NEXT:    store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 4
3289 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3:[0-9]+]]
3290 // CHECK15-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
3291 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 2
3292 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3293 // CHECK15:       arraydestroy.body:
3294 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3295 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3296 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
3297 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
3298 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
3299 // CHECK15:       arraydestroy.done13:
3300 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
3301 // CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
3302 // CHECK15-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
3303 // CHECK15-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i32 2
3304 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
3305 // CHECK15:       arraydestroy.body16:
3306 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
3307 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i32 -1
3308 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR3]]
3309 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
3310 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
3311 // CHECK15:       arraydestroy.done20:
3312 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]
3313 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 4
3314 // CHECK15-NEXT:    ret i32 [[TMP20]]
3315 //
3316 //
3317 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3318 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3319 // CHECK15-NEXT:  entry:
3320 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3321 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3322 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3323 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3324 // CHECK15-NEXT:    ret void
3325 //
3326 //
3327 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3328 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3329 // CHECK15-NEXT:  entry:
3330 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3331 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3332 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3333 // CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
3334 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3335 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
3336 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
3337 // CHECK15-NEXT:    ret void
3338 //
3339 //
3340 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3341 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3342 // CHECK15-NEXT:  entry:
3343 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3344 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3345 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3346 // CHECK15-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]
3347 // CHECK15-NEXT:    ret void
3348 //
3349 //
3350 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3351 // CHECK15-SAME: () #[[ATTR1]] comdat {
3352 // CHECK15-NEXT:  entry:
3353 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3354 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3355 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3356 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3357 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3358 // CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
3359 // CHECK15-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
3360 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
3361 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3362 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3363 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3364 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3365 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
3366 // CHECK15-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
3367 // CHECK15-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
3368 // CHECK15-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3369 // CHECK15-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0]], align 4
3370 // CHECK15-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 4
3371 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
3372 // CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 4
3373 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
3374 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)
3375 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i32 1
3376 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
3377 // CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
3378 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
3379 // CHECK15-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
3380 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4
3381 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4
3382 // CHECK15-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 4
3383 // CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
3384 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3385 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3386 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3387 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3388 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
3389 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
3390 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3391 // CHECK15:       arrayctor.loop:
3392 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3393 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3394 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
3395 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3396 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3397 // CHECK15:       arrayctor.cont:
3398 // CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4
3399 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
3400 // CHECK15-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 4
3401 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3402 // CHECK15:       omp.inner.for.cond:
3403 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
3404 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]
3405 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3406 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3407 // CHECK15:       omp.inner.for.cond.cleanup:
3408 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3409 // CHECK15:       omp.inner.for.body:
3410 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
3411 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3412 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3413 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
3414 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP7]]
3415 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
3416 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP10]]
3417 // CHECK15-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]]
3418 // CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP7]], align 4, !llvm.access.group [[ACC_GRP7]]
3419 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
3420 // CHECK15-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 [[TMP12]]
3421 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP7]]
3422 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3423 // CHECK15:       omp.body.continue:
3424 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3425 // CHECK15:       omp.inner.for.inc:
3426 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
3427 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1
3428 // CHECK15-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
3429 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
3430 // CHECK15:       omp.inner.for.end:
3431 // CHECK15-NEXT:    store i32 2, ptr [[I]], align 4
3432 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 4
3433 // CHECK15-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 4
3434 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC4]], i32 8, i1 false)
3435 // CHECK15-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3436 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
3437 // CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP15]]
3438 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3439 // CHECK15:       omp.arraycpy.body:
3440 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3441 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3442 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
3443 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3444 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3445 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
3446 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
3447 // CHECK15:       omp.arraycpy.done11:
3448 // CHECK15-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 4
3449 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)
3450 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR3]]
3451 // CHECK15-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
3452 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
3453 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3454 // CHECK15:       arraydestroy.body:
3455 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3456 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3457 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR3]]
3458 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
3459 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
3460 // CHECK15:       arraydestroy.done13:
3461 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3462 // CHECK15-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3463 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i32 2
3464 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY15:%.*]]
3465 // CHECK15:       arraydestroy.body15:
3466 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST16:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT17:%.*]], [[ARRAYDESTROY_BODY15]] ]
3467 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT17]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST16]], i32 -1
3468 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT17]]) #[[ATTR3]]
3469 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE18:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT17]], [[ARRAY_BEGIN14]]
3470 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE18]], label [[ARRAYDESTROY_DONE19:%.*]], label [[ARRAYDESTROY_BODY15]]
3471 // CHECK15:       arraydestroy.done19:
3472 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR3]]
3473 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4
3474 // CHECK15-NEXT:    ret i32 [[TMP19]]
3475 //
3476 //
3477 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3478 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3479 // CHECK15-NEXT:  entry:
3480 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3481 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3482 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3483 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3484 // CHECK15-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
3485 // CHECK15-NEXT:    ret void
3486 //
3487 //
3488 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3489 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3490 // CHECK15-NEXT:  entry:
3491 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3492 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3493 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3494 // CHECK15-NEXT:    ret void
3495 //
3496 //
3497 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3498 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3499 // CHECK15-NEXT:  entry:
3500 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3501 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3502 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3503 // CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
3504 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3505 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3506 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
3507 // CHECK15-NEXT:    store float [[TMP0]], ptr [[F]], align 4
3508 // CHECK15-NEXT:    ret void
3509 //
3510 //
3511 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3512 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3513 // CHECK15-NEXT:  entry:
3514 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3515 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3516 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3517 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3518 // CHECK15-NEXT:    ret void
3519 //
3520 //
3521 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3522 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3523 // CHECK15-NEXT:  entry:
3524 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3525 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3526 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3527 // CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3528 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3529 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3530 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
3531 // CHECK15-NEXT:    ret void
3532 //
3533 //
3534 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3535 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3536 // CHECK15-NEXT:  entry:
3537 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3538 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3539 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3540 // CHECK15-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3]]
3541 // CHECK15-NEXT:    ret void
3542 //
3543 //
3544 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3545 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3546 // CHECK15-NEXT:  entry:
3547 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3548 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3549 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3550 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3551 // CHECK15-NEXT:    store i32 0, ptr [[F]], align 4
3552 // CHECK15-NEXT:    ret void
3553 //
3554 //
3555 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3556 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3557 // CHECK15-NEXT:  entry:
3558 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3559 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3560 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3561 // CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3562 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3563 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3564 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3565 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
3566 // CHECK15-NEXT:    ret void
3567 //
3568 //
3569 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3570 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3571 // CHECK15-NEXT:  entry:
3572 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3573 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3574 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3575 // CHECK15-NEXT:    ret void
3576 //