1 // Check code generation
2 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=IR
4 // Check same results after serialization round-trip
5 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -emit-pch -o %t %s
6 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=IR
7 // expected-no-diagnostics
9 // The loop trip count used by #pragma omp for depends on code generated
10 // by #pragma omp file. Check that theses PreInits are emitted before
11 // the code generated by #pragma omp for.
16 // placeholder for loop body code.
17 extern "C" void body(...) {}
20 // IR-LABEL: define {{.*}}@func(
21 // IR-NEXT: [[ENTRY:.*]]:
22 // IR-NEXT: %[[START_ADDR:.+]] = alloca i32, align 4
23 // IR-NEXT: %[[END_ADDR:.+]] = alloca i32, align 4
24 // IR-NEXT: %[[STEP_ADDR:.+]] = alloca i32, align 4
25 // IR-NEXT: %[[DOTOMP_IV:.+]] = alloca i32, align 4
26 // IR-NEXT: %[[TMP:.+]] = alloca i32, align 4
27 // IR-NEXT: %[[I:.+]] = alloca i32, align 4
28 // IR-NEXT: %[[DOTCAPTURE_EXPR_:.+]] = alloca i32, align 4
29 // IR-NEXT: %[[DOTCAPTURE_EXPR_1:.+]] = alloca i32, align 4
30 // IR-NEXT: %[[DOTNEW_STEP:.+]] = alloca i32, align 4
31 // IR-NEXT: %[[DOTCAPTURE_EXPR_2:.+]] = alloca i32, align 4
32 // IR-NEXT: %[[DOTCAPTURE_EXPR_5:.+]] = alloca i32, align 4
33 // IR-NEXT: %[[DOTCAPTURE_EXPR_7:.+]] = alloca i32, align 4
34 // IR-NEXT: %[[DOTFLOOR_0_IV_I:.+]] = alloca i32, align 4
35 // IR-NEXT: %[[DOTOMP_LB:.+]] = alloca i32, align 4
36 // IR-NEXT: %[[DOTOMP_UB:.+]] = alloca i32, align 4
37 // IR-NEXT: %[[DOTOMP_STRIDE:.+]] = alloca i32, align 4
38 // IR-NEXT: %[[DOTOMP_IS_LAST:.+]] = alloca i32, align 4
39 // IR-NEXT: %[[DOTFLOOR_0_IV_I11:.+]] = alloca i32, align 4
40 // IR-NEXT: %[[DOTTILE_0_IV_I:.+]] = alloca i32, align 4
41 // IR-NEXT: %[[TMP0:.+]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:.+]])
42 // IR-NEXT: store i32 %[[START:.+]], ptr %[[START_ADDR]], align 4
43 // IR-NEXT: store i32 %[[END:.+]], ptr %[[END_ADDR]], align 4
44 // IR-NEXT: store i32 %[[STEP:.+]], ptr %[[STEP_ADDR]], align 4
45 // IR-NEXT: %[[TMP1:.+]] = load i32, ptr %[[START_ADDR]], align 4
46 // IR-NEXT: store i32 %[[TMP1]], ptr %[[I]], align 4
47 // IR-NEXT: %[[TMP2:.+]] = load i32, ptr %[[START_ADDR]], align 4
48 // IR-NEXT: store i32 %[[TMP2]], ptr %[[DOTCAPTURE_EXPR_]], align 4
49 // IR-NEXT: %[[TMP3:.+]] = load i32, ptr %[[END_ADDR]], align 4
50 // IR-NEXT: store i32 %[[TMP3]], ptr %[[DOTCAPTURE_EXPR_1]], align 4
51 // IR-NEXT: %[[TMP4:.+]] = load i32, ptr %[[STEP_ADDR]], align 4
52 // IR-NEXT: store i32 %[[TMP4]], ptr %[[DOTNEW_STEP]], align 4
53 // IR-NEXT: %[[TMP5:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_1]], align 4
54 // IR-NEXT: %[[TMP6:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_]], align 4
55 // IR-NEXT: %[[SUB:.+]] = sub i32 %[[TMP5]], %[[TMP6]]
56 // IR-NEXT: %[[SUB3:.+]] = sub i32 %[[SUB]], 1
57 // IR-NEXT: %[[TMP7:.+]] = load i32, ptr %[[DOTNEW_STEP]], align 4
58 // IR-NEXT: %[[ADD:.+]] = add i32 %[[SUB3]], %[[TMP7]]
59 // IR-NEXT: %[[TMP8:.+]] = load i32, ptr %[[DOTNEW_STEP]], align 4
60 // IR-NEXT: %[[DIV:.+]] = udiv i32 %[[ADD]], %[[TMP8]]
61 // IR-NEXT: %[[SUB4:.+]] = sub i32 %[[DIV]], 1
62 // IR-NEXT: store i32 %[[SUB4]], ptr %[[DOTCAPTURE_EXPR_2]], align 4
63 // IR-NEXT: %[[TMP9:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_2]], align 4
64 // IR-NEXT: %[[ADD6:.+]] = add i32 %[[TMP9]], 1
65 // IR-NEXT: store i32 %[[ADD6]], ptr %[[DOTCAPTURE_EXPR_5]], align 4
66 // IR-NEXT: %[[TMP10:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_5]], align 4
67 // IR-NEXT: %[[SUB8:.+]] = sub i32 %[[TMP10]], -3
68 // IR-NEXT: %[[DIV9:.+]] = udiv i32 %[[SUB8]], 4
69 // IR-NEXT: %[[SUB10:.+]] = sub i32 %[[DIV9]], 1
70 // IR-NEXT: store i32 %[[SUB10]], ptr %[[DOTCAPTURE_EXPR_7]], align 4
71 // IR-NEXT: store i32 0, ptr %[[DOTFLOOR_0_IV_I]], align 4
72 // IR-NEXT: %[[TMP11:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_5]], align 4
73 // IR-NEXT: %[[CMP:.+]] = icmp ult i32 0, %[[TMP11]]
74 // IR-NEXT: br i1 %[[CMP]], label %[[OMP_PRECOND_THEN:.+]], label %[[OMP_PRECOND_END:.+]]
76 // IR-NEXT: [[OMP_PRECOND_THEN]]:
77 // IR-NEXT: store i32 0, ptr %[[DOTOMP_LB]], align 4
78 // IR-NEXT: %[[TMP12:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_7]], align 4
79 // IR-NEXT: store i32 %[[TMP12]], ptr %[[DOTOMP_UB]], align 4
80 // IR-NEXT: store i32 1, ptr %[[DOTOMP_STRIDE]], align 4
81 // IR-NEXT: store i32 0, ptr %[[DOTOMP_IS_LAST]], align 4
82 // IR-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB1:.+]], i32 %[[TMP0]], i32 34, ptr %[[DOTOMP_IS_LAST]], ptr %[[DOTOMP_LB]], ptr %[[DOTOMP_UB]], ptr %[[DOTOMP_STRIDE]], i32 1, i32 1)
83 // IR-NEXT: %[[TMP13:.+]] = load i32, ptr %[[DOTOMP_UB]], align 4
84 // IR-NEXT: %[[TMP14:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_7]], align 4
85 // IR-NEXT: %[[CMP12:.+]] = icmp ugt i32 %[[TMP13]], %[[TMP14]]
86 // IR-NEXT: br i1 %[[CMP12]], label %[[COND_TRUE:.+]], label %[[COND_FALSE:.+]]
88 // IR-NEXT: [[COND_TRUE]]:
89 // IR-NEXT: %[[TMP15:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_7]], align 4
90 // IR-NEXT: br label %[[COND_END:.+]]
92 // IR-NEXT: [[COND_FALSE]]:
93 // IR-NEXT: %[[TMP16:.+]] = load i32, ptr %[[DOTOMP_UB]], align 4
94 // IR-NEXT: br label %[[COND_END]]
96 // IR-NEXT: [[COND_END]]:
97 // IR-NEXT: %[[COND:.+]] = phi i32 [ %[[TMP15]], %[[COND_TRUE]] ], [ %[[TMP16]], %[[COND_FALSE]] ]
98 // IR-NEXT: store i32 %[[COND]], ptr %[[DOTOMP_UB]], align 4
99 // IR-NEXT: %[[TMP17:.+]] = load i32, ptr %[[DOTOMP_LB]], align 4
100 // IR-NEXT: store i32 %[[TMP17]], ptr %[[DOTOMP_IV]], align 4
101 // IR-NEXT: br label %[[OMP_INNER_FOR_COND:.+]]
103 // IR-NEXT: [[OMP_INNER_FOR_COND]]:
104 // IR-NEXT: %[[TMP18:.+]] = load i32, ptr %[[DOTOMP_IV]], align 4
105 // IR-NEXT: %[[TMP19:.+]] = load i32, ptr %[[DOTOMP_UB]], align 4
106 // IR-NEXT: %[[ADD13:.+]] = add i32 %[[TMP19]], 1
107 // IR-NEXT: %[[CMP14:.+]] = icmp ult i32 %[[TMP18]], %[[ADD13]]
108 // IR-NEXT: br i1 %[[CMP14]], label %[[OMP_INNER_FOR_BODY:.+]], label %[[OMP_INNER_FOR_END:.+]]
110 // IR-NEXT: [[OMP_INNER_FOR_BODY]]:
111 // IR-NEXT: %[[TMP20:.+]] = load i32, ptr %[[DOTOMP_IV]], align 4
112 // IR-NEXT: %[[MUL:.+]] = mul i32 %[[TMP20]], 4
113 // IR-NEXT: %[[ADD15:.+]] = add i32 0, %[[MUL]]
114 // IR-NEXT: store i32 %[[ADD15]], ptr %[[DOTFLOOR_0_IV_I11]], align 4
115 // IR-NEXT: %[[TMP21:.+]] = load i32, ptr %[[DOTFLOOR_0_IV_I11]], align 4
116 // IR-NEXT: store i32 %[[TMP21]], ptr %[[DOTTILE_0_IV_I]], align 4
117 // IR-NEXT: br label %[[FOR_COND:.+]]
119 // IR-NEXT: [[FOR_COND]]:
120 // IR-NEXT: %[[TMP22:.+]] = load i32, ptr %[[DOTTILE_0_IV_I]], align 4
121 // IR-NEXT: %[[TMP23:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_2]], align 4
122 // IR-NEXT: %[[ADD16:.+]] = add i32 %[[TMP23]], 1
123 // IR-NEXT: %[[TMP24:.+]] = load i32, ptr %[[DOTFLOOR_0_IV_I11]], align 4
124 // IR-NEXT: %[[ADD17:.+]] = add i32 %[[TMP24]], 4
125 // IR-NEXT: %[[CMP18:.+]] = icmp ult i32 %[[ADD16]], %[[ADD17]]
126 // IR-NEXT: br i1 %[[CMP18]], label %[[COND_TRUE19:.+]], label %[[COND_FALSE21:.+]]
128 // IR-NEXT: [[COND_TRUE19]]:
129 // IR-NEXT: %[[TMP25:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_2]], align 4
130 // IR-NEXT: %[[ADD20:.+]] = add i32 %[[TMP25]], 1
131 // IR-NEXT: br label %[[COND_END23:.+]]
133 // IR-NEXT: [[COND_FALSE21]]:
134 // IR-NEXT: %[[TMP26:.+]] = load i32, ptr %[[DOTFLOOR_0_IV_I11]], align 4
135 // IR-NEXT: %[[ADD22:.+]] = add i32 %[[TMP26]], 4
136 // IR-NEXT: br label %[[COND_END23]]
138 // IR-NEXT: [[COND_END23]]:
139 // IR-NEXT: %[[COND24:.+]] = phi i32 [ %[[ADD20]], %[[COND_TRUE19]] ], [ %[[ADD22]], %[[COND_FALSE21]] ]
140 // IR-NEXT: %[[CMP25:.+]] = icmp ult i32 %[[TMP22]], %[[COND24]]
141 // IR-NEXT: br i1 %[[CMP25]], label %[[FOR_BODY:.+]], label %[[FOR_END:.+]]
143 // IR-NEXT: [[FOR_BODY]]:
144 // IR-NEXT: %[[TMP27:.+]] = load i32, ptr %[[DOTCAPTURE_EXPR_]], align 4
145 // IR-NEXT: %[[TMP28:.+]] = load i32, ptr %[[DOTTILE_0_IV_I]], align 4
146 // IR-NEXT: %[[TMP29:.+]] = load i32, ptr %[[DOTNEW_STEP]], align 4
147 // IR-NEXT: %[[MUL26:.+]] = mul i32 %[[TMP28]], %[[TMP29]]
148 // IR-NEXT: %[[ADD27:.+]] = add i32 %[[TMP27]], %[[MUL26]]
149 // IR-NEXT: store i32 %[[ADD27]], ptr %[[I]], align 4
150 // IR-NEXT: %[[TMP30:.+]] = load i32, ptr %[[START_ADDR]], align 4
151 // IR-NEXT: %[[TMP31:.+]] = load i32, ptr %[[END_ADDR]], align 4
152 // IR-NEXT: %[[TMP32:.+]] = load i32, ptr %[[STEP_ADDR]], align 4
153 // IR-NEXT: %[[TMP33:.+]] = load i32, ptr %[[I]], align 4
154 // IR-NEXT: call void (...) @body(i32 noundef %[[TMP30]], i32 noundef %[[TMP31]], i32 noundef %[[TMP32]], i32 noundef %[[TMP33]])
155 // IR-NEXT: br label %[[FOR_INC:.+]]
157 // IR-NEXT: [[FOR_INC]]:
158 // IR-NEXT: %[[TMP34:.+]] = load i32, ptr %[[DOTTILE_0_IV_I]], align 4
159 // IR-NEXT: %[[INC:.+]] = add i32 %[[TMP34]], 1
160 // IR-NEXT: store i32 %[[INC]], ptr %[[DOTTILE_0_IV_I]], align 4
161 // IR-NEXT: br label %[[FOR_COND]], !llvm.loop ![[LOOP3:[0-9]+]]
163 // IR-NEXT: [[FOR_END]]:
164 // IR-NEXT: br label %[[OMP_BODY_CONTINUE:.+]]
166 // IR-NEXT: [[OMP_BODY_CONTINUE]]:
167 // IR-NEXT: br label %[[OMP_INNER_FOR_INC:.+]]
169 // IR-NEXT: [[OMP_INNER_FOR_INC]]:
170 // IR-NEXT: %[[TMP35:.+]] = load i32, ptr %[[DOTOMP_IV]], align 4
171 // IR-NEXT: %[[ADD28:.+]] = add i32 %[[TMP35]], 1
172 // IR-NEXT: store i32 %[[ADD28]], ptr %[[DOTOMP_IV]], align 4
173 // IR-NEXT: br label %[[OMP_INNER_FOR_COND]]
175 // IR-NEXT: [[OMP_INNER_FOR_END]]:
176 // IR-NEXT: br label %[[OMP_LOOP_EXIT:.+]]
178 // IR-NEXT: [[OMP_LOOP_EXIT]]:
179 // IR-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 %[[TMP0]])
180 // IR-NEXT: br label %[[OMP_PRECOND_END]]
182 // IR-NEXT: [[OMP_PRECOND_END]]:
183 // IR-NEXT: call void @__kmpc_barrier(ptr @[[GLOB3:.+]], i32 %[[TMP0]])
186 extern "C" void func(int start
, int end
, int step
) {
188 #pragma omp tile sizes(4)
189 for (int i
= start
; i
< end
; i
+= step
)
190 body(start
, end
, step
, i
);