[clang][Driver] Support simplified triple versions for config files (#111387)
[llvm-project.git] / clang / test / Profile / c-mcdc-logicalop-ternary.c
blob18ce0b4e5dc1495cd483b46088ecf072c9e0c7be
1 // RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -fcoverage-mcdc | FileCheck %s -check-prefix=MCDC
2 // RUN: %clang_cc1 -triple %itanium_abi_triple %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping | FileCheck %s -check-prefix=NOMCDC
4 int test(int a, int b, int c, int d, int e, int f) {
5 return ((a || b) ? (c && d) : (e || f));
8 // NOMCDC-NOT: %mcdc.addr
9 // NOMCDC-NOT: __profbm_test
11 // MCDC BOOKKEEPING.
12 // MCDC: @__profbm_test = private global [2 x i8] zeroinitializer
14 // ALLOCATE MCDC TEMP AND ZERO IT.
15 // MCDC-LABEL: @test(
16 // MCDC: %mcdc.addr = alloca i32, align 4
17 // MCDC: store i32 0, ptr %mcdc.addr, align 4
19 // TERNARY TRUE SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 0.
20 // MCDC-LABEL: cond.true:
21 // MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 4
22 // MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 0
23 // MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 3
24 // MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]
25 // MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 7
26 // MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i8
27 // MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]
28 // MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 1
29 // MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]
30 // MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 1
32 // CHECK FOR ZERO OF MCDC TEMP
33 // MCDC: store i32 0, ptr %mcdc.addr, align 4
35 // TERNARY TRUE YIELDS TERNARY LHS LOGICAL-AND.
36 // TERNARY LHS LOGICAL-AND SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 1.
37 // MCDC-LABEL: land.end:
38 // MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 4
39 // MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 3
40 // MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 3
41 // MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]
42 // MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 7
43 // MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i8
44 // MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]
45 // MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 1
46 // MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]
47 // MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 1
49 // TERNARY FALSE SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 0.
50 // MCDC-LABEL: cond.false:
51 // MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 4
52 // MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 0
53 // MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 3
54 // MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]
55 // MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 7
56 // MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i8
57 // MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]
58 // MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 1
59 // MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]
60 // MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 1
62 // CHECK FOR ZERO OF MCDC TEMP
63 // MCDC: store i32 0, ptr %mcdc.addr, align 4
65 // TERNARY FALSE YIELDS TERNARY RHS LOGICAL-OR.
66 // TERNARY RHS LOGICAL-OR SHOULD UPDATE THE BITMAP WITH RESULT AT ELEMENT 2.
67 // MCDC-LABEL: lor.end:
68 // MCDC-DAG: %[[TEMP0:mcdc.temp[0-9]*]] = load i32, ptr %mcdc.addr, align 4
69 // MCDC: %[[TEMP:[0-9]+]] = add i32 %[[TEMP0]], 6
70 // MCDC: %[[LAB1:[0-9]+]] = lshr i32 %[[TEMP]], 3
71 // MCDC: %[[LAB4:[0-9]+]] = getelementptr inbounds i8, ptr @__profbm_test, i32 %[[LAB1]]
72 // MCDC: %[[LAB5:[0-9]+]] = and i32 %[[TEMP]], 7
73 // MCDC: %[[LAB6:[0-9]+]] = trunc i32 %[[LAB5]] to i8
74 // MCDC: %[[LAB7:[0-9]+]] = shl i8 1, %[[LAB6]]
75 // MCDC: %[[LAB8:.+]] = load i8, ptr %[[LAB4]], align 1
76 // MCDC: %[[LAB9:[0-9]+]] = or i8 %[[LAB8]], %[[LAB7]]
77 // MCDC: store i8 %[[LAB9]], ptr %[[LAB4]], align 1