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[RISCV] Reduce redundancy in vnsrl tests
[llvm-project.git]
/
flang
/
test
/
Driver
/
Inputs
/
ieee_arithmetic.mod
blob
30fd57801970b48ac0b01bd3369a1b5553df8541
1
!
DUMMY module
2
!
Added for testing purposes. The contents of this file are currently not relevant.
3
module ieee_arithmetic
4
type
::
ieee_round_type
5
integer
(
1
),
private
::
mode
=
0
_1
6
end type
7
end