flang/test/Lower/PowerPC/ppc-vec-insert-elem-order.f90

   1 ! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR" %s
   2 ! REQUIRES: target=powerpc{{.*}}
   3
   4 !CHECK-LABEL: vec_insert_testf32i64
   5 subroutine vec_insert_testf32i64(v, x, i8)
   6   real(4) :: v
   7   vector(real(4)) :: x
   8   vector(real(4)) :: r
   9   integer(8) :: i8
  10   r = vec_insert(v, x, i8)
  11
  12 ! LLVMIR: %[[v:.*]] = load float, ptr %{{[0-9]}}, align 4
  13 ! LLVMIR: %[[x:.*]] = load <4 x float>, ptr %{{[0-9]}}, align 16
  14 ! LLVMIR: %[[i8:.*]] = load i64, ptr %{{[0-9]}}, align 8
  15 ! LLVMIR: %[[urem:.*]] = urem i64 %[[i8]], 4
  16 ! LLVMIR: %[[sub:.*]] = sub i64 3, %[[urem]]
  17 ! LLVMIR: %[[r:.*]] = insertelement <4 x float> %[[x]], float %[[v]], i64 %[[sub]]
  18 ! LLVMIR: store <4 x float> %[[r]], ptr %{{[0-9]}}, align 16
  19 end subroutine vec_insert_testf32i64
  20
  21 !CHECK-LABEL: vec_insert_testi64i8
  22 subroutine vec_insert_testi64i8(v, x, i1, i2, i4, i8)
  23   integer(8) :: v
  24   vector(integer(8)) :: x
  25   vector(integer(8)) :: r
  26   integer(1) :: i1
  27   r = vec_insert(v, x, i1)
  28
  29 ! LLVMIR: %[[v:.*]] = load i64, ptr %{{[0-9]}}, align 8
  30 ! LLVMIR: %[[x:.*]] = load <2 x i64>, ptr %{{[0-9]}}, align 16
  31 ! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
  32 ! LLVMIR: %[[urem:.*]] = urem i8 %[[i1]], 2
  33 ! LLVMIR: %[[sub:.*]] = sub i8 1, %[[urem]]
  34 ! LLVMIR: %[[r:.*]] = insertelement <2 x i64> %[[x]], i64 %[[v]], i8 %[[sub]]
  35 ! LLVMIR: store <2 x i64> %[[r]], ptr %{{[0-9]}}, align 16
  36 end subroutine vec_insert_testi64i8