[MLIR][NVVM] Update Float to TF32 conversion Op (#125048)
[llvm-project.git] / libc / src / __support / OSUtil / darwin / arm / syscall.h
blobdc98c07a8ba3374773e4fe27f7bfeafe9df60145
1 //===------ inline implementation of Darwin arm64 syscalls --------* C++ *-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIBC_SRC___SUPPORT_OSUTIL_DARWIN_ARM_SYSCALL_H
10 #define LLVM_LIBC_SRC___SUPPORT_OSUTIL_DARWIN_ARM_SYSCALL_H
12 #include "src/__support/common.h"
13 #include "src/__support/macros/config.h"
15 #define REGISTER_DECL_0 \
16 register long x16 __asm__("x16") = number; \
17 register long x0 __asm__("x0");
18 #define REGISTER_DECL_1 \
19 register long x16 __asm__("x16") = number; \
20 register long x0 __asm__("x0") = arg1;
21 #define REGISTER_DECL_2 \
22 REGISTER_DECL_1 \
23 register long x1 __asm__("x1") = arg2;
24 #define REGISTER_DECL_3 \
25 REGISTER_DECL_2 \
26 register long x2 __asm__("x2") = arg3;
27 #define REGISTER_DECL_4 \
28 REGISTER_DECL_3 \
29 register long x3 __asm__("x3") = arg4;
30 #define REGISTER_DECL_5 \
31 REGISTER_DECL_4 \
32 register long x4 __asm__("x4") = arg5;
33 #define REGISTER_DECL_6 \
34 REGISTER_DECL_5 \
35 register long x5 __asm__("x5") = arg6;
37 #define REGISTER_CONSTRAINT_0 "r"(x16)
38 #define REGISTER_CONSTRAINT_1 REGISTER_CONSTRAINT_0, "r"(x0)
39 #define REGISTER_CONSTRAINT_2 REGISTER_CONSTRAINT_1, "r"(x1)
40 #define REGISTER_CONSTRAINT_3 REGISTER_CONSTRAINT_2, "r"(x2)
41 #define REGISTER_CONSTRAINT_4 REGISTER_CONSTRAINT_3, "r"(x3)
42 #define REGISTER_CONSTRAINT_5 REGISTER_CONSTRAINT_4, "r"(x4)
43 #define REGISTER_CONSTRAINT_6 REGISTER_CONSTRAINT_5, "r"(x5)
45 #define SYSCALL_INSTR(input_constraint) \
46 LIBC_INLINE_ASM("svc 0x80" : "=r"(x0) : input_constraint : "memory", "cc")
48 namespace LIBC_NAMESPACE_DECL {
50 LIBC_INLINE long syscall_impl(long number) {
51 REGISTER_DECL_0;
52 SYSCALL_INSTR(REGISTER_CONSTRAINT_0);
53 return x0;
56 LIBC_INLINE long syscall_impl(long number, long arg1) {
57 REGISTER_DECL_1;
58 SYSCALL_INSTR(REGISTER_CONSTRAINT_1);
59 return x0;
62 LIBC_INLINE long syscall_impl(long number, long arg1, long arg2) {
63 REGISTER_DECL_2;
64 SYSCALL_INSTR(REGISTER_CONSTRAINT_2);
65 return x0;
68 LIBC_INLINE long syscall_impl(long number, long arg1, long arg2, long arg3) {
69 REGISTER_DECL_3;
70 SYSCALL_INSTR(REGISTER_CONSTRAINT_3);
71 return x0;
74 LIBC_INLINE long syscall_impl(long number, long arg1, long arg2, long arg3,
75 long arg4) {
76 REGISTER_DECL_4;
77 SYSCALL_INSTR(REGISTER_CONSTRAINT_4);
78 return x0;
81 LIBC_INLINE long syscall_impl(long number, long arg1, long arg2, long arg3,
82 long arg4, long arg5) {
83 REGISTER_DECL_5;
84 SYSCALL_INSTR(REGISTER_CONSTRAINT_5);
85 return x0;
88 LIBC_INLINE long syscall_impl(long number, long arg1, long arg2, long arg3,
89 long arg4, long arg5, long arg6) {
90 REGISTER_DECL_6;
91 SYSCALL_INSTR(REGISTER_CONSTRAINT_6);
92 return x0;
95 } // namespace LIBC_NAMESPACE_DECL
97 #undef REGISTER_DECL_0
98 #undef REGISTER_DECL_1
99 #undef REGISTER_DECL_2
100 #undef REGISTER_DECL_3
101 #undef REGISTER_DECL_4
102 #undef REGISTER_DECL_5
103 #undef REGISTER_DECL_6
105 #undef REGISTER_CONSTRAINT_0
106 #undef REGISTER_CONSTRAINT_1
107 #undef REGISTER_CONSTRAINT_2
108 #undef REGISTER_CONSTRAINT_3
109 #undef REGISTER_CONSTRAINT_4
110 #undef REGISTER_CONSTRAINT_5
111 #undef REGISTER_CONSTRAINT_6
113 #endif // LLVM_LIBC_SRC___SUPPORT_OSUTIL_DARWIN_ARM_SYSCALL_H