lld/test/ELF/arm-bl-v6-inrange.s

   1 // REQUIRES: arm
   2 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=armv6-none-linux-gnueabi %s -o %t
   3 // RUN: echo "SECTIONS { \
   4 // RUN:          .callee1 0x100004 : { *(.callee_low) } \
   5 // RUN:          .caller  0x500000 : { *(.text) } \
   6 // RUN:          .callee2 0x900004 : { *(.callee_high) } } " > %t.script
   7 // RUN: ld.lld %t --script %t.script -o %t2
   8 // RUN: llvm-objdump -d --triple=armv6-none-linux-gnueabi %t2 | FileCheck %s
   9
  10 // On older Arm Architectures such as v5 and v6 the Thumb BL and BLX relocation
  11 // uses a slightly different encoding that has a lower range. These relocations
  12 // are at the extreme range of what is permitted.
  13  .thumb
  14  .text
  15  .syntax unified
  16  .cpu    arm1176jzf-s
  17  .globl _start
  18  .type   _start,%function
  19 _start:
  20   bl thumbfunc
  21   bl armfunc
  22   bx lr
  23
  24   .section .callee_low, "ax", %progbits
  25   .globl thumbfunc
  26   .type thumbfunc, %function
  27 thumbfunc:
  28   bx lr
  29 // CHECK: Disassembly of section .callee1:
  30 // CHECK-EMPTY:
  31 // CHECK-NEXT: <thumbfunc>:
  32 // CHECK-NEXT:   100004:       4770    bx      lr
  33 // CHECK-EMPTY:
  34 // CHECK-NEXT: Disassembly of section .caller:
  35 // CHECK-EMPTY:
  36 // CHECK-NEXT: <_start>:
  37 // CHECK-NEXT:   500000:       f400 f800       bl     0x100004 <thumbfunc>
  38 // CHECK-NEXT:   500004:       f3ff effe       blx    0x900004 <armfunc>
  39 // CHECK-NEXT:   500008:       4770    bx      lr
  40
  41   .section .callee_high, "ax", %progbits
  42   .arm
  43   .globl armfunc
  44   .type armfunc, %function
  45 armfunc:
  46   bx lr
  47 // CHECK: Disassembly of section .callee2:
  48 // CHECK-EMPTY:
  49 // CHECK-NEXT: <armfunc>:
  50 // CHECK-NEXT:   900004:       e12fff1e        bx      lr