lld/test/ELF/arm-thumb2-adr.s

   1 // REQUIRES: arm
   2 // RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
   3 // RUN: echo "SECTIONS { \
   4 // RUN:                 .rodata.low 0x8012  : { *(.rodata.low) } \
   5 // RUN:                 .text.low   0x8f00  : { *(.text.low) } \
   6 // RUN:                 .text.neg   0x9000  : { *(.text.neg) } \
   7 // RUN:                 .text.pos   0x10000 : { *(.text.pos) } \
   8 // RUN:                 .text.high  0x10100 : { *(.text.high) } \
   9 // RUN:                 .data_high  0x1100f : { *(.data.high) } \
  10 // RUN:               } " > %t.script
  11 // RUN: ld.lld --script %t.script %t.o -o %t
  12 // RUN: llvm-readobj --symbols %t | FileCheck %s --check-prefix=SYMS
  13 // RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck %s
  14
  15 /// Test the various legal cases for the R_ARM_THM_ALU_PREL_11_0 relocation
  16 /// Interesting things to note
  17 /// Range is +- 4095 bytes
  18 /// The expression is S + A - Pa where Pa is AlignDown(PC, 4) so we will use
  19 /// 2-byte nops to make some of the adr psuedo instructions 2-byte aligned.
  20  .section .rodata.low, "a", %progbits
  21 dat1:
  22  .byte 0
  23 dat2:
  24  .byte 1
  25 dat3:
  26  .byte 2
  27 dat4:
  28  .byte 3
  29
  30  .section .text.low, "ax", %progbits
  31  .balign 4
  32  .global target1
  33  .type target1, %function
  34 target1:
  35  bx lr
  36  .type target2, %function
  37 target2:
  38  bx lr
  39
  40  .section .text.neg, "ax", %progbits
  41  .balign 4
  42  .global _start
  43  .thumb_func
  44 _start:
  45  nop
  46 ///  adr.w r0, dat1
  47  .inst.w 0xf2af0004
  48  .reloc 2, R_ARM_THM_ALU_PREL_11_0, dat1
  49 /// adr.w r1, dat2
  50  .inst.w 0xf2af0104
  51  .reloc 6, R_ARM_THM_ALU_PREL_11_0, dat2
  52  nop
  53 /// adr.w r2, dat3
  54  .inst.w 0xf2af0204
  55  .reloc 0xc, R_ARM_THM_ALU_PREL_11_0, dat3
  56 /// adr.w r3, dat4
  57  .inst.w 0xf2af0304
  58  .reloc 0x10, R_ARM_THM_ALU_PREL_11_0, dat4
  59 /// adr.w r0, target1
  60  .inst.w 0xf2af0004
  61  .reloc 0x14, R_ARM_THM_ALU_PREL_11_0, target1
  62  nop
  63 /// adr.w r1, target2
  64  .inst.w 0xf2af0104
  65  .reloc 0x1a, R_ARM_THM_ALU_PREL_11_0, target2
  66  .section .text.pos, "ax", %progbits
  67  .balign 4
  68  .global pos
  69  .thumb_func
  70 pos:
  71 /// adr.w r2, target3
  72  .inst.w 0xf2af0204
  73  .reloc 0, R_ARM_THM_ALU_PREL_11_0, target3
  74  nop
  75 /// adr.w r3, target4
  76  .inst.w 0xf2af0304
  77  .reloc 6, R_ARM_THM_ALU_PREL_11_0, target4
  78  nop
  79 /// adr.w r0, dat5
  80  .inst.w 0xf2af0004
  81  .reloc 0xc, R_ARM_THM_ALU_PREL_11_0, dat5
  82 /// adr.w r1, dat6
  83  .inst.w 0xf2af0104
  84  .reloc 0x10, R_ARM_THM_ALU_PREL_11_0, dat6
  85
  86  nop
  87 /// adr.w r2, dat7
  88  .inst.w 0xf2af0204
  89  .reloc 0x16, R_ARM_THM_ALU_PREL_11_0, dat7
  90
  91 /// adr.w r3, dat8
  92  .inst.w 0xf2af0304
  93  .reloc 0x1a, R_ARM_THM_ALU_PREL_11_0, dat8
  94 /// positive addend in instruction, all others are -4 (PC bias)
  95 /// adr.w r4, dat5 + 8
  96  .inst.w 0xf20f0404
  97  .reloc 0x1e, R_ARM_THM_ALU_PREL_11_0, dat5 + 8
  98
  99  .section .text.high, "ax", %progbits
 100  .balign 4
 101  .thumb_func
 102  .global target3
 103 target3:
 104  bx lr
 105  .thumb_func
 106 target4:
 107  bx lr
 108
 109  .section .data.high, "aw", %progbits
 110 dat5:
 111  .byte 0
 112 dat6:
 113  .byte 1
 114 dat7:
 115  .byte 2
 116 dat8:
 117  .byte 3
 118
 119 // SYMS:     Name: dat1
 120 // SYMS-NEXT:     Value: 0x8012
 121 // SYMS:     Name: dat2
 122 // SYMS-NEXT:     Value: 0x8013
 123 // SYMS:     Name: dat3
 124 // SYMS-NEXT:     Value: 0x8014
 125 // SYMS:     Name: dat4
 126 // SYMS-NEXT:     Value: 0x8015
 127
 128 // CHECK: 00008f00 <target1>:
 129 // CHECK-NEXT:     8f00: bx      lr
 130 // CHECK: 00008f02 <target2>:
 131 // CHECK-NEXT:     8f02: bx      lr
 132
 133 // CHECK: 00009000 <_start>:
 134 // CHECK-NEXT:     9000: nop
 135 /// AlignDown(0x9002+4, 4) - 0xff2 = 0x8012
 136 // CHECK-NEXT:     9002: adr.w   r0, #-4082
 137 /// AlignDown(0x9006+4, 4) - 0xff5 = 0x8013
 138 // CHECK-NEXT:     9006: adr.w   r1, #-4085
 139 // CHECK-NEXT:     900a: nop
 140 /// AlignDown(0x900c+4, 4) - 0xffc = 0x8014
 141 // CHECK-NEXT:     900c: adr.w   r2, #-4092
 142 /// AlignDown(0x9010+4, 4) - 0xfff = 0x8015
 143 // CHECK-NEXT:     9010: adr.w   r3, #-4095
 144 /// AlignDown(0x9014+4, 4) - 0x117 = 0x8f01
 145 // CHECK-NEXT:     9014: adr.w   r0, #-279
 146 // CHECK-NEXT:     9018: nop
 147 /// AlignDown(0x901a+4, 4) - 0x119 = 0x8f03
 148 // CHECK-NEXT:     901a: adr.w   r1, #-281
 149
 150 // CHECK: 00010000 <pos>:
 151 /// AlignDown(0x10000+4, 4) + 0xfd = 0x10101
 152 // CHECK-NEXT:    10000: adr.w   r2, #253
 153 // CHECK-NEXT:    10004: nop
 154 /// AlignDown(0x10006+4, 4) + 0xfb = 0x10103
 155 // CHECK-NEXT:    10006: adr.w   r3, #251
 156 // CHECK-NEXT:    1000a: nop
 157 /// AlignDown(0x1000c+4, 4) + 0xfff = 0x1100f
 158 // CHECK-NEXT:    1000c: adr.w   r0, #4095
 159 /// AlignDown(0x10010+4, 4) + 0xffc = 0x11010
 160 // CHECK-NEXT:    10010: adr.w   r1, #4092
 161 // CHECK-NEXT:    10014: nop
 162 /// AlignDown(0x10016+4, 4) + 0xff9 = 0x11011
 163 // CHECK-NEXT:    10016: adr.w   r2, #4089
 164 /// AlignDown(0x1001a+4, 4) + 0xff6 = 0x11012
 165 // CHECK-NEXT:    1001a: adr.w   r3, #4086
 166 /// AlignDown(0x1001e+4, 4) + 0xff7 = 0x11017 = dat5 + 8
 167 // CHECK-NEXT:   1001e:  adr.w  r4, #4087
 168
 169 // CHECK: 00010100 <target3>:
 170 // CHECK-NEXT:    10100: bx      lr
 171
 172 // CHECK: 00010102 <target4>:
 173 // CHECK-NEXT:    10102: bx      lr
 174
 175 // SYMS:     Name: dat5
 176 // SYMS-NEXT:     Value: 0x1100F
 177 // SYMS:     Name: dat6
 178 // SYMS-NEXT:     Value: 0x11010
 179 // SYMS:     Name: dat7
 180 // SYMS-NEXT:     Value: 0x11011
 181 // SYMS:     Name: dat8
 182 // SYMS-NEXT:     Value: 0x11012