lld/test/ELF/arm-tls-norelax-ie-le.s

   1 // REQUIRES: arm
   2 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %p/Inputs/arm-tls-get-addr.s -o %t1.o
   3 // RUN: ld.lld %t1.o --shared -soname=t1.so -o %t1.so
   4 // RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
   5 // RUN: ld.lld %t1.so %t.o -o %t
   6 // RUN: llvm-objdump -s --triple=armv7a-linux-gnueabi %t | FileCheck %s
   7
   8 /// This tls Initial Exec sequence is with respect to a non-preemptible symbol
   9 /// so a relaxation would normally be possible. This would result in an assertion
  10 /// failure on ARM as the relaxation functions can't be implemented on ARM.
  11 /// Check that the sequence is handled as initial exec
  12  .text
  13  .syntax unified
  14  .globl  func
  15  .p2align        2
  16  .type   func,%function
  17 func:
  18 .L0:
  19  .globl __tls_get_addr
  20  bl __tls_get_addr
  21 .L1:
  22  bx lr
  23  .p2align 2
  24  .Lt0: .word  x1(gottpoff) + (. - .L0 - 8)
  25  .Lt1: .word  x2(gottpoff) + (. - .L1 - 8)
  26
  27  .globl  x1
  28  .section       .trw,"awT",%progbits
  29  .p2align  2
  30 x1:
  31  .word 0x1
  32  .globl x2
  33  .section       .tbss,"awT",%nobits
  34  .type  x1, %object
  35 x2:
  36  .space 4
  37  .type x2, %object
  38
  39 // CHECK: Contents of section .got:
  40 /// x1 at offset 8 from TP, x2 at offset 0xc from TP. Offsets include TCB size of 8
  41 // CHECK-NEXT: 3027c 08000000 0c000000