[OpenACC] Create AST nodes for 'data' constructs
[llvm-project.git] / lldb / source / Plugins / ABI / AArch64 / ABISysV_arm64.cpp
blob93b8141e97ef86a3312207ec7df803f0e32b8f39
1 //===-- ABISysV_arm64.cpp -------------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "ABISysV_arm64.h"
11 #include <optional>
12 #include <vector>
14 #include "llvm/ADT/STLExtras.h"
15 #include "llvm/TargetParser/Triple.h"
17 #include "lldb/Core/Module.h"
18 #include "lldb/Core/PluginManager.h"
19 #include "lldb/Core/Value.h"
20 #include "lldb/Symbol/UnwindPlan.h"
21 #include "lldb/Target/Process.h"
22 #include "lldb/Target/RegisterContext.h"
23 #include "lldb/Target/Target.h"
24 #include "lldb/Target/Thread.h"
25 #include "lldb/Utility/ConstString.h"
26 #include "lldb/Utility/LLDBLog.h"
27 #include "lldb/Utility/Log.h"
28 #include "lldb/Utility/RegisterValue.h"
29 #include "lldb/Utility/Scalar.h"
30 #include "lldb/Utility/Status.h"
31 #include "lldb/ValueObject/ValueObjectConstResult.h"
33 #include "Utility/ARM64_DWARF_Registers.h"
35 using namespace lldb;
36 using namespace lldb_private;
38 bool ABISysV_arm64::GetPointerReturnRegister(const char *&name) {
39 name = "x0";
40 return true;
43 size_t ABISysV_arm64::GetRedZoneSize() const { return 128; }
45 // Static Functions
47 ABISP
48 ABISysV_arm64::CreateInstance(lldb::ProcessSP process_sp, const ArchSpec &arch) {
49 const llvm::Triple::ArchType arch_type = arch.GetTriple().getArch();
50 const llvm::Triple::VendorType vendor_type = arch.GetTriple().getVendor();
52 if (vendor_type != llvm::Triple::Apple) {
53 if (arch_type == llvm::Triple::aarch64 ||
54 arch_type == llvm::Triple::aarch64_32) {
55 return ABISP(
56 new ABISysV_arm64(std::move(process_sp), MakeMCRegisterInfo(arch)));
60 return ABISP();
63 bool ABISysV_arm64::PrepareTrivialCall(Thread &thread, addr_t sp,
64 addr_t func_addr, addr_t return_addr,
65 llvm::ArrayRef<addr_t> args) const {
66 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
67 if (!reg_ctx)
68 return false;
70 Log *log = GetLog(LLDBLog::Expressions);
72 if (log) {
73 StreamString s;
74 s.Printf("ABISysV_arm64::PrepareTrivialCall (tid = 0x%" PRIx64
75 ", sp = 0x%" PRIx64 ", func_addr = 0x%" PRIx64
76 ", return_addr = 0x%" PRIx64,
77 thread.GetID(), (uint64_t)sp, (uint64_t)func_addr,
78 (uint64_t)return_addr);
80 for (size_t i = 0; i < args.size(); ++i)
81 s.Printf(", arg%d = 0x%" PRIx64, static_cast<int>(i + 1), args[i]);
82 s.PutCString(")");
83 log->PutString(s.GetString());
86 // x0 - x7 contain first 8 simple args
87 if (args.size() > 8)
88 return false;
90 for (size_t i = 0; i < args.size(); ++i) {
91 const RegisterInfo *reg_info = reg_ctx->GetRegisterInfo(
92 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + i);
93 LLDB_LOGF(log, "About to write arg%d (0x%" PRIx64 ") into %s",
94 static_cast<int>(i + 1), args[i], reg_info->name);
95 if (!reg_ctx->WriteRegisterFromUnsigned(reg_info, args[i]))
96 return false;
99 // Set "lr" to the return address
100 if (!reg_ctx->WriteRegisterFromUnsigned(
101 reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
102 LLDB_REGNUM_GENERIC_RA),
103 return_addr))
104 return false;
106 // Set "sp" to the requested value
107 if (!reg_ctx->WriteRegisterFromUnsigned(
108 reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
109 LLDB_REGNUM_GENERIC_SP),
110 sp))
111 return false;
113 // Set "pc" to the address requested
114 if (!reg_ctx->WriteRegisterFromUnsigned(
115 reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
116 LLDB_REGNUM_GENERIC_PC),
117 func_addr))
118 return false;
120 return true;
123 // TODO: We dont support fp/SIMD arguments in v0-v7
124 bool ABISysV_arm64::GetArgumentValues(Thread &thread, ValueList &values) const {
125 uint32_t num_values = values.GetSize();
127 ExecutionContext exe_ctx(thread.shared_from_this());
129 // Extract the register context so we can read arguments from registers
131 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
133 if (!reg_ctx)
134 return false;
136 addr_t sp = 0;
138 for (uint32_t value_idx = 0; value_idx < num_values; ++value_idx) {
139 // We currently only support extracting values with Clang QualTypes. Do we
140 // care about others?
141 Value *value = values.GetValueAtIndex(value_idx);
143 if (!value)
144 return false;
146 CompilerType value_type = value->GetCompilerType();
147 if (value_type) {
148 bool is_signed = false;
149 size_t bit_width = 0;
150 std::optional<uint64_t> bit_size = value_type.GetBitSize(&thread);
151 if (!bit_size)
152 return false;
153 if (value_type.IsIntegerOrEnumerationType(is_signed)) {
154 bit_width = *bit_size;
155 } else if (value_type.IsPointerOrReferenceType()) {
156 bit_width = *bit_size;
157 } else {
158 // We only handle integer, pointer and reference types currently...
159 return false;
162 if (bit_width <= (exe_ctx.GetProcessRef().GetAddressByteSize() * 8)) {
163 if (value_idx < 8) {
164 // Arguments 1-8 are in x0-x7...
165 const RegisterInfo *reg_info = nullptr;
166 reg_info = reg_ctx->GetRegisterInfo(
167 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + value_idx);
169 if (reg_info) {
170 RegisterValue reg_value;
172 if (reg_ctx->ReadRegister(reg_info, reg_value)) {
173 if (is_signed)
174 reg_value.SignExtend(bit_width);
175 if (!reg_value.GetScalarValue(value->GetScalar()))
176 return false;
177 continue;
180 return false;
181 } else {
182 // TODO: Verify for stack layout for SysV
183 if (sp == 0) {
184 // Read the stack pointer if we already haven't read it
185 sp = reg_ctx->GetSP(0);
186 if (sp == 0)
187 return false;
190 // Arguments 5 on up are on the stack
191 const uint32_t arg_byte_size = (bit_width + (8 - 1)) / 8;
192 Status error;
193 if (!exe_ctx.GetProcessRef().ReadScalarIntegerFromMemory(
194 sp, arg_byte_size, is_signed, value->GetScalar(), error))
195 return false;
197 sp += arg_byte_size;
198 // Align up to the next 8 byte boundary if needed
199 if (sp % 8) {
200 sp >>= 3;
201 sp += 1;
202 sp <<= 3;
208 return true;
211 Status ABISysV_arm64::SetReturnValueObject(lldb::StackFrameSP &frame_sp,
212 lldb::ValueObjectSP &new_value_sp) {
213 Status error;
214 if (!new_value_sp) {
215 error = Status::FromErrorString("Empty value object for return value.");
216 return error;
219 CompilerType return_value_type = new_value_sp->GetCompilerType();
220 if (!return_value_type) {
221 error = Status::FromErrorString("Null clang type for return value.");
222 return error;
225 Thread *thread = frame_sp->GetThread().get();
227 RegisterContext *reg_ctx = thread->GetRegisterContext().get();
229 if (reg_ctx) {
230 DataExtractor data;
231 Status data_error;
232 const uint64_t byte_size = new_value_sp->GetData(data, data_error);
233 if (data_error.Fail()) {
234 error = Status::FromErrorStringWithFormat(
235 "Couldn't convert return value to raw data: %s",
236 data_error.AsCString());
237 return error;
240 const uint32_t type_flags = return_value_type.GetTypeInfo(nullptr);
241 if (type_flags & eTypeIsScalar || type_flags & eTypeIsPointer) {
242 if (type_flags & eTypeIsInteger || type_flags & eTypeIsPointer) {
243 // Extract the register context so we can read arguments from registers
244 lldb::offset_t offset = 0;
245 if (byte_size <= 16) {
246 const RegisterInfo *x0_info = reg_ctx->GetRegisterInfo(
247 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1);
248 if (byte_size <= 8) {
249 uint64_t raw_value = data.GetMaxU64(&offset, byte_size);
251 if (!reg_ctx->WriteRegisterFromUnsigned(x0_info, raw_value))
252 error = Status::FromErrorString("failed to write register x0");
253 } else {
254 uint64_t raw_value = data.GetMaxU64(&offset, 8);
256 if (reg_ctx->WriteRegisterFromUnsigned(x0_info, raw_value)) {
257 const RegisterInfo *x1_info = reg_ctx->GetRegisterInfo(
258 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG2);
259 raw_value = data.GetMaxU64(&offset, byte_size - offset);
261 if (!reg_ctx->WriteRegisterFromUnsigned(x1_info, raw_value))
262 error = Status::FromErrorString("failed to write register x1");
265 } else {
266 error = Status::FromErrorString(
267 "We don't support returning longer than 128 bit "
268 "integer values at present.");
270 } else if (type_flags & eTypeIsFloat) {
271 if (type_flags & eTypeIsComplex) {
272 // Don't handle complex yet.
273 error = Status::FromErrorString(
274 "returning complex float values are not supported");
275 } else {
276 const RegisterInfo *v0_info = reg_ctx->GetRegisterInfoByName("v0", 0);
278 if (v0_info) {
279 if (byte_size <= 16) {
280 RegisterValue reg_value;
281 error = reg_value.SetValueFromData(*v0_info, data, 0, true);
282 if (error.Success())
283 if (!reg_ctx->WriteRegister(v0_info, reg_value))
284 error =
285 Status::FromErrorString("failed to write register v0");
286 } else {
287 error = Status::FromErrorString(
288 "returning float values longer than 128 "
289 "bits are not supported");
291 } else
292 error = Status::FromErrorString(
293 "v0 register is not available on this target");
296 } else if (type_flags & eTypeIsVector) {
297 if (byte_size > 0) {
298 const RegisterInfo *v0_info = reg_ctx->GetRegisterInfoByName("v0", 0);
300 if (v0_info) {
301 if (byte_size <= v0_info->byte_size) {
302 RegisterValue reg_value;
303 error = reg_value.SetValueFromData(*v0_info, data, 0, true);
304 if (error.Success()) {
305 if (!reg_ctx->WriteRegister(v0_info, reg_value))
306 error = Status::FromErrorString("failed to write register v0");
312 } else {
313 error = Status::FromErrorString("no registers are available");
316 return error;
319 bool ABISysV_arm64::CreateFunctionEntryUnwindPlan(UnwindPlan &unwind_plan) {
320 unwind_plan.Clear();
321 unwind_plan.SetRegisterKind(eRegisterKindDWARF);
323 uint32_t lr_reg_num = arm64_dwarf::lr;
324 uint32_t sp_reg_num = arm64_dwarf::sp;
326 UnwindPlan::RowSP row(new UnwindPlan::Row);
328 // Our previous Call Frame Address is the stack pointer
329 row->GetCFAValue().SetIsRegisterPlusOffset(sp_reg_num, 0);
331 unwind_plan.AppendRow(row);
332 unwind_plan.SetReturnAddressRegister(lr_reg_num);
334 // All other registers are the same.
336 unwind_plan.SetSourceName("arm64 at-func-entry default");
337 unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
338 unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);
339 unwind_plan.SetUnwindPlanForSignalTrap(eLazyBoolNo);
341 return true;
344 bool ABISysV_arm64::CreateDefaultUnwindPlan(UnwindPlan &unwind_plan) {
345 unwind_plan.Clear();
346 unwind_plan.SetRegisterKind(eRegisterKindDWARF);
348 uint32_t fp_reg_num = arm64_dwarf::fp;
349 uint32_t pc_reg_num = arm64_dwarf::pc;
351 UnwindPlan::RowSP row(new UnwindPlan::Row);
352 const int32_t ptr_size = 8;
354 row->GetCFAValue().SetIsRegisterPlusOffset(fp_reg_num, 2 * ptr_size);
355 row->SetOffset(0);
356 row->SetUnspecifiedRegistersAreUndefined(true);
358 row->SetRegisterLocationToAtCFAPlusOffset(fp_reg_num, ptr_size * -2, true);
359 row->SetRegisterLocationToAtCFAPlusOffset(pc_reg_num, ptr_size * -1, true);
361 unwind_plan.AppendRow(row);
362 unwind_plan.SetSourceName("arm64 default unwind plan");
363 unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
364 unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);
365 unwind_plan.SetUnwindPlanForSignalTrap(eLazyBoolNo);
367 return true;
370 // AAPCS64 (Procedure Call Standard for the ARM 64-bit Architecture) says
371 // registers x19 through x28 and sp are callee preserved. v8-v15 are non-
372 // volatile (and specifically only the lower 8 bytes of these regs), the rest
373 // of the fp/SIMD registers are volatile.
375 // We treat x29 as callee preserved also, else the unwinder won't try to
376 // retrieve fp saves.
378 bool ABISysV_arm64::RegisterIsVolatile(const RegisterInfo *reg_info) {
379 if (reg_info) {
380 const char *name = reg_info->name;
382 // Sometimes we'll be called with the "alternate" name for these registers;
383 // recognize them as non-volatile.
385 if (name[0] == 'p' && name[1] == 'c') // pc
386 return false;
387 if (name[0] == 'f' && name[1] == 'p') // fp
388 return false;
389 if (name[0] == 's' && name[1] == 'p') // sp
390 return false;
391 if (name[0] == 'l' && name[1] == 'r') // lr
392 return false;
394 if (name[0] == 'x' || name[0] == 'r') {
395 // Volatile registers: x0-x18
396 // Although documentation says only x19-28 + sp are callee saved We ll
397 // also have to treat x30 as non-volatile. Each dwarf frame has its own
398 // value of lr. Return false for the non-volatile gpr regs, true for
399 // everything else
400 switch (name[1]) {
401 case '1':
402 switch (name[2]) {
403 case '9':
404 return false; // x19 is non-volatile
405 default:
406 return true;
408 break;
409 case '2':
410 switch (name[2]) {
411 case '0':
412 case '1':
413 case '2':
414 case '3':
415 case '4':
416 case '5':
417 case '6':
418 case '7':
419 case '8':
420 return false; // x20 - 28 are non-volatile
421 case '9':
422 return false; // x29 aka fp treat as non-volatile
423 default:
424 return true;
426 case '3': // x30 (lr) and x31 (sp) treat as non-volatile
427 if (name[2] == '0' || name[2] == '1')
428 return false;
429 break;
430 default:
431 return true; // all volatile cases not handled above fall here.
433 } else if (name[0] == 'v' || name[0] == 's' || name[0] == 'd') {
434 // Volatile registers: v0-7, v16-v31
435 // Return false for non-volatile fp/SIMD regs, true for everything else
436 switch (name[1]) {
437 case '8':
438 case '9':
439 return false; // v8-v9 are non-volatile
440 case '1':
441 switch (name[2]) {
442 case '0':
443 case '1':
444 case '2':
445 case '3':
446 case '4':
447 case '5':
448 return false; // v10-v15 are non-volatile
449 default:
450 return true;
452 default:
453 return true;
457 return true;
460 static bool LoadValueFromConsecutiveGPRRegisters(
461 ExecutionContext &exe_ctx, RegisterContext *reg_ctx,
462 const CompilerType &value_type,
463 bool is_return_value, // false => parameter, true => return value
464 uint32_t &NGRN, // NGRN (see ABI documentation)
465 uint32_t &NSRN, // NSRN (see ABI documentation)
466 DataExtractor &data) {
467 std::optional<uint64_t> byte_size =
468 value_type.GetByteSize(exe_ctx.GetBestExecutionContextScope());
470 if (byte_size || *byte_size == 0)
471 return false;
473 std::unique_ptr<DataBufferHeap> heap_data_up(
474 new DataBufferHeap(*byte_size, 0));
475 const ByteOrder byte_order = exe_ctx.GetProcessRef().GetByteOrder();
476 Status error;
478 CompilerType base_type;
479 const uint32_t homogeneous_count =
480 value_type.IsHomogeneousAggregate(&base_type);
481 if (homogeneous_count > 0 && homogeneous_count <= 8) {
482 // Make sure we have enough registers
483 if (NSRN < 8 && (8 - NSRN) >= homogeneous_count) {
484 if (!base_type)
485 return false;
486 std::optional<uint64_t> base_byte_size =
487 base_type.GetByteSize(exe_ctx.GetBestExecutionContextScope());
488 if (!base_byte_size)
489 return false;
490 uint32_t data_offset = 0;
492 for (uint32_t i = 0; i < homogeneous_count; ++i) {
493 char v_name[8];
494 ::snprintf(v_name, sizeof(v_name), "v%u", NSRN);
495 const RegisterInfo *reg_info =
496 reg_ctx->GetRegisterInfoByName(v_name, 0);
497 if (reg_info == nullptr)
498 return false;
500 if (*base_byte_size > reg_info->byte_size)
501 return false;
503 RegisterValue reg_value;
505 if (!reg_ctx->ReadRegister(reg_info, reg_value))
506 return false;
508 // Make sure we have enough room in "heap_data_up"
509 if ((data_offset + *base_byte_size) <= heap_data_up->GetByteSize()) {
510 const size_t bytes_copied = reg_value.GetAsMemoryData(
511 *reg_info, heap_data_up->GetBytes() + data_offset,
512 *base_byte_size, byte_order, error);
513 if (bytes_copied != *base_byte_size)
514 return false;
515 data_offset += bytes_copied;
516 ++NSRN;
517 } else
518 return false;
520 data.SetByteOrder(byte_order);
521 data.SetAddressByteSize(exe_ctx.GetProcessRef().GetAddressByteSize());
522 data.SetData(DataBufferSP(heap_data_up.release()));
523 return true;
527 const size_t max_reg_byte_size = 16;
528 if (*byte_size <= max_reg_byte_size) {
529 size_t bytes_left = *byte_size;
530 uint32_t data_offset = 0;
531 while (data_offset < *byte_size) {
532 if (NGRN >= 8)
533 return false;
535 const RegisterInfo *reg_info = reg_ctx->GetRegisterInfo(
536 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1 + NGRN);
537 if (reg_info == nullptr)
538 return false;
540 RegisterValue reg_value;
542 if (!reg_ctx->ReadRegister(reg_info, reg_value))
543 return false;
545 const size_t curr_byte_size = std::min<size_t>(8, bytes_left);
546 const size_t bytes_copied = reg_value.GetAsMemoryData(
547 *reg_info, heap_data_up->GetBytes() + data_offset, curr_byte_size,
548 byte_order, error);
549 if (bytes_copied == 0)
550 return false;
551 if (bytes_copied >= bytes_left)
552 break;
553 data_offset += bytes_copied;
554 bytes_left -= bytes_copied;
555 ++NGRN;
557 } else {
558 const RegisterInfo *reg_info = nullptr;
559 if (is_return_value) {
560 // The SysV arm64 ABI doesn't require you to write the return location
561 // back to x8 before returning from the function the way the x86_64 ABI
562 // does. It looks like all the users of this ABI currently choose not to
563 // do that, and so we can't reconstruct stack based returns on exit
564 // from the function.
565 return false;
566 } else {
567 // We are assuming we are stopped at the first instruction in a function
568 // and that the ABI is being respected so all parameters appear where
569 // they should be (functions with no external linkage can legally violate
570 // the ABI).
571 if (NGRN >= 8)
572 return false;
574 reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
575 LLDB_REGNUM_GENERIC_ARG1 + NGRN);
576 if (reg_info == nullptr)
577 return false;
578 ++NGRN;
581 const lldb::addr_t value_addr =
582 reg_ctx->ReadRegisterAsUnsigned(reg_info, LLDB_INVALID_ADDRESS);
584 if (value_addr == LLDB_INVALID_ADDRESS)
585 return false;
587 if (exe_ctx.GetProcessRef().ReadMemory(
588 value_addr, heap_data_up->GetBytes(), heap_data_up->GetByteSize(),
589 error) != heap_data_up->GetByteSize()) {
590 return false;
594 data.SetByteOrder(byte_order);
595 data.SetAddressByteSize(exe_ctx.GetProcessRef().GetAddressByteSize());
596 data.SetData(DataBufferSP(heap_data_up.release()));
597 return true;
600 ValueObjectSP ABISysV_arm64::GetReturnValueObjectImpl(
601 Thread &thread, CompilerType &return_compiler_type) const {
602 ValueObjectSP return_valobj_sp;
603 Value value;
605 ExecutionContext exe_ctx(thread.shared_from_this());
606 if (exe_ctx.GetTargetPtr() == nullptr || exe_ctx.GetProcessPtr() == nullptr)
607 return return_valobj_sp;
609 // value.SetContext (Value::eContextTypeClangType, return_compiler_type);
610 value.SetCompilerType(return_compiler_type);
612 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
613 if (!reg_ctx)
614 return return_valobj_sp;
616 std::optional<uint64_t> byte_size = return_compiler_type.GetByteSize(&thread);
617 if (!byte_size)
618 return return_valobj_sp;
620 const uint32_t type_flags = return_compiler_type.GetTypeInfo(nullptr);
621 if (type_flags & eTypeIsScalar || type_flags & eTypeIsPointer) {
622 value.SetValueType(Value::ValueType::Scalar);
624 bool success = false;
625 if (type_flags & eTypeIsInteger || type_flags & eTypeIsPointer) {
626 // Extract the register context so we can read arguments from registers
627 if (*byte_size <= 8) {
628 const RegisterInfo *x0_reg_info = nullptr;
629 x0_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
630 LLDB_REGNUM_GENERIC_ARG1);
631 if (x0_reg_info) {
632 uint64_t raw_value =
633 thread.GetRegisterContext()->ReadRegisterAsUnsigned(x0_reg_info,
635 const bool is_signed = (type_flags & eTypeIsSigned) != 0;
636 switch (*byte_size) {
637 default:
638 break;
639 case 16: // uint128_t
640 // In register x0 and x1
642 const RegisterInfo *x1_reg_info = nullptr;
643 x1_reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
644 LLDB_REGNUM_GENERIC_ARG2);
646 if (x1_reg_info) {
647 if (*byte_size <=
648 x0_reg_info->byte_size + x1_reg_info->byte_size) {
649 std::unique_ptr<DataBufferHeap> heap_data_up(
650 new DataBufferHeap(*byte_size, 0));
651 const ByteOrder byte_order =
652 exe_ctx.GetProcessRef().GetByteOrder();
653 RegisterValue x0_reg_value;
654 RegisterValue x1_reg_value;
655 if (reg_ctx->ReadRegister(x0_reg_info, x0_reg_value) &&
656 reg_ctx->ReadRegister(x1_reg_info, x1_reg_value)) {
657 Status error;
658 if (x0_reg_value.GetAsMemoryData(
659 *x0_reg_info, heap_data_up->GetBytes() + 0, 8,
660 byte_order, error) &&
661 x1_reg_value.GetAsMemoryData(
662 *x1_reg_info, heap_data_up->GetBytes() + 8, 8,
663 byte_order, error)) {
664 DataExtractor data(
665 DataBufferSP(heap_data_up.release()), byte_order,
666 exe_ctx.GetProcessRef().GetAddressByteSize());
668 return_valobj_sp = ValueObjectConstResult::Create(
669 &thread, return_compiler_type, ConstString(""), data);
670 return return_valobj_sp;
676 break;
677 case sizeof(uint64_t):
678 if (is_signed)
679 value.GetScalar() = (int64_t)(raw_value);
680 else
681 value.GetScalar() = (uint64_t)(raw_value);
682 success = true;
683 break;
685 case sizeof(uint32_t):
686 if (is_signed)
687 value.GetScalar() = (int32_t)(raw_value & UINT32_MAX);
688 else
689 value.GetScalar() = (uint32_t)(raw_value & UINT32_MAX);
690 success = true;
691 break;
693 case sizeof(uint16_t):
694 if (is_signed)
695 value.GetScalar() = (int16_t)(raw_value & UINT16_MAX);
696 else
697 value.GetScalar() = (uint16_t)(raw_value & UINT16_MAX);
698 success = true;
699 break;
701 case sizeof(uint8_t):
702 if (is_signed)
703 value.GetScalar() = (int8_t)(raw_value & UINT8_MAX);
704 else
705 value.GetScalar() = (uint8_t)(raw_value & UINT8_MAX);
706 success = true;
707 break;
711 } else if (type_flags & eTypeIsFloat) {
712 if (type_flags & eTypeIsComplex) {
713 // Don't handle complex yet.
714 } else {
715 if (*byte_size <= sizeof(long double)) {
716 const RegisterInfo *v0_reg_info =
717 reg_ctx->GetRegisterInfoByName("v0", 0);
718 RegisterValue v0_value;
719 if (reg_ctx->ReadRegister(v0_reg_info, v0_value)) {
720 DataExtractor data;
721 if (v0_value.GetData(data)) {
722 lldb::offset_t offset = 0;
723 if (*byte_size == sizeof(float)) {
724 value.GetScalar() = data.GetFloat(&offset);
725 success = true;
726 } else if (*byte_size == sizeof(double)) {
727 value.GetScalar() = data.GetDouble(&offset);
728 success = true;
729 } else if (*byte_size == sizeof(long double)) {
730 value.GetScalar() = data.GetLongDouble(&offset);
731 success = true;
739 if (success)
740 return_valobj_sp = ValueObjectConstResult::Create(
741 thread.GetStackFrameAtIndex(0).get(), value, ConstString(""));
742 } else if (type_flags & eTypeIsVector && *byte_size <= 16) {
743 if (*byte_size > 0) {
744 const RegisterInfo *v0_info = reg_ctx->GetRegisterInfoByName("v0", 0);
746 if (v0_info) {
747 std::unique_ptr<DataBufferHeap> heap_data_up(
748 new DataBufferHeap(*byte_size, 0));
749 const ByteOrder byte_order = exe_ctx.GetProcessRef().GetByteOrder();
750 RegisterValue reg_value;
751 if (reg_ctx->ReadRegister(v0_info, reg_value)) {
752 Status error;
753 if (reg_value.GetAsMemoryData(*v0_info, heap_data_up->GetBytes(),
754 heap_data_up->GetByteSize(), byte_order,
755 error)) {
756 DataExtractor data(DataBufferSP(heap_data_up.release()), byte_order,
757 exe_ctx.GetProcessRef().GetAddressByteSize());
758 return_valobj_sp = ValueObjectConstResult::Create(
759 &thread, return_compiler_type, ConstString(""), data);
764 } else if (type_flags & eTypeIsStructUnion || type_flags & eTypeIsClass ||
765 (type_flags & eTypeIsVector && *byte_size > 16)) {
766 DataExtractor data;
768 uint32_t NGRN = 0; // Search ABI docs for NGRN
769 uint32_t NSRN = 0; // Search ABI docs for NSRN
770 const bool is_return_value = true;
771 if (LoadValueFromConsecutiveGPRRegisters(
772 exe_ctx, reg_ctx, return_compiler_type, is_return_value, NGRN, NSRN,
773 data)) {
774 return_valobj_sp = ValueObjectConstResult::Create(
775 &thread, return_compiler_type, ConstString(""), data);
778 return return_valobj_sp;
781 lldb::addr_t ABISysV_arm64::FixAddress(addr_t pc, addr_t mask) {
782 if (mask == LLDB_INVALID_ADDRESS_MASK)
783 return pc;
784 lldb::addr_t pac_sign_extension = 0x0080000000000000ULL;
785 return (pc & pac_sign_extension) ? pc | mask : pc & (~mask);
788 // Reads code or data address mask for the current Linux process.
789 static lldb::addr_t ReadLinuxProcessAddressMask(lldb::ProcessSP process_sp,
790 llvm::StringRef reg_name) {
791 // LLDB_INVALID_ADDRESS_MASK means there isn't a mask or it has not been read
792 // yet. We do not return the top byte mask unless thread_sp is valid. This
793 // prevents calls to this function before the thread is setup locking in the
794 // value to just the top byte mask, in cases where pointer authentication
795 // might also be active.
796 uint64_t address_mask = LLDB_INVALID_ADDRESS_MASK;
797 lldb::ThreadSP thread_sp = process_sp->GetThreadList().GetSelectedThread();
798 if (thread_sp) {
799 // Linux configures user-space virtual addresses with top byte ignored.
800 // We set default value of mask such that top byte is masked out.
801 address_mask = ~((1ULL << 56) - 1);
802 // If Pointer Authentication feature is enabled then Linux exposes
803 // PAC data and code mask register. Try reading relevant register
804 // below and merge it with default address mask calculated above.
805 lldb::RegisterContextSP reg_ctx_sp = thread_sp->GetRegisterContext();
806 if (reg_ctx_sp) {
807 const RegisterInfo *reg_info =
808 reg_ctx_sp->GetRegisterInfoByName(reg_name, 0);
809 if (reg_info) {
810 lldb::addr_t mask_reg_val = reg_ctx_sp->ReadRegisterAsUnsigned(
811 reg_info->kinds[eRegisterKindLLDB], LLDB_INVALID_ADDRESS);
812 if (mask_reg_val != LLDB_INVALID_ADDRESS)
813 address_mask |= mask_reg_val;
817 return address_mask;
820 lldb::addr_t ABISysV_arm64::FixCodeAddress(lldb::addr_t pc) {
821 if (lldb::ProcessSP process_sp = GetProcessSP()) {
822 if (process_sp->GetTarget().GetArchitecture().GetTriple().isOSLinux() &&
823 process_sp->GetCodeAddressMask() == LLDB_INVALID_ADDRESS_MASK)
824 process_sp->SetCodeAddressMask(
825 ReadLinuxProcessAddressMask(process_sp, "code_mask"));
827 // b55 is the highest bit outside TBI (if it's enabled), use
828 // it to determine if the high bits are set to 0 or 1.
829 const addr_t pac_sign_extension = 0x0080000000000000ULL;
830 addr_t mask = process_sp->GetCodeAddressMask();
831 // Test if the high memory mask has been overriden separately
832 if (pc & pac_sign_extension &&
833 process_sp->GetHighmemCodeAddressMask() != LLDB_INVALID_ADDRESS_MASK)
834 mask = process_sp->GetHighmemCodeAddressMask();
836 return FixAddress(pc, mask);
838 return pc;
841 lldb::addr_t ABISysV_arm64::FixDataAddress(lldb::addr_t pc) {
842 if (lldb::ProcessSP process_sp = GetProcessSP()) {
843 if (process_sp->GetTarget().GetArchitecture().GetTriple().isOSLinux() &&
844 process_sp->GetDataAddressMask() == LLDB_INVALID_ADDRESS_MASK)
845 process_sp->SetDataAddressMask(
846 ReadLinuxProcessAddressMask(process_sp, "data_mask"));
848 // b55 is the highest bit outside TBI (if it's enabled), use
849 // it to determine if the high bits are set to 0 or 1.
850 const addr_t pac_sign_extension = 0x0080000000000000ULL;
851 addr_t mask = process_sp->GetDataAddressMask();
852 // Test if the high memory mask has been overriden separately
853 if (pc & pac_sign_extension &&
854 process_sp->GetHighmemDataAddressMask() != LLDB_INVALID_ADDRESS_MASK)
855 mask = process_sp->GetHighmemDataAddressMask();
857 return FixAddress(pc, mask);
859 return pc;
862 void ABISysV_arm64::Initialize() {
863 PluginManager::RegisterPlugin(GetPluginNameStatic(),
864 "SysV ABI for AArch64 targets", CreateInstance);
867 void ABISysV_arm64::Terminate() {
868 PluginManager::UnregisterPlugin(CreateInstance);