lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h

   1 //===-- NativeRegisterContextLinux_arm.h ---------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
  10
  11 #ifndef lldb_NativeRegisterContextLinux_arm_h
  12 #define lldb_NativeRegisterContextLinux_arm_h
  13
  14 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
  15 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm.h"
  16 #include "Plugins/Process/Utility/lldb-arm-register-enums.h"
  17
  18 namespace lldb_private {
  19 namespace process_linux {
  20
  21 class NativeProcessLinux;
  22
  23 class NativeRegisterContextLinux_arm : public NativeRegisterContextLinux {
  24 public:
  25   NativeRegisterContextLinux_arm(const ArchSpec &target_arch,
  26                                  NativeThreadProtocol &native_thread);
  27
  28   uint32_t GetRegisterSetCount() const override;
  29
  30   const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
  31
  32   uint32_t GetUserRegisterCount() const override;
  33
  34   Status ReadRegister(const RegisterInfo *reg_info,
  35                       RegisterValue &reg_value) override;
  36
  37   Status WriteRegister(const RegisterInfo *reg_info,
  38                        const RegisterValue &reg_value) override;
  39
  40   Status ReadAllRegisterValues(lldb::WritableDataBufferSP &data_sp) override;
  41
  42   Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
  43
  44   // Hardware breakpoints/watchpoint management functions
  45
  46   uint32_t NumSupportedHardwareBreakpoints() override;
  47
  48   uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
  49
  50   bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
  51
  52   Status ClearAllHardwareBreakpoints() override;
  53
  54   Status GetHardwareBreakHitIndex(uint32_t &bp_index,
  55                                   lldb::addr_t trap_addr) override;
  56
  57   uint32_t NumSupportedHardwareWatchpoints() override;
  58
  59   uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
  60                                  uint32_t watch_flags) override;
  61
  62   bool ClearHardwareWatchpoint(uint32_t hw_index) override;
  63
  64   Status ClearAllHardwareWatchpoints() override;
  65
  66   Status GetWatchpointHitIndex(uint32_t &wp_index,
  67                                lldb::addr_t trap_addr) override;
  68
  69   lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override;
  70
  71   lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
  72
  73   uint32_t GetWatchpointSize(uint32_t wp_index);
  74
  75   bool WatchpointIsEnabled(uint32_t wp_index);
  76
  77   // Debug register type select
  78   enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
  79
  80 protected:
  81   Status DoReadRegisterValue(uint32_t offset, const char *reg_name,
  82                              uint32_t size, RegisterValue &value) override;
  83
  84   Status DoWriteRegisterValue(uint32_t offset, const char *reg_name,
  85                               const RegisterValue &value) override;
  86
  87   Status ReadGPR() override;
  88
  89   Status WriteGPR() override;
  90
  91   Status ReadFPR() override;
  92
  93   Status WriteFPR() override;
  94
  95   void *GetGPRBuffer() override { return &m_gpr_arm; }
  96
  97   void *GetFPRBuffer() override { return &m_fpr; }
  98
  99   size_t GetFPRSize() override { return sizeof(m_fpr); }
 100
 101 private:
 102   uint32_t m_gpr_arm[k_num_gpr_registers_arm];
 103   RegisterInfoPOSIX_arm::FPU m_fpr;
 104
 105   // Debug register info for hardware breakpoints and watchpoints management.
 106   struct DREG {
 107     lldb::addr_t address;  // Breakpoint/watchpoint address value.
 108     lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
 109                            // occurred.
 110     lldb::addr_t real_addr; // Address value that should cause target to stop.
 111     uint32_t control;       // Breakpoint/watchpoint control value.
 112     uint32_t refcount;      // Serves as enable/disable and reference counter.
 113   };
 114
 115   struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints
 116   struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints
 117
 118   uint32_t m_max_hwp_supported;
 119   uint32_t m_max_hbp_supported;
 120   bool m_refresh_hwdebug_info;
 121
 122   bool IsGPR(unsigned reg) const;
 123
 124   bool IsFPR(unsigned reg) const;
 125
 126   Status ReadHardwareDebugInfo();
 127
 128   Status WriteHardwareDebugRegs(int hwbType, int hwb_index);
 129
 130   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
 131
 132   RegisterInfoPOSIX_arm &GetRegisterInfo() const;
 133 };
 134
 135 } // namespace process_linux
 136 } // namespace lldb_private
 137
 138 #endif // #ifndef lldb_NativeRegisterContextLinux_arm_h
 139
 140 #endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)