[RISCV] Add RVVConstraint to SiFive custom matrix multiply instructions. (#124055)
[llvm-project.git] / lldb / source / Plugins / Process / Utility / RegisterContextPOSIX_s390x.cpp
blobb85da39b4c45c7616b9697049feca22136e0e663
1 //===-- RegisterContextPOSIX_s390x.cpp ------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include <cerrno>
10 #include <cstdint>
11 #include <cstring>
13 #include "lldb/Target/Process.h"
14 #include "lldb/Target/Target.h"
15 #include "lldb/Target/Thread.h"
16 #include "lldb/Utility/DataBufferHeap.h"
17 #include "lldb/Utility/DataExtractor.h"
18 #include "lldb/Utility/Endian.h"
19 #include "lldb/Utility/RegisterValue.h"
20 #include "lldb/Utility/Scalar.h"
21 #include "llvm/Support/Compiler.h"
23 #include "RegisterContextPOSIX_s390x.h"
24 #include "RegisterContext_s390x.h"
26 using namespace lldb_private;
27 using namespace lldb;
29 // s390x 64-bit general purpose registers.
30 static const uint32_t g_gpr_regnums_s390x[] = {
31 lldb_r0_s390x, lldb_r1_s390x, lldb_r2_s390x, lldb_r3_s390x,
32 lldb_r4_s390x, lldb_r5_s390x, lldb_r6_s390x, lldb_r7_s390x,
33 lldb_r8_s390x, lldb_r9_s390x, lldb_r10_s390x, lldb_r11_s390x,
34 lldb_r12_s390x, lldb_r13_s390x, lldb_r14_s390x, lldb_r15_s390x,
35 lldb_acr0_s390x, lldb_acr1_s390x, lldb_acr2_s390x, lldb_acr3_s390x,
36 lldb_acr4_s390x, lldb_acr5_s390x, lldb_acr6_s390x, lldb_acr7_s390x,
37 lldb_acr8_s390x, lldb_acr9_s390x, lldb_acr10_s390x, lldb_acr11_s390x,
38 lldb_acr12_s390x, lldb_acr13_s390x, lldb_acr14_s390x, lldb_acr15_s390x,
39 lldb_pswm_s390x, lldb_pswa_s390x,
40 LLDB_INVALID_REGNUM // register sets need to end with this flag
42 static_assert((sizeof(g_gpr_regnums_s390x) / sizeof(g_gpr_regnums_s390x[0])) -
43 1 ==
44 k_num_gpr_registers_s390x,
45 "g_gpr_regnums_s390x has wrong number of register infos");
47 // s390x 64-bit floating point registers.
48 static const uint32_t g_fpu_regnums_s390x[] = {
49 lldb_f0_s390x, lldb_f1_s390x, lldb_f2_s390x, lldb_f3_s390x,
50 lldb_f4_s390x, lldb_f5_s390x, lldb_f6_s390x, lldb_f7_s390x,
51 lldb_f8_s390x, lldb_f9_s390x, lldb_f10_s390x, lldb_f11_s390x,
52 lldb_f12_s390x, lldb_f13_s390x, lldb_f14_s390x, lldb_f15_s390x,
53 lldb_fpc_s390x,
54 LLDB_INVALID_REGNUM // register sets need to end with this flag
56 static_assert((sizeof(g_fpu_regnums_s390x) / sizeof(g_fpu_regnums_s390x[0])) -
57 1 ==
58 k_num_fpr_registers_s390x,
59 "g_fpu_regnums_s390x has wrong number of register infos");
61 // Number of register sets provided by this context.
62 enum { k_num_register_sets = 2 };
64 // Register sets for s390x 64-bit.
65 static const RegisterSet g_reg_sets_s390x[k_num_register_sets] = {
66 {"General Purpose Registers", "gpr", k_num_gpr_registers_s390x,
67 g_gpr_regnums_s390x},
68 {"Floating Point Registers", "fpr", k_num_fpr_registers_s390x,
69 g_fpu_regnums_s390x},
72 bool RegisterContextPOSIX_s390x::IsGPR(unsigned reg) {
73 return reg <= m_reg_info.last_gpr; // GPRs come first.
76 bool RegisterContextPOSIX_s390x::IsFPR(unsigned reg) {
77 return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
80 RegisterContextPOSIX_s390x::RegisterContextPOSIX_s390x(
81 Thread &thread, uint32_t concrete_frame_idx,
82 RegisterInfoInterface *register_info)
83 : RegisterContext(thread, concrete_frame_idx) {
84 m_register_info_up.reset(register_info);
86 switch (register_info->GetTargetArchitecture().GetMachine()) {
87 case llvm::Triple::systemz:
88 m_reg_info.num_registers = k_num_registers_s390x;
89 m_reg_info.num_gpr_registers = k_num_gpr_registers_s390x;
90 m_reg_info.num_fpr_registers = k_num_fpr_registers_s390x;
91 m_reg_info.last_gpr = k_last_gpr_s390x;
92 m_reg_info.first_fpr = k_first_fpr_s390x;
93 m_reg_info.last_fpr = k_last_fpr_s390x;
94 break;
95 default:
96 assert(false && "Unhandled target architecture.");
97 break;
101 RegisterContextPOSIX_s390x::~RegisterContextPOSIX_s390x() = default;
103 void RegisterContextPOSIX_s390x::Invalidate() {}
105 void RegisterContextPOSIX_s390x::InvalidateAllRegisters() {}
107 const RegisterInfo *RegisterContextPOSIX_s390x::GetRegisterInfo() {
108 return m_register_info_up->GetRegisterInfo();
111 const RegisterInfo *
112 RegisterContextPOSIX_s390x::GetRegisterInfoAtIndex(size_t reg) {
113 if (reg < m_reg_info.num_registers)
114 return &GetRegisterInfo()[reg];
115 else
116 return nullptr;
119 size_t RegisterContextPOSIX_s390x::GetRegisterCount() {
120 return m_reg_info.num_registers;
123 unsigned RegisterContextPOSIX_s390x::GetRegisterOffset(unsigned reg) {
124 assert(reg < m_reg_info.num_registers && "Invalid register number.");
125 return GetRegisterInfo()[reg].byte_offset;
128 unsigned RegisterContextPOSIX_s390x::GetRegisterSize(unsigned reg) {
129 assert(reg < m_reg_info.num_registers && "Invalid register number.");
130 return GetRegisterInfo()[reg].byte_size;
133 const char *RegisterContextPOSIX_s390x::GetRegisterName(unsigned reg) {
134 assert(reg < m_reg_info.num_registers && "Invalid register offset.");
135 return GetRegisterInfo()[reg].name;
138 bool RegisterContextPOSIX_s390x::IsRegisterSetAvailable(size_t set_index) {
139 return set_index < k_num_register_sets;
142 size_t RegisterContextPOSIX_s390x::GetRegisterSetCount() {
143 size_t sets = 0;
144 for (size_t set = 0; set < k_num_register_sets; ++set) {
145 if (IsRegisterSetAvailable(set))
146 ++sets;
149 return sets;
152 const RegisterSet *RegisterContextPOSIX_s390x::GetRegisterSet(size_t set) {
153 if (IsRegisterSetAvailable(set)) {
154 switch (m_register_info_up->GetTargetArchitecture().GetMachine()) {
155 case llvm::Triple::systemz:
156 return &g_reg_sets_s390x[set];
157 default:
158 assert(false && "Unhandled target architecture.");
159 return nullptr;
162 return nullptr;