lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h

   1 //===-- RegisterInfoPOSIX_arm64.h -------------------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_ARM64_H
  10 #define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_ARM64_H
  11
  12 #include "RegisterInfoAndSetInterface.h"
  13 #include "lldb/Target/RegisterContext.h"
  14 #include "lldb/Utility/Flags.h"
  15 #include "lldb/lldb-private.h"
  16 #include <map>
  17
  18 enum class SVEState : uint8_t { Unknown, Disabled, FPSIMD, Full, Streaming };
  19
  20 class RegisterInfoPOSIX_arm64
  21     : public lldb_private::RegisterInfoAndSetInterface {
  22 public:
  23   enum { GPRegSet = 0, FPRegSet };
  24
  25   // AArch64 register set mask value
  26   enum {
  27     eRegsetMaskDefault = 0,
  28     eRegsetMaskSVE = 1,
  29     eRegsetMaskSSVE = 2,
  30     eRegsetMaskPAuth = 4,
  31     eRegsetMaskMTE = 8,
  32     eRegsetMaskTLS = 16,
  33     eRegsetMaskZA = 32,
  34     eRegsetMaskZT = 64,
  35     eRegsetMaskFPMR = 128,
  36     eRegsetMaskDynamic = ~1,
  37   };
  38
  39   // AArch64 Register set FP/SIMD feature configuration
  40   enum {
  41     eVectorQuadwordAArch64,
  42     eVectorQuadwordAArch64SVE,
  43     eVectorQuadwordAArch64SVEMax = 256
  44   };
  45
  46   // based on RegisterContextDarwin_arm64.h
  47   LLVM_PACKED_START
  48   struct GPR {
  49     uint64_t x[29]; // x0-x28
  50     uint64_t fp;    // x29
  51     uint64_t lr;    // x30
  52     uint64_t sp;    // x31
  53     uint64_t pc;    // pc
  54     uint32_t cpsr;  // cpsr
  55     uint32_t pad;
  56   };
  57   LLVM_PACKED_END
  58
  59   // based on RegisterContextDarwin_arm64.h
  60   struct VReg {
  61     uint8_t bytes[16];
  62   };
  63
  64   // based on RegisterContextDarwin_arm64.h
  65   struct FPU {
  66     VReg v[32];
  67     uint32_t fpsr;
  68     uint32_t fpcr;
  69   };
  70
  71   // based on RegisterContextDarwin_arm64.h
  72   struct EXC {
  73     uint64_t far;       // Virtual Fault Address
  74     uint32_t esr;       // Exception syndrome
  75     uint32_t exception; // number of arm exception token
  76   };
  77
  78   // based on RegisterContextDarwin_arm64.h
  79   struct DBG {
  80     uint64_t bvr[16];
  81     uint64_t bcr[16];
  82     uint64_t wvr[16];
  83     uint64_t wcr[16];
  84     uint64_t mdscr_el1;
  85   };
  86
  87   RegisterInfoPOSIX_arm64(const lldb_private::ArchSpec &target_arch,
  88                           lldb_private::Flags opt_regsets);
  89
  90   static size_t GetGPRSizeStatic();
  91   size_t GetGPRSize() const override { return GetGPRSizeStatic(); }
  92
  93   size_t GetFPRSize() const override;
  94
  95   const lldb_private::RegisterInfo *GetRegisterInfo() const override;
  96
  97   uint32_t GetRegisterCount() const override;
  98
  99   const lldb_private::RegisterSet *
 100   GetRegisterSet(size_t reg_set) const override;
 101
 102   size_t GetRegisterSetCount() const override;
 103
 104   size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
 105
 106   void AddRegSetPAuth();
 107
 108   void AddRegSetMTE();
 109
 110   void AddRegSetTLS(bool has_tpidr2);
 111
 112   void AddRegSetSME(bool has_zt);
 113
 114   void AddRegSetFPMR();
 115
 116   uint32_t ConfigureVectorLengthSVE(uint32_t sve_vq);
 117
 118   void ConfigureVectorLengthZA(uint32_t za_vq);
 119
 120   bool VectorSizeIsValid(uint32_t vq) {
 121     // coverity[unsigned_compare]
 122     if (vq >= eVectorQuadwordAArch64 && vq <= eVectorQuadwordAArch64SVEMax)
 123       return true;
 124     return false;
 125   }
 126
 127   bool IsSVEPresent() const { return m_opt_regsets.AnySet(eRegsetMaskSVE); }
 128   bool IsSSVEPresent() const { return m_opt_regsets.AnySet(eRegsetMaskSSVE); }
 129   bool IsZAPresent() const { return m_opt_regsets.AnySet(eRegsetMaskZA); }
 130   bool IsZTPresent() const { return m_opt_regsets.AnySet(eRegsetMaskZT); }
 131   bool IsPAuthPresent() const { return m_opt_regsets.AnySet(eRegsetMaskPAuth); }
 132   bool IsMTEPresent() const { return m_opt_regsets.AnySet(eRegsetMaskMTE); }
 133   bool IsTLSPresent() const { return m_opt_regsets.AnySet(eRegsetMaskTLS); }
 134   bool IsFPMRPresent() const { return m_opt_regsets.AnySet(eRegsetMaskFPMR); }
 135
 136   bool IsSVEReg(unsigned reg) const;
 137   bool IsSVEZReg(unsigned reg) const;
 138   bool IsSVEPReg(unsigned reg) const;
 139   bool IsSVERegVG(unsigned reg) const;
 140   bool IsPAuthReg(unsigned reg) const;
 141   bool IsMTEReg(unsigned reg) const;
 142   bool IsTLSReg(unsigned reg) const;
 143   bool IsSMEReg(unsigned reg) const;
 144   bool IsSMERegZA(unsigned reg) const;
 145   bool IsSMERegZT(unsigned reg) const;
 146   bool IsFPMRReg(unsigned reg) const;
 147
 148   uint32_t GetRegNumSVEZ0() const;
 149   uint32_t GetRegNumSVEFFR() const;
 150   uint32_t GetRegNumFPCR() const;
 151   uint32_t GetRegNumFPSR() const;
 152   uint32_t GetRegNumSVEVG() const;
 153   uint32_t GetRegNumSMESVG() const;
 154   uint32_t GetPAuthOffset() const;
 155   uint32_t GetMTEOffset() const;
 156   uint32_t GetTLSOffset() const;
 157   uint32_t GetSMEOffset() const;
 158   uint32_t GetFPMROffset() const;
 159
 160 private:
 161   typedef std::map<uint32_t, std::vector<lldb_private::RegisterInfo>>
 162       per_vq_register_infos;
 163
 164   per_vq_register_infos m_per_vq_reg_infos;
 165
 166   uint32_t m_vector_reg_vq = eVectorQuadwordAArch64;
 167   uint32_t m_za_reg_vq = eVectorQuadwordAArch64;
 168
 169   // In normal operation this is const. Only when SVE or SME registers change
 170   // size is it either replaced or the content modified.
 171   const lldb_private::RegisterInfo *m_register_info_p;
 172   uint32_t m_register_info_count;
 173
 174   const lldb_private::RegisterSet *m_register_set_p;
 175   uint32_t m_register_set_count;
 176
 177   // Contains pair of [start, end] register numbers of a register set with start
 178   // and end included.
 179   std::map<uint32_t, std::pair<uint32_t, uint32_t>> m_per_regset_regnum_range;
 180
 181   lldb_private::Flags m_opt_regsets;
 182
 183   std::vector<lldb_private::RegisterInfo> m_dynamic_reg_infos;
 184   std::vector<lldb_private::RegisterSet> m_dynamic_reg_sets;
 185
 186   std::vector<uint32_t> pauth_regnum_collection;
 187   std::vector<uint32_t> m_mte_regnum_collection;
 188   std::vector<uint32_t> m_tls_regnum_collection;
 189   std::vector<uint32_t> m_sme_regnum_collection;
 190   std::vector<uint32_t> m_fpmr_regnum_collection;
 191 };
 192
 193 #endif