[X86] Improve F16C CVT schedules on SNB/HSW/BDW
[llvm-project.git] / llvm / docs / AMDGPU / gfx1030_vcc.rst
blob5313d1228419d25f9ef81ebb567dd2c255c46cf0
1 ..
2     **************************************************
3     *                                                *
4     *   Automatically generated file, do not edit!   *
5     *                                                *
6     **************************************************
8 .. _amdgpu_synid_gfx1030_vcc:
10 vcc
11 ===
13 Vector condition code. This operand depends on wavefront size:
15 * Should be :ref:`vcc_lo<amdgpu_synid_vcc_lo>` if wavefront size is 32.
16 * Should be :ref:`vcc<amdgpu_synid_vcc>` if wavefront size is 64.