[X86] Improve F16C CVT schedules on SNB/HSW/BDW
[llvm-project.git] / llvm / docs / AMDGPU / gfx10_sdata_5e9fb5.rst
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11 =====
13 Input data for an atomic instruction.
15 Optionally, this operand may be used to store output data:
17 * If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
19 *Size:* 1 dword.
21 *Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`