llvm/docs/AMDGPU/gfx10_vdst_eae4c8.rst

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   8 .. _amdgpu_synid_gfx10_vdst_eae4c8:
   9
  10 vdst
  11 ====
  12
  13 Image data to be loaded by an image instruction.
  14
  15 *Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`, :ref:`tfe<amdgpu_synid_tfe>` and :ref:`d16<amdgpu_synid_d16>`:
  16
  17 * :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits, depending on :ref:`d16<amdgpu_synid_d16>`.
  18 * :ref:`d16<amdgpu_synid_d16>` specifies that data elements in registers are packed; each value occupies 16 bits.
  19 * :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
  20
  21 *Operands:* :ref:`v<amdgpu_synid_v>`