[X86] Improve F16C CVT schedules on SNB/HSW/BDW
[llvm-project.git] / llvm / docs / AMDGPU / gfx11_imm16_169952.rst
blobb1dc16a88ba5e8e9c2e00962e51e7d2d1021e7fd
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10 imm16
11 =====
13 An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from 0 to 65535.