[X86] Improve F16C CVT schedules on SNB/HSW/BDW
[llvm-project.git] / llvm / docs / AMDGPU / gfx8_vsrc_ba3116.rst
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10 vsrc
11 ====
13 Data to copy to export buffers. This is an optional operand. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
15 The :ref:`compr<amdgpu_synid_compr>` modifier indicates the use of compressed (16-bit) data, thus decreasing the number of source operands from 4 to 2:
17 * src0 and src1 must specify the first register (or :ref:`off<amdgpu_synid_off>`).
18 * src2 and src3 must specify the second register (or :ref:`off<amdgpu_synid_off>`).
20 An example:
22 .. parsed-literal::
24   exp mrtz v3, v3, off, off compr
26 *Size:* 1 dword.
28 *Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`off<amdgpu_synid_off>`