1 lli - directly execute programs from LLVM bitcode
2 =================================================
9 :program:`lli` [*options*] [*filename*] [*program args*]
14 :program:`lli` directly executes programs in LLVM bitcode format. It takes a program
15 in LLVM bitcode format and executes it using a just-in-time compiler or an
18 :program:`lli` is *not* an emulator. It will not execute IR of different architectures
19 and it can only interpret (or JIT-compile) for the host architecture.
21 The JIT compiler takes the same arguments as other tools, like :program:`llc`,
22 but they don't necessarily work for the interpreter.
24 If `filename` is not specified, then :program:`lli` reads the LLVM bitcode for the
25 program from standard input.
27 The optional *args* specified on the command line are passed to the program as
33 .. option:: -fake-argv0=executable
35 Override the ``argv[0]`` value passed into the executing program.
37 .. option:: -force-interpreter={false,true}
39 If set to true, use the interpreter even if a just-in-time compiler is available
40 for this architecture. Defaults to false.
44 Print a summary of command line options.
46 .. option:: -load=pluginfilename
48 Causes :program:`lli` to load the plugin (shared object) named *pluginfilename* and use
53 Print statistics from the code-generation passes. This is only meaningful for
54 the just-in-time compiler, at present.
56 .. option:: -time-passes
58 Record the amount of time needed for each code-generation pass and print it to
63 Print out the version of :program:`lli` and exit without doing anything else.
68 .. option:: -mtriple=target triple
70 Override the target triple specified in the input bitcode file with the
71 specified string. This may result in a crash if you pick an
72 architecture which is not compatible with the current system.
74 .. option:: -march=arch
76 Specify the architecture for which to generate assembly, overriding the target
77 encoded in the bitcode file. See the output of **llc -help** for a list of
78 valid architectures. By default this is inferred from the target triple or
79 autodetected to the current architecture.
81 .. option:: -mcpu=cpuname
83 Specify a specific chip in the current architecture to generate code for.
84 By default this is inferred from the target triple and autodetected to
85 the current architecture. For a list of available CPUs, use:
86 **llvm-as < /dev/null | llc -march=xyz -mcpu=help**
88 .. option:: -mattr=a1,+a2,-a3,...
90 Override or control specific attributes of the target, such as whether SIMD
91 operations are enabled or not. The default set of attributes is set by the
92 current CPU. For a list of available attributes, use:
93 **llvm-as < /dev/null | llc -march=xyz -mattr=help**
95 FLOATING POINT OPTIONS
96 ----------------------
98 .. option:: -disable-excess-fp-precision
100 Disable optimizations that may increase floating point precision.
102 .. option:: -enable-no-infs-fp-math
104 Enable optimizations that assume no Inf values.
106 .. option:: -enable-no-nans-fp-math
108 Enable optimizations that assume no NAN values.
110 .. option:: -enable-unsafe-fp-math
112 Causes :program:`lli` to enable optimizations that may decrease floating point
115 .. option:: -soft-float
117 Causes :program:`lli` to generate software floating point library calls instead of
118 equivalent hardware instructions.
120 CODE GENERATION OPTIONS
121 -----------------------
123 .. option:: -code-model=model
125 Choose the code model from:
129 default: Target default code model
130 tiny: Tiny code model
131 small: Small code model
132 kernel: Kernel code model
133 medium: Medium code model
134 large: Large code model
136 .. option:: -disable-post-RA-scheduler
138 Disable scheduling after register allocation.
140 .. option:: -disable-spill-fusing
142 Disable fusing of spill code into instructions.
144 .. option:: -jit-enable-eh
146 Exception handling should be enabled in the just-in-time compiler.
148 .. option:: -join-liveintervals
150 Coalesce copies (default=true).
152 .. option:: -nozero-initialized-in-bss
154 Don't place zero-initialized symbols into the BSS section.
156 .. option:: -pre-RA-sched=scheduler
158 Instruction schedulers available (before register allocation):
162 =default: Best scheduler for the target
163 =none: No scheduling: breadth first sequencing
164 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
165 =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
166 =list-burr: Bottom-up register reduction list scheduling
167 =list-tdrr: Top-down register reduction list scheduling
168 =list-td: Top-down list scheduler
170 .. option:: -regalloc=allocator
172 Register allocator to use (default=linearscan)
176 =bigblock: Big-block register allocator
177 =linearscan: linear scan register allocator
178 =local: local register allocator
179 =simple: simple register allocator
181 .. option:: -relocation-model=model
183 Choose relocation model from:
187 =default: Target default relocation model
188 =static: Non-relocatable code
189 =pic: Fully relocatable, position independent code
190 =dynamic-no-pic: Relocatable external references, non-relocatable code
194 Spiller to use (default=local)
198 =simple: simple spiller
199 =local: local spiller
201 .. option:: -x86-asm-syntax=syntax
203 Choose style of code to emit from X86 backend:
207 =att: Emit AT&T-style assembly
208 =intel: Emit Intel-style assembly
213 If :program:`lli` fails to load the program, it will exit with an exit code of 1.
214 Otherwise, it will return the exit code of the program it executes.