1 //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines the DAGTypeLegalizer class. This is a private interface
10 // shared between the code that implements the SelectionDAG::LegalizeTypes
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
16 #define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
18 #include "MatchContext.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/CodeGen/TargetLowering.h"
22 #include "llvm/Support/Compiler.h"
26 //===----------------------------------------------------------------------===//
27 /// This takes an arbitrary SelectionDAG as input and hacks on it until only
28 /// value types the target machine can handle are left. This involves promoting
29 /// small sizes to large sizes or splitting up large values into small values.
31 class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer
{
32 const TargetLowering
&TLI
;
35 /// This pass uses the NodeId on the SDNodes to hold information about the
36 /// state of the node. The enum has all the values.
38 /// All operands have been processed, so this node is ready to be handled.
41 /// This is a new node, not before seen, that was created in the process of
42 /// legalizing some other node.
45 /// This node's ID needs to be set to the number of its unprocessed
49 /// This is a node that has already been processed.
52 // 1+ - This is a node which has this many unprocessed operands.
56 /// This is a bitvector that contains two bits for each simple value type,
57 /// where the two bits correspond to the LegalizeAction enum from
58 /// TargetLowering. This can be queried with "getTypeAction(VT)".
59 TargetLowering::ValueTypeActionImpl ValueTypeActions
;
61 /// Return how we should legalize values of this type.
62 TargetLowering::LegalizeTypeAction
getTypeAction(EVT VT
) const {
63 return TLI
.getTypeAction(*DAG
.getContext(), VT
);
66 /// Return true if this type is legal on this target.
67 bool isTypeLegal(EVT VT
) const {
68 return TLI
.getTypeAction(*DAG
.getContext(), VT
) == TargetLowering::TypeLegal
;
71 /// Return true if this is a simple legal type.
72 bool isSimpleLegalType(EVT VT
) const {
73 return VT
.isSimple() && TLI
.isTypeLegal(VT
);
76 EVT
getSetCCResultType(EVT VT
) const {
77 return TLI
.getSetCCResultType(DAG
.getDataLayout(), *DAG
.getContext(), VT
);
80 /// Pretend all of this node's results are legal.
81 bool IgnoreNodeResults(SDNode
*N
) const {
82 return N
->getOpcode() == ISD::TargetConstant
||
83 N
->getOpcode() == ISD::Register
;
86 // Bijection from SDValue to unique id. As each created node gets a
87 // new id we do not need to worry about reuse expunging. Should we
88 // run out of ids, we can do a one time expensive compactifcation.
89 typedef unsigned TableId
;
91 TableId NextValueId
= 1;
93 SmallDenseMap
<SDValue
, TableId
, 8> ValueToIdMap
;
94 SmallDenseMap
<TableId
, SDValue
, 8> IdToValueMap
;
96 /// For integer nodes that are below legal width, this map indicates what
97 /// promoted value to use.
98 SmallDenseMap
<TableId
, TableId
, 8> PromotedIntegers
;
100 /// For integer nodes that need to be expanded this map indicates which
101 /// operands are the expanded version of the input.
102 SmallDenseMap
<TableId
, std::pair
<TableId
, TableId
>, 8> ExpandedIntegers
;
104 /// For floating-point nodes converted to integers of the same size, this map
105 /// indicates the converted value to use.
106 SmallDenseMap
<TableId
, TableId
, 8> SoftenedFloats
;
108 /// For floating-point nodes that have a smaller precision than the smallest
109 /// supported precision, this map indicates what promoted value to use.
110 SmallDenseMap
<TableId
, TableId
, 8> PromotedFloats
;
112 /// For floating-point nodes that have a smaller precision than the smallest
113 /// supported precision, this map indicates the converted value to use.
114 SmallDenseMap
<TableId
, TableId
, 8> SoftPromotedHalfs
;
116 /// For float nodes that need to be expanded this map indicates which operands
117 /// are the expanded version of the input.
118 SmallDenseMap
<TableId
, std::pair
<TableId
, TableId
>, 8> ExpandedFloats
;
120 /// For nodes that are <1 x ty>, this map indicates the scalar value of type
122 SmallDenseMap
<TableId
, TableId
, 8> ScalarizedVectors
;
124 /// For nodes that need to be split this map indicates which operands are the
125 /// expanded version of the input.
126 SmallDenseMap
<TableId
, std::pair
<TableId
, TableId
>, 8> SplitVectors
;
128 /// For vector nodes that need to be widened, indicates the widened value to
130 SmallDenseMap
<TableId
, TableId
, 8> WidenedVectors
;
132 /// For values that have been replaced with another, indicates the replacement
134 SmallDenseMap
<TableId
, TableId
, 8> ReplacedValues
;
136 /// This defines a worklist of nodes to process. In order to be pushed onto
137 /// this worklist, all operands of a node must have already been processed.
138 SmallVector
<SDNode
*, 128> Worklist
;
140 TableId
getTableId(SDValue V
) {
141 assert(V
.getNode() && "Getting TableId on SDValue()");
143 auto I
= ValueToIdMap
.find(V
);
144 if (I
!= ValueToIdMap
.end()) {
145 // replace if there's been a shift.
147 assert(I
->second
&& "All Ids should be nonzero");
150 // Add if it's not there.
151 ValueToIdMap
.insert(std::make_pair(V
, NextValueId
));
152 IdToValueMap
.insert(std::make_pair(NextValueId
, V
));
154 assert(NextValueId
!= 0 &&
155 "Ran out of Ids. Increase id type size or add compactification");
156 return NextValueId
- 1;
159 const SDValue
&getSDValue(TableId
&Id
) {
161 assert(Id
&& "TableId should be non-zero");
162 auto I
= IdToValueMap
.find(Id
);
163 assert(I
!= IdToValueMap
.end() && "cannot find Id in map");
168 explicit DAGTypeLegalizer(SelectionDAG
&dag
)
169 : TLI(dag
.getTargetLoweringInfo()), DAG(dag
),
170 ValueTypeActions(TLI
.getValueTypeActions()) {
173 /// This is the main entry point for the type legalizer. This does a
174 /// top-down traversal of the dag, legalizing types as it goes. Returns
175 /// "true" if it made any changes.
178 void NoteDeletion(SDNode
*Old
, SDNode
*New
) {
179 assert(Old
!= New
&& "node replaced with self");
180 for (unsigned i
= 0, e
= Old
->getNumValues(); i
!= e
; ++i
) {
181 TableId NewId
= getTableId(SDValue(New
, i
));
182 TableId OldId
= getTableId(SDValue(Old
, i
));
184 if (OldId
!= NewId
) {
185 ReplacedValues
[OldId
] = NewId
;
187 // Delete Node from tables. We cannot do this when OldId == NewId,
188 // because NewId can still have table references to it in
190 IdToValueMap
.erase(OldId
);
191 PromotedIntegers
.erase(OldId
);
192 ExpandedIntegers
.erase(OldId
);
193 SoftenedFloats
.erase(OldId
);
194 PromotedFloats
.erase(OldId
);
195 SoftPromotedHalfs
.erase(OldId
);
196 ExpandedFloats
.erase(OldId
);
197 ScalarizedVectors
.erase(OldId
);
198 SplitVectors
.erase(OldId
);
199 WidenedVectors
.erase(OldId
);
202 ValueToIdMap
.erase(SDValue(Old
, i
));
206 SelectionDAG
&getDAG() const { return DAG
; }
209 SDNode
*AnalyzeNewNode(SDNode
*N
);
210 void AnalyzeNewValue(SDValue
&Val
);
211 void PerformExpensiveChecks();
212 void RemapId(TableId
&Id
);
213 void RemapValue(SDValue
&V
);
216 SDValue
BitConvertToInteger(SDValue Op
);
217 SDValue
BitConvertVectorToIntegerVector(SDValue Op
);
218 SDValue
CreateStackStoreLoad(SDValue Op
, EVT DestVT
);
219 bool CustomLowerNode(SDNode
*N
, EVT VT
, bool LegalizeResult
);
220 bool CustomWidenLowerNode(SDNode
*N
, EVT VT
);
222 /// Replace each result of the given MERGE_VALUES node with the corresponding
223 /// input operand, except for the result 'ResNo', for which the corresponding
224 /// input operand is returned.
225 SDValue
DisintegrateMERGE_VALUES(SDNode
*N
, unsigned ResNo
);
227 SDValue
JoinIntegers(SDValue Lo
, SDValue Hi
);
229 std::pair
<SDValue
, SDValue
> ExpandAtomic(SDNode
*Node
);
231 SDValue
PromoteTargetBoolean(SDValue Bool
, EVT ValVT
);
233 void ReplaceValueWith(SDValue From
, SDValue To
);
234 void SplitInteger(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
235 void SplitInteger(SDValue Op
, EVT LoVT
, EVT HiVT
,
236 SDValue
&Lo
, SDValue
&Hi
);
238 //===--------------------------------------------------------------------===//
239 // Integer Promotion Support: LegalizeIntegerTypes.cpp
240 //===--------------------------------------------------------------------===//
242 /// Given a processed operand Op which was promoted to a larger integer type,
243 /// this returns the promoted value. The low bits of the promoted value
244 /// corresponding to the original type are exactly equal to Op.
245 /// The extra bits contain rubbish, so the promoted value may need to be zero-
246 /// or sign-extended from the original type before it is usable (the helpers
247 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
248 /// For example, if Op is an i16 and was promoted to an i32, then this method
249 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
250 /// 16 bits of which contain rubbish.
251 SDValue
GetPromotedInteger(SDValue Op
) {
252 TableId
&PromotedId
= PromotedIntegers
[getTableId(Op
)];
253 SDValue PromotedOp
= getSDValue(PromotedId
);
254 assert(PromotedOp
.getNode() && "Operand wasn't promoted?");
257 void SetPromotedInteger(SDValue Op
, SDValue Result
);
259 /// Get a promoted operand and sign extend it to the final size.
260 SDValue
SExtPromotedInteger(SDValue Op
) {
261 EVT OldVT
= Op
.getValueType();
263 Op
= GetPromotedInteger(Op
);
264 return DAG
.getNode(ISD::SIGN_EXTEND_INREG
, dl
, Op
.getValueType(), Op
,
265 DAG
.getValueType(OldVT
));
268 /// Get a promoted operand and zero extend it to the final size.
269 SDValue
ZExtPromotedInteger(SDValue Op
) {
270 EVT OldVT
= Op
.getValueType();
272 Op
= GetPromotedInteger(Op
);
273 return DAG
.getZeroExtendInReg(Op
, dl
, OldVT
);
276 /// Get a promoted operand and zero extend it to the final size.
277 SDValue
VPSExtPromotedInteger(SDValue Op
, SDValue Mask
, SDValue EVL
) {
278 EVT OldVT
= Op
.getValueType();
280 Op
= GetPromotedInteger(Op
);
281 // FIXME: Add VP_SIGN_EXTEND_INREG.
282 EVT VT
= Op
.getValueType();
283 unsigned BitsDiff
= VT
.getScalarSizeInBits() - OldVT
.getScalarSizeInBits();
284 SDValue ShiftCst
= DAG
.getShiftAmountConstant(BitsDiff
, VT
, dl
);
285 SDValue Shl
= DAG
.getNode(ISD::VP_SHL
, dl
, VT
, Op
, ShiftCst
, Mask
, EVL
);
286 return DAG
.getNode(ISD::VP_SRA
, dl
, VT
, Shl
, ShiftCst
, Mask
, EVL
);
289 /// Get a promoted operand and zero extend it to the final size.
290 SDValue
VPZExtPromotedInteger(SDValue Op
, SDValue Mask
, SDValue EVL
) {
291 EVT OldVT
= Op
.getValueType();
293 Op
= GetPromotedInteger(Op
);
294 return DAG
.getVPZeroExtendInReg(Op
, Mask
, EVL
, dl
, OldVT
);
297 // Promote the given operand V (vector or scalar) according to N's specific
298 // reduction kind. N must be an integer VECREDUCE_* or VP_REDUCE_*. Returns
299 // the nominal extension opcode (ISD::(ANY|ZERO|SIGN)_EXTEND) and the
301 SDValue
PromoteIntOpVectorReduction(SDNode
*N
, SDValue V
);
303 // Integer Result Promotion.
304 void PromoteIntegerResult(SDNode
*N
, unsigned ResNo
);
305 SDValue
PromoteIntRes_MERGE_VALUES(SDNode
*N
, unsigned ResNo
);
306 SDValue
PromoteIntRes_AssertSext(SDNode
*N
);
307 SDValue
PromoteIntRes_AssertZext(SDNode
*N
);
308 SDValue
PromoteIntRes_Atomic0(AtomicSDNode
*N
);
309 SDValue
PromoteIntRes_Atomic1(AtomicSDNode
*N
);
310 SDValue
PromoteIntRes_AtomicCmpSwap(AtomicSDNode
*N
, unsigned ResNo
);
311 SDValue
PromoteIntRes_EXTRACT_SUBVECTOR(SDNode
*N
);
312 SDValue
PromoteIntRes_INSERT_SUBVECTOR(SDNode
*N
);
313 SDValue
PromoteIntRes_VECTOR_REVERSE(SDNode
*N
);
314 SDValue
PromoteIntRes_VECTOR_SHUFFLE(SDNode
*N
);
315 SDValue
PromoteIntRes_VECTOR_SPLICE(SDNode
*N
);
316 SDValue
PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE(SDNode
*N
);
317 SDValue
PromoteIntRes_BUILD_VECTOR(SDNode
*N
);
318 SDValue
PromoteIntRes_ScalarOp(SDNode
*N
);
319 SDValue
PromoteIntRes_STEP_VECTOR(SDNode
*N
);
320 SDValue
PromoteIntRes_EXTEND_VECTOR_INREG(SDNode
*N
);
321 SDValue
PromoteIntRes_INSERT_VECTOR_ELT(SDNode
*N
);
322 SDValue
PromoteIntRes_CONCAT_VECTORS(SDNode
*N
);
323 SDValue
PromoteIntRes_BITCAST(SDNode
*N
);
324 SDValue
PromoteIntRes_BSWAP(SDNode
*N
);
325 SDValue
PromoteIntRes_BITREVERSE(SDNode
*N
);
326 SDValue
PromoteIntRes_BUILD_PAIR(SDNode
*N
);
327 SDValue
PromoteIntRes_Constant(SDNode
*N
);
328 SDValue
PromoteIntRes_CTLZ(SDNode
*N
);
329 SDValue
PromoteIntRes_CTPOP_PARITY(SDNode
*N
);
330 SDValue
PromoteIntRes_CTTZ(SDNode
*N
);
331 SDValue
PromoteIntRes_VP_CttzElements(SDNode
*N
);
332 SDValue
PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode
*N
);
333 SDValue
PromoteIntRes_FP_TO_XINT(SDNode
*N
);
334 SDValue
PromoteIntRes_FP_TO_XINT_SAT(SDNode
*N
);
335 SDValue
PromoteIntRes_FP_TO_FP16_BF16(SDNode
*N
);
336 SDValue
PromoteIntRes_STRICT_FP_TO_FP16_BF16(SDNode
*N
);
337 SDValue
PromoteIntRes_XRINT(SDNode
*N
);
338 SDValue
PromoteIntRes_FREEZE(SDNode
*N
);
339 SDValue
PromoteIntRes_INT_EXTEND(SDNode
*N
);
340 SDValue
PromoteIntRes_LOAD(LoadSDNode
*N
);
341 SDValue
PromoteIntRes_VP_LOAD(VPLoadSDNode
*N
);
342 SDValue
PromoteIntRes_MLOAD(MaskedLoadSDNode
*N
);
343 SDValue
PromoteIntRes_MGATHER(MaskedGatherSDNode
*N
);
344 SDValue
PromoteIntRes_VECTOR_COMPRESS(SDNode
*N
);
345 SDValue
PromoteIntRes_Overflow(SDNode
*N
);
346 SDValue
PromoteIntRes_FFREXP(SDNode
*N
);
347 SDValue
PromoteIntRes_SADDSUBO(SDNode
*N
, unsigned ResNo
);
348 SDValue
PromoteIntRes_CMP(SDNode
*N
);
349 SDValue
PromoteIntRes_Select(SDNode
*N
);
350 SDValue
PromoteIntRes_SELECT_CC(SDNode
*N
);
351 SDValue
PromoteIntRes_SETCC(SDNode
*N
);
352 SDValue
PromoteIntRes_SHL(SDNode
*N
);
353 SDValue
PromoteIntRes_SimpleIntBinOp(SDNode
*N
);
354 SDValue
PromoteIntRes_ZExtIntBinOp(SDNode
*N
);
355 SDValue
PromoteIntRes_SExtIntBinOp(SDNode
*N
);
356 SDValue
PromoteIntRes_UMINUMAX(SDNode
*N
);
357 SDValue
PromoteIntRes_SIGN_EXTEND_INREG(SDNode
*N
);
358 SDValue
PromoteIntRes_SRA(SDNode
*N
);
359 SDValue
PromoteIntRes_SRL(SDNode
*N
);
360 SDValue
PromoteIntRes_TRUNCATE(SDNode
*N
);
361 SDValue
PromoteIntRes_UADDSUBO(SDNode
*N
, unsigned ResNo
);
362 SDValue
PromoteIntRes_UADDSUBO_CARRY(SDNode
*N
, unsigned ResNo
);
363 SDValue
PromoteIntRes_SADDSUBO_CARRY(SDNode
*N
, unsigned ResNo
);
364 SDValue
PromoteIntRes_UNDEF(SDNode
*N
);
365 SDValue
PromoteIntRes_VAARG(SDNode
*N
);
366 SDValue
PromoteIntRes_VSCALE(SDNode
*N
);
367 SDValue
PromoteIntRes_XMULO(SDNode
*N
, unsigned ResNo
);
368 template <class MatchContextClass
>
369 SDValue
PromoteIntRes_ADDSUBSHLSAT(SDNode
*N
);
370 SDValue
PromoteIntRes_MULFIX(SDNode
*N
);
371 SDValue
PromoteIntRes_DIVFIX(SDNode
*N
);
372 SDValue
PromoteIntRes_GET_ROUNDING(SDNode
*N
);
373 SDValue
PromoteIntRes_VECREDUCE(SDNode
*N
);
374 SDValue
PromoteIntRes_VP_REDUCE(SDNode
*N
);
375 SDValue
PromoteIntRes_ABS(SDNode
*N
);
376 SDValue
PromoteIntRes_Rotate(SDNode
*N
);
377 SDValue
PromoteIntRes_FunnelShift(SDNode
*N
);
378 SDValue
PromoteIntRes_VPFunnelShift(SDNode
*N
);
379 SDValue
PromoteIntRes_IS_FPCLASS(SDNode
*N
);
380 SDValue
PromoteIntRes_PATCHPOINT(SDNode
*N
);
382 // Integer Operand Promotion.
383 bool PromoteIntegerOperand(SDNode
*N
, unsigned OpNo
);
384 SDValue
PromoteIntOp_ANY_EXTEND(SDNode
*N
);
385 SDValue
PromoteIntOp_ATOMIC_STORE(AtomicSDNode
*N
);
386 SDValue
PromoteIntOp_BITCAST(SDNode
*N
);
387 SDValue
PromoteIntOp_BUILD_PAIR(SDNode
*N
);
388 SDValue
PromoteIntOp_BR_CC(SDNode
*N
, unsigned OpNo
);
389 SDValue
PromoteIntOp_BRCOND(SDNode
*N
, unsigned OpNo
);
390 SDValue
PromoteIntOp_BUILD_VECTOR(SDNode
*N
);
391 SDValue
PromoteIntOp_INSERT_VECTOR_ELT(SDNode
*N
, unsigned OpNo
);
392 SDValue
PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
393 SDValue
PromoteIntOp_EXTRACT_SUBVECTOR(SDNode
*N
);
394 SDValue
PromoteIntOp_INSERT_SUBVECTOR(SDNode
*N
);
395 SDValue
PromoteIntOp_FAKE_USE(SDNode
*N
);
396 SDValue
PromoteIntOp_CONCAT_VECTORS(SDNode
*N
);
397 SDValue
PromoteIntOp_ScalarOp(SDNode
*N
);
398 SDValue
PromoteIntOp_SELECT(SDNode
*N
, unsigned OpNo
);
399 SDValue
PromoteIntOp_SELECT_CC(SDNode
*N
, unsigned OpNo
);
400 SDValue
PromoteIntOp_SETCC(SDNode
*N
, unsigned OpNo
);
401 SDValue
PromoteIntOp_Shift(SDNode
*N
);
402 SDValue
PromoteIntOp_CMP(SDNode
*N
);
403 SDValue
PromoteIntOp_FunnelShift(SDNode
*N
);
404 SDValue
PromoteIntOp_SIGN_EXTEND(SDNode
*N
);
405 SDValue
PromoteIntOp_VP_SIGN_EXTEND(SDNode
*N
);
406 SDValue
PromoteIntOp_SINT_TO_FP(SDNode
*N
);
407 SDValue
PromoteIntOp_STRICT_SINT_TO_FP(SDNode
*N
);
408 SDValue
PromoteIntOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
409 SDValue
PromoteIntOp_TRUNCATE(SDNode
*N
);
410 SDValue
PromoteIntOp_UINT_TO_FP(SDNode
*N
);
411 SDValue
PromoteIntOp_STRICT_UINT_TO_FP(SDNode
*N
);
412 SDValue
PromoteIntOp_ZERO_EXTEND(SDNode
*N
);
413 SDValue
PromoteIntOp_VP_ZERO_EXTEND(SDNode
*N
);
414 SDValue
PromoteIntOp_MSTORE(MaskedStoreSDNode
*N
, unsigned OpNo
);
415 SDValue
PromoteIntOp_MLOAD(MaskedLoadSDNode
*N
, unsigned OpNo
);
416 SDValue
PromoteIntOp_MSCATTER(MaskedScatterSDNode
*N
, unsigned OpNo
);
417 SDValue
PromoteIntOp_MGATHER(MaskedGatherSDNode
*N
, unsigned OpNo
);
418 SDValue
PromoteIntOp_VECTOR_COMPRESS(SDNode
*N
, unsigned OpNo
);
419 SDValue
PromoteIntOp_FRAMERETURNADDR(SDNode
*N
);
420 SDValue
PromoteIntOp_FIX(SDNode
*N
);
421 SDValue
PromoteIntOp_ExpOp(SDNode
*N
);
422 SDValue
PromoteIntOp_VECREDUCE(SDNode
*N
);
423 SDValue
PromoteIntOp_VP_REDUCE(SDNode
*N
, unsigned OpNo
);
424 SDValue
PromoteIntOp_VP_STORE(VPStoreSDNode
*N
, unsigned OpNo
);
425 SDValue
PromoteIntOp_SET_ROUNDING(SDNode
*N
);
426 SDValue
PromoteIntOp_STACKMAP(SDNode
*N
, unsigned OpNo
);
427 SDValue
PromoteIntOp_PATCHPOINT(SDNode
*N
, unsigned OpNo
);
428 SDValue
PromoteIntOp_VP_STRIDED(SDNode
*N
, unsigned OpNo
);
429 SDValue
PromoteIntOp_VP_SPLICE(SDNode
*N
, unsigned OpNo
);
430 SDValue
PromoteIntOp_VECTOR_HISTOGRAM(SDNode
*N
, unsigned OpNo
);
432 void SExtOrZExtPromotedOperands(SDValue
&LHS
, SDValue
&RHS
);
433 void PromoteSetCCOperands(SDValue
&LHS
,SDValue
&RHS
, ISD::CondCode Code
);
435 //===--------------------------------------------------------------------===//
436 // Integer Expansion Support: LegalizeIntegerTypes.cpp
437 //===--------------------------------------------------------------------===//
439 /// Given a processed operand Op which was expanded into two integers of half
440 /// the size, this returns the two halves. The low bits of Op are exactly
441 /// equal to the bits of Lo; the high bits exactly equal Hi.
442 /// For example, if Op is an i64 which was expanded into two i32's, then this
443 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
444 /// Op, and Hi being equal to the upper 32 bits.
445 void GetExpandedInteger(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
446 void SetExpandedInteger(SDValue Op
, SDValue Lo
, SDValue Hi
);
448 // Integer Result Expansion.
449 void ExpandIntegerResult(SDNode
*N
, unsigned ResNo
);
450 void ExpandIntRes_ANY_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
451 void ExpandIntRes_AssertSext (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
452 void ExpandIntRes_AssertZext (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
453 void ExpandIntRes_Constant (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
454 void ExpandIntRes_ABS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
455 void ExpandIntRes_ABD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
456 void ExpandIntRes_CTLZ (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
457 void ExpandIntRes_CTPOP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
458 void ExpandIntRes_CTTZ (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
459 void ExpandIntRes_LOAD (LoadSDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
460 void ExpandIntRes_READCOUNTER (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
461 void ExpandIntRes_SIGN_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
462 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
463 void ExpandIntRes_TRUNCATE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
464 void ExpandIntRes_ZERO_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
465 void ExpandIntRes_GET_ROUNDING (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
466 void ExpandIntRes_FP_TO_XINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
467 void ExpandIntRes_FP_TO_XINT_SAT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
468 void ExpandIntRes_XROUND_XRINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
470 void ExpandIntRes_Logical (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
471 void ExpandIntRes_ADDSUB (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
472 void ExpandIntRes_ADDSUBC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
473 void ExpandIntRes_ADDSUBE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
474 void ExpandIntRes_UADDSUBO_CARRY (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
475 void ExpandIntRes_SADDSUBO_CARRY (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
476 void ExpandIntRes_BITREVERSE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
477 void ExpandIntRes_BSWAP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
478 void ExpandIntRes_PARITY (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
479 void ExpandIntRes_MUL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
480 void ExpandIntRes_SDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
481 void ExpandIntRes_SREM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
482 void ExpandIntRes_UDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
483 void ExpandIntRes_UREM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
484 void ExpandIntRes_ShiftThroughStack (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
485 void ExpandIntRes_Shift (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
487 void ExpandIntRes_MINMAX (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
489 void ExpandIntRes_CMP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
490 void ExpandIntRes_SETCC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
492 void ExpandIntRes_SADDSUBO (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
493 void ExpandIntRes_UADDSUBO (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
494 void ExpandIntRes_XMULO (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
495 void ExpandIntRes_AVG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
496 void ExpandIntRes_ADDSUBSAT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
497 void ExpandIntRes_SHLSAT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
498 void ExpandIntRes_MULFIX (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
499 void ExpandIntRes_DIVFIX (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
501 void ExpandIntRes_ATOMIC_LOAD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
502 void ExpandIntRes_VECREDUCE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
504 void ExpandIntRes_Rotate (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
505 void ExpandIntRes_FunnelShift (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
507 void ExpandIntRes_VSCALE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
509 void ExpandShiftByConstant(SDNode
*N
, const APInt
&Amt
,
510 SDValue
&Lo
, SDValue
&Hi
);
511 bool ExpandShiftWithKnownAmountBit(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
512 bool ExpandShiftWithUnknownAmountBit(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
514 // Integer Operand Expansion.
515 bool ExpandIntegerOperand(SDNode
*N
, unsigned OpNo
);
516 SDValue
ExpandIntOp_BR_CC(SDNode
*N
);
517 SDValue
ExpandIntOp_SELECT_CC(SDNode
*N
);
518 SDValue
ExpandIntOp_SETCC(SDNode
*N
);
519 SDValue
ExpandIntOp_SETCCCARRY(SDNode
*N
);
520 SDValue
ExpandIntOp_Shift(SDNode
*N
);
521 SDValue
ExpandIntOp_CMP(SDNode
*N
);
522 SDValue
ExpandIntOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
523 SDValue
ExpandIntOp_TRUNCATE(SDNode
*N
);
524 SDValue
ExpandIntOp_XINT_TO_FP(SDNode
*N
);
525 SDValue
ExpandIntOp_RETURNADDR(SDNode
*N
);
526 SDValue
ExpandIntOp_ATOMIC_STORE(SDNode
*N
);
527 SDValue
ExpandIntOp_SPLAT_VECTOR(SDNode
*N
);
528 SDValue
ExpandIntOp_STACKMAP(SDNode
*N
, unsigned OpNo
);
529 SDValue
ExpandIntOp_PATCHPOINT(SDNode
*N
, unsigned OpNo
);
530 SDValue
ExpandIntOp_VP_STRIDED(SDNode
*N
, unsigned OpNo
);
532 void IntegerExpandSetCCOperands(SDValue
&NewLHS
, SDValue
&NewRHS
,
533 ISD::CondCode
&CCCode
, const SDLoc
&dl
);
535 //===--------------------------------------------------------------------===//
536 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
537 //===--------------------------------------------------------------------===//
539 /// GetSoftenedFloat - Given a processed operand Op which was converted to an
540 /// integer of the same size, this returns the integer. The integer contains
541 /// exactly the same bits as Op - only the type changed. For example, if Op
542 /// is an f32 which was softened to an i32, then this method returns an i32,
543 /// the bits of which coincide with those of Op
544 SDValue
GetSoftenedFloat(SDValue Op
) {
545 TableId Id
= getTableId(Op
);
546 auto Iter
= SoftenedFloats
.find(Id
);
547 if (Iter
== SoftenedFloats
.end()) {
548 assert(isSimpleLegalType(Op
.getValueType()) &&
549 "Operand wasn't converted to integer?");
552 SDValue SoftenedOp
= getSDValue(Iter
->second
);
553 assert(SoftenedOp
.getNode() && "Unconverted op in SoftenedFloats?");
556 void SetSoftenedFloat(SDValue Op
, SDValue Result
);
558 // Convert Float Results to Integer.
559 void SoftenFloatResult(SDNode
*N
, unsigned ResNo
);
560 SDValue
SoftenFloatRes_Unary(SDNode
*N
, RTLIB::Libcall LC
);
561 SDValue
SoftenFloatRes_UnaryWithTwoFPResults(SDNode
*N
, RTLIB::Libcall LC
);
562 SDValue
SoftenFloatRes_Binary(SDNode
*N
, RTLIB::Libcall LC
);
563 SDValue
SoftenFloatRes_MERGE_VALUES(SDNode
*N
, unsigned ResNo
);
564 SDValue
SoftenFloatRes_ARITH_FENCE(SDNode
*N
);
565 SDValue
SoftenFloatRes_BITCAST(SDNode
*N
);
566 SDValue
SoftenFloatRes_BUILD_PAIR(SDNode
*N
);
567 SDValue
SoftenFloatRes_ConstantFP(SDNode
*N
);
568 SDValue
SoftenFloatRes_EXTRACT_ELEMENT(SDNode
*N
);
569 SDValue
SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode
*N
, unsigned ResNo
);
570 SDValue
SoftenFloatRes_FABS(SDNode
*N
);
571 SDValue
SoftenFloatRes_FACOS(SDNode
*N
);
572 SDValue
SoftenFloatRes_FASIN(SDNode
*N
);
573 SDValue
SoftenFloatRes_FATAN(SDNode
*N
);
574 SDValue
SoftenFloatRes_FATAN2(SDNode
*N
);
575 SDValue
SoftenFloatRes_FMINNUM(SDNode
*N
);
576 SDValue
SoftenFloatRes_FMAXNUM(SDNode
*N
);
577 SDValue
SoftenFloatRes_FMINIMUMNUM(SDNode
*N
);
578 SDValue
SoftenFloatRes_FMAXIMUMNUM(SDNode
*N
);
579 SDValue
SoftenFloatRes_FMINIMUM(SDNode
*N
);
580 SDValue
SoftenFloatRes_FMAXIMUM(SDNode
*N
);
581 SDValue
SoftenFloatRes_FADD(SDNode
*N
);
582 SDValue
SoftenFloatRes_FCBRT(SDNode
*N
);
583 SDValue
SoftenFloatRes_FCEIL(SDNode
*N
);
584 SDValue
SoftenFloatRes_FCOPYSIGN(SDNode
*N
);
585 SDValue
SoftenFloatRes_FCOS(SDNode
*N
);
586 SDValue
SoftenFloatRes_FCOSH(SDNode
*N
);
587 SDValue
SoftenFloatRes_FDIV(SDNode
*N
);
588 SDValue
SoftenFloatRes_FEXP(SDNode
*N
);
589 SDValue
SoftenFloatRes_FEXP2(SDNode
*N
);
590 SDValue
SoftenFloatRes_FEXP10(SDNode
*N
);
591 SDValue
SoftenFloatRes_FFLOOR(SDNode
*N
);
592 SDValue
SoftenFloatRes_FLOG(SDNode
*N
);
593 SDValue
SoftenFloatRes_FLOG2(SDNode
*N
);
594 SDValue
SoftenFloatRes_FLOG10(SDNode
*N
);
595 SDValue
SoftenFloatRes_FMA(SDNode
*N
);
596 SDValue
SoftenFloatRes_FMUL(SDNode
*N
);
597 SDValue
SoftenFloatRes_FNEARBYINT(SDNode
*N
);
598 SDValue
SoftenFloatRes_FNEG(SDNode
*N
);
599 SDValue
SoftenFloatRes_FP_EXTEND(SDNode
*N
);
600 SDValue
SoftenFloatRes_FP16_TO_FP(SDNode
*N
);
601 SDValue
SoftenFloatRes_BF16_TO_FP(SDNode
*N
);
602 SDValue
SoftenFloatRes_FP_ROUND(SDNode
*N
);
603 SDValue
SoftenFloatRes_FPOW(SDNode
*N
);
604 SDValue
SoftenFloatRes_ExpOp(SDNode
*N
);
605 SDValue
SoftenFloatRes_FFREXP(SDNode
*N
);
606 SDValue
SoftenFloatRes_FSINCOS(SDNode
*N
);
607 SDValue
SoftenFloatRes_FREEZE(SDNode
*N
);
608 SDValue
SoftenFloatRes_FREM(SDNode
*N
);
609 SDValue
SoftenFloatRes_FRINT(SDNode
*N
);
610 SDValue
SoftenFloatRes_FROUND(SDNode
*N
);
611 SDValue
SoftenFloatRes_FROUNDEVEN(SDNode
*N
);
612 SDValue
SoftenFloatRes_FSIN(SDNode
*N
);
613 SDValue
SoftenFloatRes_FSINH(SDNode
*N
);
614 SDValue
SoftenFloatRes_FSQRT(SDNode
*N
);
615 SDValue
SoftenFloatRes_FSUB(SDNode
*N
);
616 SDValue
SoftenFloatRes_FTAN(SDNode
*N
);
617 SDValue
SoftenFloatRes_FTANH(SDNode
*N
);
618 SDValue
SoftenFloatRes_FTRUNC(SDNode
*N
);
619 SDValue
SoftenFloatRes_LOAD(SDNode
*N
);
620 SDValue
SoftenFloatRes_ATOMIC_LOAD(SDNode
*N
);
621 SDValue
SoftenFloatRes_SELECT(SDNode
*N
);
622 SDValue
SoftenFloatRes_SELECT_CC(SDNode
*N
);
623 SDValue
SoftenFloatRes_UNDEF(SDNode
*N
);
624 SDValue
SoftenFloatRes_VAARG(SDNode
*N
);
625 SDValue
SoftenFloatRes_XINT_TO_FP(SDNode
*N
);
626 SDValue
SoftenFloatRes_VECREDUCE(SDNode
*N
);
627 SDValue
SoftenFloatRes_VECREDUCE_SEQ(SDNode
*N
);
629 // Convert Float Operand to Integer.
630 bool SoftenFloatOperand(SDNode
*N
, unsigned OpNo
);
631 SDValue
SoftenFloatOp_Unary(SDNode
*N
, RTLIB::Libcall LC
);
632 SDValue
SoftenFloatOp_BITCAST(SDNode
*N
);
633 SDValue
SoftenFloatOp_BR_CC(SDNode
*N
);
634 SDValue
SoftenFloatOp_FP_ROUND(SDNode
*N
);
635 SDValue
SoftenFloatOp_FP_TO_XINT(SDNode
*N
);
636 SDValue
SoftenFloatOp_FP_TO_XINT_SAT(SDNode
*N
);
637 SDValue
SoftenFloatOp_LROUND(SDNode
*N
);
638 SDValue
SoftenFloatOp_LLROUND(SDNode
*N
);
639 SDValue
SoftenFloatOp_LRINT(SDNode
*N
);
640 SDValue
SoftenFloatOp_LLRINT(SDNode
*N
);
641 SDValue
SoftenFloatOp_SELECT_CC(SDNode
*N
);
642 SDValue
SoftenFloatOp_SETCC(SDNode
*N
);
643 SDValue
SoftenFloatOp_STORE(SDNode
*N
, unsigned OpNo
);
644 SDValue
SoftenFloatOp_ATOMIC_STORE(SDNode
*N
, unsigned OpNo
);
645 SDValue
SoftenFloatOp_FCOPYSIGN(SDNode
*N
);
647 //===--------------------------------------------------------------------===//
648 // Float Expansion Support: LegalizeFloatTypes.cpp
649 //===--------------------------------------------------------------------===//
651 /// Given a processed operand Op which was expanded into two floating-point
652 /// values of half the size, this returns the two halves.
653 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
654 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
655 /// into two f64's, then this method returns the two f64's, with Lo being
656 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
657 void GetExpandedFloat(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
658 void SetExpandedFloat(SDValue Op
, SDValue Lo
, SDValue Hi
);
660 // Float Result Expansion.
661 void ExpandFloatResult(SDNode
*N
, unsigned ResNo
);
662 void ExpandFloatRes_ConstantFP(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
663 void ExpandFloatRes_Unary(SDNode
*N
, RTLIB::Libcall LC
,
664 SDValue
&Lo
, SDValue
&Hi
);
665 void ExpandFloatRes_Binary(SDNode
*N
, RTLIB::Libcall LC
,
666 SDValue
&Lo
, SDValue
&Hi
);
668 void ExpandFloatRes_FABS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
669 void ExpandFloatRes_FACOS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
670 void ExpandFloatRes_FASIN (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
671 void ExpandFloatRes_FATAN (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
672 void ExpandFloatRes_FATAN2 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
673 void ExpandFloatRes_FMINNUM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
674 void ExpandFloatRes_FMAXNUM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
675 void ExpandFloatRes_FMINIMUMNUM(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
676 void ExpandFloatRes_FMAXIMUMNUM(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
677 void ExpandFloatRes_FADD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
678 void ExpandFloatRes_FCBRT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
679 void ExpandFloatRes_FCEIL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
680 void ExpandFloatRes_FCOPYSIGN (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
681 void ExpandFloatRes_FCOS (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
682 void ExpandFloatRes_FCOSH (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
683 void ExpandFloatRes_FDIV (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
684 void ExpandFloatRes_FEXP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
685 void ExpandFloatRes_FEXP2 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
686 void ExpandFloatRes_FEXP10 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
687 void ExpandFloatRes_FFLOOR (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
688 void ExpandFloatRes_FLOG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
689 void ExpandFloatRes_FLOG2 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
690 void ExpandFloatRes_FLOG10 (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
691 void ExpandFloatRes_FMA (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
692 void ExpandFloatRes_FMUL (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
693 void ExpandFloatRes_FNEARBYINT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
694 void ExpandFloatRes_FNEG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
695 void ExpandFloatRes_FP_EXTEND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
696 void ExpandFloatRes_FPOW (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
697 void ExpandFloatRes_FPOWI (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
698 void ExpandFloatRes_FLDEXP (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
699 void ExpandFloatRes_FREEZE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
700 void ExpandFloatRes_FREM (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
701 void ExpandFloatRes_FRINT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
702 void ExpandFloatRes_FROUND (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
703 void ExpandFloatRes_FROUNDEVEN(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
704 void ExpandFloatRes_FSIN (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
705 void ExpandFloatRes_FSINH (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
706 void ExpandFloatRes_FSQRT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
707 void ExpandFloatRes_FSUB (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
708 void ExpandFloatRes_FTAN (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
709 void ExpandFloatRes_FTANH (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
710 void ExpandFloatRes_FTRUNC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
711 void ExpandFloatRes_LOAD (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
712 void ExpandFloatRes_XINT_TO_FP(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
715 // Float Operand Expansion.
716 bool ExpandFloatOperand(SDNode
*N
, unsigned OpNo
);
717 SDValue
ExpandFloatOp_BR_CC(SDNode
*N
);
718 SDValue
ExpandFloatOp_FCOPYSIGN(SDNode
*N
);
719 SDValue
ExpandFloatOp_FP_ROUND(SDNode
*N
);
720 SDValue
ExpandFloatOp_FP_TO_XINT(SDNode
*N
);
721 SDValue
ExpandFloatOp_LROUND(SDNode
*N
);
722 SDValue
ExpandFloatOp_LLROUND(SDNode
*N
);
723 SDValue
ExpandFloatOp_LRINT(SDNode
*N
);
724 SDValue
ExpandFloatOp_LLRINT(SDNode
*N
);
725 SDValue
ExpandFloatOp_SELECT_CC(SDNode
*N
);
726 SDValue
ExpandFloatOp_SETCC(SDNode
*N
);
727 SDValue
ExpandFloatOp_STORE(SDNode
*N
, unsigned OpNo
);
729 void FloatExpandSetCCOperands(SDValue
&NewLHS
, SDValue
&NewRHS
,
730 ISD::CondCode
&CCCode
, const SDLoc
&dl
,
731 SDValue
&Chain
, bool IsSignaling
= false);
733 //===--------------------------------------------------------------------===//
734 // Float promotion support: LegalizeFloatTypes.cpp
735 //===--------------------------------------------------------------------===//
737 SDValue
GetPromotedFloat(SDValue Op
) {
738 TableId
&PromotedId
= PromotedFloats
[getTableId(Op
)];
739 SDValue PromotedOp
= getSDValue(PromotedId
);
740 assert(PromotedOp
.getNode() && "Operand wasn't promoted?");
743 void SetPromotedFloat(SDValue Op
, SDValue Result
);
745 void PromoteFloatResult(SDNode
*N
, unsigned ResNo
);
746 SDValue
PromoteFloatRes_BITCAST(SDNode
*N
);
747 SDValue
PromoteFloatRes_BinOp(SDNode
*N
);
748 SDValue
PromoteFloatRes_UnaryWithTwoFPResults(SDNode
*N
);
749 SDValue
PromoteFloatRes_ConstantFP(SDNode
*N
);
750 SDValue
PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode
*N
);
751 SDValue
PromoteFloatRes_FCOPYSIGN(SDNode
*N
);
752 SDValue
PromoteFloatRes_FMAD(SDNode
*N
);
753 SDValue
PromoteFloatRes_ExpOp(SDNode
*N
);
754 SDValue
PromoteFloatRes_FFREXP(SDNode
*N
);
755 SDValue
PromoteFloatRes_FP_ROUND(SDNode
*N
);
756 SDValue
PromoteFloatRes_STRICT_FP_ROUND(SDNode
*N
);
757 SDValue
PromoteFloatRes_LOAD(SDNode
*N
);
758 SDValue
PromoteFloatRes_ATOMIC_LOAD(SDNode
*N
);
759 SDValue
PromoteFloatRes_SELECT(SDNode
*N
);
760 SDValue
PromoteFloatRes_SELECT_CC(SDNode
*N
);
761 SDValue
PromoteFloatRes_UnaryOp(SDNode
*N
);
762 SDValue
PromoteFloatRes_UNDEF(SDNode
*N
);
763 SDValue
BitcastToInt_ATOMIC_SWAP(SDNode
*N
);
764 SDValue
PromoteFloatRes_XINT_TO_FP(SDNode
*N
);
765 SDValue
PromoteFloatRes_VECREDUCE(SDNode
*N
);
766 SDValue
PromoteFloatRes_VECREDUCE_SEQ(SDNode
*N
);
768 bool PromoteFloatOperand(SDNode
*N
, unsigned OpNo
);
769 SDValue
PromoteFloatOp_BITCAST(SDNode
*N
, unsigned OpNo
);
770 SDValue
PromoteFloatOp_FAKE_USE(SDNode
*N
, unsigned OpNo
);
771 SDValue
PromoteFloatOp_FCOPYSIGN(SDNode
*N
, unsigned OpNo
);
772 SDValue
PromoteFloatOp_FP_EXTEND(SDNode
*N
, unsigned OpNo
);
773 SDValue
PromoteFloatOp_STRICT_FP_EXTEND(SDNode
*N
, unsigned OpNo
);
774 SDValue
PromoteFloatOp_UnaryOp(SDNode
*N
, unsigned OpNo
);
775 SDValue
PromoteFloatOp_FP_TO_XINT_SAT(SDNode
*N
, unsigned OpNo
);
776 SDValue
PromoteFloatOp_STORE(SDNode
*N
, unsigned OpNo
);
777 SDValue
PromoteFloatOp_ATOMIC_STORE(SDNode
*N
, unsigned OpNo
);
778 SDValue
PromoteFloatOp_SELECT_CC(SDNode
*N
, unsigned OpNo
);
779 SDValue
PromoteFloatOp_SETCC(SDNode
*N
, unsigned OpNo
);
781 //===--------------------------------------------------------------------===//
782 // Half soft promotion support: LegalizeFloatTypes.cpp
783 //===--------------------------------------------------------------------===//
785 SDValue
GetSoftPromotedHalf(SDValue Op
) {
786 TableId
&PromotedId
= SoftPromotedHalfs
[getTableId(Op
)];
787 SDValue PromotedOp
= getSDValue(PromotedId
);
788 assert(PromotedOp
.getNode() && "Operand wasn't promoted?");
791 void SetSoftPromotedHalf(SDValue Op
, SDValue Result
);
793 void SoftPromoteHalfResult(SDNode
*N
, unsigned ResNo
);
794 SDValue
SoftPromoteHalfRes_ARITH_FENCE(SDNode
*N
);
795 SDValue
SoftPromoteHalfRes_BinOp(SDNode
*N
);
796 SDValue
SoftPromoteHalfRes_UnaryWithTwoFPResults(SDNode
*N
);
797 SDValue
SoftPromoteHalfRes_BITCAST(SDNode
*N
);
798 SDValue
SoftPromoteHalfRes_ConstantFP(SDNode
*N
);
799 SDValue
SoftPromoteHalfRes_EXTRACT_VECTOR_ELT(SDNode
*N
);
800 SDValue
SoftPromoteHalfRes_FCOPYSIGN(SDNode
*N
);
801 SDValue
SoftPromoteHalfRes_FMAD(SDNode
*N
);
802 SDValue
SoftPromoteHalfRes_ExpOp(SDNode
*N
);
803 SDValue
SoftPromoteHalfRes_FFREXP(SDNode
*N
);
804 SDValue
SoftPromoteHalfRes_FP_ROUND(SDNode
*N
);
805 SDValue
SoftPromoteHalfRes_LOAD(SDNode
*N
);
806 SDValue
SoftPromoteHalfRes_ATOMIC_LOAD(SDNode
*N
);
807 SDValue
SoftPromoteHalfRes_SELECT(SDNode
*N
);
808 SDValue
SoftPromoteHalfRes_SELECT_CC(SDNode
*N
);
809 SDValue
SoftPromoteHalfRes_UnaryOp(SDNode
*N
);
810 SDValue
SoftPromoteHalfRes_XINT_TO_FP(SDNode
*N
);
811 SDValue
SoftPromoteHalfRes_UNDEF(SDNode
*N
);
812 SDValue
SoftPromoteHalfRes_VECREDUCE(SDNode
*N
);
813 SDValue
SoftPromoteHalfRes_VECREDUCE_SEQ(SDNode
*N
);
815 bool SoftPromoteHalfOperand(SDNode
*N
, unsigned OpNo
);
816 SDValue
SoftPromoteHalfOp_BITCAST(SDNode
*N
);
817 SDValue
SoftPromoteHalfOp_FAKE_USE(SDNode
*N
, unsigned OpNo
);
818 SDValue
SoftPromoteHalfOp_FCOPYSIGN(SDNode
*N
, unsigned OpNo
);
819 SDValue
SoftPromoteHalfOp_FP_EXTEND(SDNode
*N
);
820 SDValue
SoftPromoteHalfOp_FP_TO_XINT(SDNode
*N
);
821 SDValue
SoftPromoteHalfOp_FP_TO_XINT_SAT(SDNode
*N
);
822 SDValue
SoftPromoteHalfOp_SETCC(SDNode
*N
);
823 SDValue
SoftPromoteHalfOp_SELECT_CC(SDNode
*N
, unsigned OpNo
);
824 SDValue
SoftPromoteHalfOp_STORE(SDNode
*N
, unsigned OpNo
);
825 SDValue
SoftPromoteHalfOp_ATOMIC_STORE(SDNode
*N
, unsigned OpNo
);
826 SDValue
SoftPromoteHalfOp_STACKMAP(SDNode
*N
, unsigned OpNo
);
827 SDValue
SoftPromoteHalfOp_PATCHPOINT(SDNode
*N
, unsigned OpNo
);
829 //===--------------------------------------------------------------------===//
830 // Scalarization Support: LegalizeVectorTypes.cpp
831 //===--------------------------------------------------------------------===//
833 /// Given a processed one-element vector Op which was scalarized to its
834 /// element type, this returns the element. For example, if Op is a v1i32,
835 /// Op = < i32 val >, this method returns val, an i32.
836 SDValue
GetScalarizedVector(SDValue Op
) {
837 TableId
&ScalarizedId
= ScalarizedVectors
[getTableId(Op
)];
838 SDValue ScalarizedOp
= getSDValue(ScalarizedId
);
839 assert(ScalarizedOp
.getNode() && "Operand wasn't scalarized?");
842 void SetScalarizedVector(SDValue Op
, SDValue Result
);
844 // Vector Result Scalarization: <1 x ty> -> ty.
845 void ScalarizeVectorResult(SDNode
*N
, unsigned ResNo
);
846 SDValue
ScalarizeVecRes_MERGE_VALUES(SDNode
*N
, unsigned ResNo
);
847 SDValue
ScalarizeVecRes_BinOp(SDNode
*N
);
848 SDValue
ScalarizeVecRes_CMP(SDNode
*N
);
849 SDValue
ScalarizeVecRes_TernaryOp(SDNode
*N
);
850 SDValue
ScalarizeVecRes_UnaryOp(SDNode
*N
);
851 SDValue
ScalarizeVecRes_StrictFPOp(SDNode
*N
);
852 SDValue
ScalarizeVecRes_OverflowOp(SDNode
*N
, unsigned ResNo
);
853 SDValue
ScalarizeVecRes_InregOp(SDNode
*N
);
854 SDValue
ScalarizeVecRes_VecInregOp(SDNode
*N
);
856 SDValue
ScalarizeVecRes_ADDRSPACECAST(SDNode
*N
);
857 SDValue
ScalarizeVecRes_BITCAST(SDNode
*N
);
858 SDValue
ScalarizeVecRes_BUILD_VECTOR(SDNode
*N
);
859 SDValue
ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode
*N
);
860 SDValue
ScalarizeVecRes_FP_ROUND(SDNode
*N
);
861 SDValue
ScalarizeVecRes_ExpOp(SDNode
*N
);
862 SDValue
ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode
*N
);
863 SDValue
ScalarizeVecRes_LOAD(LoadSDNode
*N
);
864 SDValue
ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode
*N
);
865 SDValue
ScalarizeVecRes_VSELECT(SDNode
*N
);
866 SDValue
ScalarizeVecRes_SELECT(SDNode
*N
);
867 SDValue
ScalarizeVecRes_SELECT_CC(SDNode
*N
);
868 SDValue
ScalarizeVecRes_SETCC(SDNode
*N
);
869 SDValue
ScalarizeVecRes_UNDEF(SDNode
*N
);
870 SDValue
ScalarizeVecRes_VECTOR_SHUFFLE(SDNode
*N
);
871 SDValue
ScalarizeVecRes_FP_TO_XINT_SAT(SDNode
*N
);
872 SDValue
ScalarizeVecRes_IS_FPCLASS(SDNode
*N
);
874 SDValue
ScalarizeVecRes_FIX(SDNode
*N
);
875 SDValue
ScalarizeVecRes_UnaryOpWithTwoResults(SDNode
*N
, unsigned ResNo
);
877 // Vector Operand Scalarization: <1 x ty> -> ty.
878 bool ScalarizeVectorOperand(SDNode
*N
, unsigned OpNo
);
879 SDValue
ScalarizeVecOp_BITCAST(SDNode
*N
);
880 SDValue
ScalarizeVecOp_UnaryOp(SDNode
*N
);
881 SDValue
ScalarizeVecOp_UnaryOp_StrictFP(SDNode
*N
);
882 SDValue
ScalarizeVecOp_CONCAT_VECTORS(SDNode
*N
);
883 SDValue
ScalarizeVecOp_INSERT_SUBVECTOR(SDNode
*N
, unsigned OpNo
);
884 SDValue
ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
885 SDValue
ScalarizeVecOp_VSELECT(SDNode
*N
);
886 SDValue
ScalarizeVecOp_VSETCC(SDNode
*N
);
887 SDValue
ScalarizeVecOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
888 SDValue
ScalarizeVecOp_FP_ROUND(SDNode
*N
, unsigned OpNo
);
889 SDValue
ScalarizeVecOp_STRICT_FP_ROUND(SDNode
*N
, unsigned OpNo
);
890 SDValue
ScalarizeVecOp_FP_EXTEND(SDNode
*N
);
891 SDValue
ScalarizeVecOp_STRICT_FP_EXTEND(SDNode
*N
);
892 SDValue
ScalarizeVecOp_VECREDUCE(SDNode
*N
);
893 SDValue
ScalarizeVecOp_VECREDUCE_SEQ(SDNode
*N
);
894 SDValue
ScalarizeVecOp_CMP(SDNode
*N
);
895 SDValue
ScalarizeVecOp_FAKE_USE(SDNode
*N
);
897 //===--------------------------------------------------------------------===//
898 // Vector Splitting Support: LegalizeVectorTypes.cpp
899 //===--------------------------------------------------------------------===//
901 /// Given a processed vector Op which was split into vectors of half the size,
902 /// this method returns the halves. The first elements of Op coincide with the
903 /// elements of Lo; the remaining elements of Op coincide with the elements of
904 /// Hi: Op is what you would get by concatenating Lo and Hi.
905 /// For example, if Op is a v8i32 that was split into two v4i32's, then this
906 /// method returns the two v4i32's, with Lo corresponding to the first 4
907 /// elements of Op, and Hi to the last 4 elements.
908 void GetSplitVector(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
);
909 void SetSplitVector(SDValue Op
, SDValue Lo
, SDValue Hi
);
911 /// Split mask operator of a VP intrinsic.
912 std::pair
<SDValue
, SDValue
> SplitMask(SDValue Mask
);
914 /// Split mask operator of a VP intrinsic in a given location.
915 std::pair
<SDValue
, SDValue
> SplitMask(SDValue Mask
, const SDLoc
&DL
);
917 // Helper function for incrementing the pointer when splitting
919 void IncrementPointer(MemSDNode
*N
, EVT MemVT
, MachinePointerInfo
&MPI
,
920 SDValue
&Ptr
, uint64_t *ScaledOffset
= nullptr);
922 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
923 void SplitVectorResult(SDNode
*N
, unsigned ResNo
);
924 void SplitVecRes_BinOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
925 void SplitVecRes_TernaryOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
926 void SplitVecRes_CMP(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
927 void SplitVecRes_UnaryOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
928 void SplitVecRes_ADDRSPACECAST(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
929 void SplitVecRes_UnaryOpWithTwoResults(SDNode
*N
, unsigned ResNo
, SDValue
&Lo
,
931 void SplitVecRes_ExtendOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
932 void SplitVecRes_InregOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
933 void SplitVecRes_ExtVecInRegOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
934 void SplitVecRes_StrictFPOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
935 void SplitVecRes_OverflowOp(SDNode
*N
, unsigned ResNo
,
936 SDValue
&Lo
, SDValue
&Hi
);
938 void SplitVecRes_FIX(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
940 void SplitVecRes_BITCAST(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
941 void SplitVecRes_BUILD_VECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
942 void SplitVecRes_CONCAT_VECTORS(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
943 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
944 void SplitVecRes_INSERT_SUBVECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
945 void SplitVecRes_FPOp_MultiType(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
946 void SplitVecRes_IS_FPCLASS(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
947 void SplitVecRes_INSERT_VECTOR_ELT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
948 void SplitVecRes_LOAD(LoadSDNode
*LD
, SDValue
&Lo
, SDValue
&Hi
);
949 void SplitVecRes_VP_LOAD(VPLoadSDNode
*LD
, SDValue
&Lo
, SDValue
&Hi
);
950 void SplitVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode
*SLD
, SDValue
&Lo
,
952 void SplitVecRes_MLOAD(MaskedLoadSDNode
*MLD
, SDValue
&Lo
, SDValue
&Hi
);
953 void SplitVecRes_Gather(MemSDNode
*VPGT
, SDValue
&Lo
, SDValue
&Hi
,
954 bool SplitSETCC
= false);
955 void SplitVecRes_VECTOR_COMPRESS(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
956 void SplitVecRes_ScalarOp(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
957 void SplitVecRes_VP_SPLAT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
958 void SplitVecRes_STEP_VECTOR(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
959 void SplitVecRes_SETCC(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
960 void SplitVecRes_VECTOR_REVERSE(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
961 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode
*N
, SDValue
&Lo
,
963 void SplitVecRes_VECTOR_SPLICE(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
964 void SplitVecRes_VECTOR_DEINTERLEAVE(SDNode
*N
);
965 void SplitVecRes_VECTOR_INTERLEAVE(SDNode
*N
);
966 void SplitVecRes_VAARG(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
967 void SplitVecRes_FP_TO_XINT_SAT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
968 void SplitVecRes_VP_REVERSE(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
970 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
971 bool SplitVectorOperand(SDNode
*N
, unsigned OpNo
);
972 SDValue
SplitVecOp_VSELECT(SDNode
*N
, unsigned OpNo
);
973 SDValue
SplitVecOp_VECREDUCE(SDNode
*N
, unsigned OpNo
);
974 SDValue
SplitVecOp_VECREDUCE_SEQ(SDNode
*N
);
975 SDValue
SplitVecOp_VP_REDUCE(SDNode
*N
, unsigned OpNo
);
976 SDValue
SplitVecOp_UnaryOp(SDNode
*N
);
977 SDValue
SplitVecOp_TruncateHelper(SDNode
*N
);
978 SDValue
SplitVecOp_VECTOR_COMPRESS(SDNode
*N
, unsigned OpNo
);
980 SDValue
SplitVecOp_BITCAST(SDNode
*N
);
981 SDValue
SplitVecOp_INSERT_SUBVECTOR(SDNode
*N
, unsigned OpNo
);
982 SDValue
SplitVecOp_EXTRACT_SUBVECTOR(SDNode
*N
);
983 SDValue
SplitVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
984 SDValue
SplitVecOp_ExtVecInRegOp(SDNode
*N
);
985 SDValue
SplitVecOp_FAKE_USE(SDNode
*N
);
986 SDValue
SplitVecOp_STORE(StoreSDNode
*N
, unsigned OpNo
);
987 SDValue
SplitVecOp_VP_STORE(VPStoreSDNode
*N
, unsigned OpNo
);
988 SDValue
SplitVecOp_VP_STRIDED_STORE(VPStridedStoreSDNode
*N
, unsigned OpNo
);
989 SDValue
SplitVecOp_MSTORE(MaskedStoreSDNode
*N
, unsigned OpNo
);
990 SDValue
SplitVecOp_Scatter(MemSDNode
*N
, unsigned OpNo
);
991 SDValue
SplitVecOp_Gather(MemSDNode
*MGT
, unsigned OpNo
);
992 SDValue
SplitVecOp_CONCAT_VECTORS(SDNode
*N
);
993 SDValue
SplitVecOp_VSETCC(SDNode
*N
);
994 SDValue
SplitVecOp_FP_ROUND(SDNode
*N
);
995 SDValue
SplitVecOp_FPOpDifferentTypes(SDNode
*N
);
996 SDValue
SplitVecOp_CMP(SDNode
*N
);
997 SDValue
SplitVecOp_FP_TO_XINT_SAT(SDNode
*N
);
998 SDValue
SplitVecOp_VP_CttzElements(SDNode
*N
);
999 SDValue
SplitVecOp_VECTOR_HISTOGRAM(SDNode
*N
);
1001 //===--------------------------------------------------------------------===//
1002 // Vector Widening Support: LegalizeVectorTypes.cpp
1003 //===--------------------------------------------------------------------===//
1005 /// Given a processed vector Op which was widened into a larger vector, this
1006 /// method returns the larger vector. The elements of the returned vector
1007 /// consist of the elements of Op followed by elements containing rubbish.
1008 /// For example, if Op is a v2i32 that was widened to a v4i32, then this
1009 /// method returns a v4i32 for which the first two elements are the same as
1010 /// those of Op, while the last two elements contain rubbish.
1011 SDValue
GetWidenedVector(SDValue Op
) {
1012 TableId
&WidenedId
= WidenedVectors
[getTableId(Op
)];
1013 SDValue WidenedOp
= getSDValue(WidenedId
);
1014 assert(WidenedOp
.getNode() && "Operand wasn't widened?");
1017 void SetWidenedVector(SDValue Op
, SDValue Result
);
1019 /// Given a mask Mask, returns the larger vector into which Mask was widened.
1020 SDValue
GetWidenedMask(SDValue Mask
, ElementCount EC
) {
1021 // For VP operations, we must also widen the mask. Note that the mask type
1022 // may not actually need widening, leading it be split along with the VP
1024 // FIXME: This could lead to an infinite split/widen loop. We only handle
1025 // the case where the mask needs widening to an identically-sized type as
1026 // the vector inputs.
1027 assert(getTypeAction(Mask
.getValueType()) ==
1028 TargetLowering::TypeWidenVector
&&
1029 "Unable to widen binary VP op");
1030 Mask
= GetWidenedVector(Mask
);
1031 assert(Mask
.getValueType().getVectorElementCount() == EC
&&
1032 "Unable to widen binary VP op");
1036 // Widen Vector Result Promotion.
1037 void WidenVectorResult(SDNode
*N
, unsigned ResNo
);
1038 SDValue
WidenVecRes_MERGE_VALUES(SDNode
* N
, unsigned ResNo
);
1039 SDValue
WidenVecRes_ADDRSPACECAST(SDNode
*N
);
1040 SDValue
WidenVecRes_AssertZext(SDNode
* N
);
1041 SDValue
WidenVecRes_BITCAST(SDNode
* N
);
1042 SDValue
WidenVecRes_BUILD_VECTOR(SDNode
* N
);
1043 SDValue
WidenVecRes_CONCAT_VECTORS(SDNode
* N
);
1044 SDValue
WidenVecRes_EXTEND_VECTOR_INREG(SDNode
* N
);
1045 SDValue
WidenVecRes_EXTRACT_SUBVECTOR(SDNode
* N
);
1046 SDValue
WidenVecRes_INSERT_SUBVECTOR(SDNode
*N
);
1047 SDValue
WidenVecRes_INSERT_VECTOR_ELT(SDNode
* N
);
1048 SDValue
WidenVecRes_LOAD(SDNode
* N
);
1049 SDValue
WidenVecRes_VP_LOAD(VPLoadSDNode
*N
);
1050 SDValue
WidenVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode
*N
);
1051 SDValue
WidenVecRes_VECTOR_COMPRESS(SDNode
*N
);
1052 SDValue
WidenVecRes_MLOAD(MaskedLoadSDNode
* N
);
1053 SDValue
WidenVecRes_MGATHER(MaskedGatherSDNode
* N
);
1054 SDValue
WidenVecRes_VP_GATHER(VPGatherSDNode
* N
);
1055 SDValue
WidenVecRes_ScalarOp(SDNode
* N
);
1056 SDValue
WidenVecRes_Select(SDNode
*N
);
1057 SDValue
WidenVSELECTMask(SDNode
*N
);
1058 SDValue
WidenVecRes_SELECT_CC(SDNode
* N
);
1059 SDValue
WidenVecRes_SETCC(SDNode
* N
);
1060 SDValue
WidenVecRes_STRICT_FSETCC(SDNode
* N
);
1061 SDValue
WidenVecRes_UNDEF(SDNode
*N
);
1062 SDValue
WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode
*N
);
1063 SDValue
WidenVecRes_VECTOR_REVERSE(SDNode
*N
);
1065 SDValue
WidenVecRes_Ternary(SDNode
*N
);
1066 SDValue
WidenVecRes_Binary(SDNode
*N
);
1067 SDValue
WidenVecRes_CMP(SDNode
*N
);
1068 SDValue
WidenVecRes_BinaryCanTrap(SDNode
*N
);
1069 SDValue
WidenVecRes_BinaryWithExtraScalarOp(SDNode
*N
);
1070 SDValue
WidenVecRes_StrictFP(SDNode
*N
);
1071 SDValue
WidenVecRes_OverflowOp(SDNode
*N
, unsigned ResNo
);
1072 SDValue
WidenVecRes_Convert(SDNode
*N
);
1073 SDValue
WidenVecRes_Convert_StrictFP(SDNode
*N
);
1074 SDValue
WidenVecRes_FP_TO_XINT_SAT(SDNode
*N
);
1075 SDValue
WidenVecRes_XROUND(SDNode
*N
);
1076 SDValue
WidenVecRes_FCOPYSIGN(SDNode
*N
);
1077 SDValue
WidenVecRes_UnarySameEltsWithScalarArg(SDNode
*N
);
1078 SDValue
WidenVecRes_ExpOp(SDNode
*N
);
1079 SDValue
WidenVecRes_Unary(SDNode
*N
);
1080 SDValue
WidenVecRes_InregOp(SDNode
*N
);
1081 SDValue
WidenVecRes_UnaryOpWithTwoResults(SDNode
*N
, unsigned ResNo
);
1082 void ReplaceOtherWidenResults(SDNode
*N
, SDNode
*WidenNode
,
1083 unsigned WidenResNo
);
1085 // Widen Vector Operand.
1086 bool WidenVectorOperand(SDNode
*N
, unsigned OpNo
);
1087 SDValue
WidenVecOp_BITCAST(SDNode
*N
);
1088 SDValue
WidenVecOp_CONCAT_VECTORS(SDNode
*N
);
1089 SDValue
WidenVecOp_EXTEND(SDNode
*N
);
1090 SDValue
WidenVecOp_CMP(SDNode
*N
);
1091 SDValue
WidenVecOp_EXTRACT_VECTOR_ELT(SDNode
*N
);
1092 SDValue
WidenVecOp_INSERT_SUBVECTOR(SDNode
*N
);
1093 SDValue
WidenVecOp_EXTRACT_SUBVECTOR(SDNode
*N
);
1094 SDValue
WidenVecOp_EXTEND_VECTOR_INREG(SDNode
*N
);
1095 SDValue
WidenVecOp_FAKE_USE(SDNode
*N
);
1096 SDValue
WidenVecOp_STORE(SDNode
* N
);
1097 SDValue
WidenVecOp_VP_STORE(SDNode
*N
, unsigned OpNo
);
1098 SDValue
WidenVecOp_VP_STRIDED_STORE(SDNode
*N
, unsigned OpNo
);
1099 SDValue
WidenVecOp_MSTORE(SDNode
* N
, unsigned OpNo
);
1100 SDValue
WidenVecOp_MGATHER(SDNode
* N
, unsigned OpNo
);
1101 SDValue
WidenVecOp_MSCATTER(SDNode
* N
, unsigned OpNo
);
1102 SDValue
WidenVecOp_VP_SCATTER(SDNode
* N
, unsigned OpNo
);
1103 SDValue
WidenVecOp_VP_SPLAT(SDNode
*N
, unsigned OpNo
);
1104 SDValue
WidenVecOp_SETCC(SDNode
* N
);
1105 SDValue
WidenVecOp_STRICT_FSETCC(SDNode
* N
);
1106 SDValue
WidenVecOp_VSELECT(SDNode
*N
);
1108 SDValue
WidenVecOp_Convert(SDNode
*N
);
1109 SDValue
WidenVecOp_FP_TO_XINT_SAT(SDNode
*N
);
1110 SDValue
WidenVecOp_UnrollVectorOp(SDNode
*N
);
1111 SDValue
WidenVecOp_IS_FPCLASS(SDNode
*N
);
1112 SDValue
WidenVecOp_VECREDUCE(SDNode
*N
);
1113 SDValue
WidenVecOp_VECREDUCE_SEQ(SDNode
*N
);
1114 SDValue
WidenVecOp_VP_REDUCE(SDNode
*N
);
1115 SDValue
WidenVecOp_ExpOp(SDNode
*N
);
1116 SDValue
WidenVecOp_VP_CttzElements(SDNode
*N
);
1118 /// Helper function to generate a set of operations to perform
1119 /// a vector operation for a wider type.
1121 SDValue
UnrollVectorOp_StrictFP(SDNode
*N
, unsigned ResNE
);
1123 //===--------------------------------------------------------------------===//
1124 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
1125 //===--------------------------------------------------------------------===//
1127 /// Helper function to generate a set of loads to load a vector with a
1128 /// resulting wider type. It takes:
1129 /// LdChain: list of chains for the load to be generated.
1130 /// Ld: load to widen
1131 SDValue
GenWidenVectorLoads(SmallVectorImpl
<SDValue
> &LdChain
,
1134 /// Helper function to generate a set of extension loads to load a vector with
1135 /// a resulting wider type. It takes:
1136 /// LdChain: list of chains for the load to be generated.
1137 /// Ld: load to widen
1138 /// ExtType: extension element type
1139 SDValue
GenWidenVectorExtLoads(SmallVectorImpl
<SDValue
> &LdChain
,
1140 LoadSDNode
*LD
, ISD::LoadExtType ExtType
);
1142 /// Helper function to generate a set of stores to store a widen vector into
1143 /// non-widen memory. Returns true if successful, false otherwise.
1144 /// StChain: list of chains for the stores we have generated
1145 /// ST: store of a widen value
1146 bool GenWidenVectorStores(SmallVectorImpl
<SDValue
> &StChain
, StoreSDNode
*ST
);
1148 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
1149 /// input vector must have the same element type as NVT.
1150 /// When FillWithZeroes is "on" the vector will be widened with zeroes.
1151 /// By default, the vector will be widened with undefined values.
1152 SDValue
ModifyToType(SDValue InOp
, EVT NVT
, bool FillWithZeroes
= false);
1154 /// Return a mask of vector type MaskVT to replace InMask. Also adjust
1155 /// MaskVT to ToMaskVT if needed with vector extension or truncation.
1156 SDValue
convertMask(SDValue InMask
, EVT MaskVT
, EVT ToMaskVT
);
1158 //===--------------------------------------------------------------------===//
1159 // Generic Splitting: LegalizeTypesGeneric.cpp
1160 //===--------------------------------------------------------------------===//
1162 // Legalization methods which only use that the illegal type is split into two
1163 // not necessarily identical types. As such they can be used for splitting
1164 // vectors and expanding integers and floats.
1166 void GetSplitOp(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
) {
1167 if (Op
.getValueType().isVector())
1168 GetSplitVector(Op
, Lo
, Hi
);
1169 else if (Op
.getValueType().isInteger())
1170 GetExpandedInteger(Op
, Lo
, Hi
);
1172 GetExpandedFloat(Op
, Lo
, Hi
);
1175 /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the
1177 void GetPairElements(SDValue Pair
, SDValue
&Lo
, SDValue
&Hi
);
1179 // Generic Result Splitting.
1180 void SplitRes_MERGE_VALUES(SDNode
*N
, unsigned ResNo
,
1181 SDValue
&Lo
, SDValue
&Hi
);
1182 void SplitVecRes_AssertZext (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1183 void SplitRes_ARITH_FENCE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1184 void SplitRes_Select (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1185 void SplitRes_SELECT_CC (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1186 void SplitRes_UNDEF (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1187 void SplitRes_FREEZE (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1189 //===--------------------------------------------------------------------===//
1190 // Generic Expansion: LegalizeTypesGeneric.cpp
1191 //===--------------------------------------------------------------------===//
1193 // Legalization methods which only use that the illegal type is split into two
1194 // identical types of half the size, and that the Lo/Hi part is stored first
1195 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
1196 // such they can be used for expanding integers and floats.
1198 void GetExpandedOp(SDValue Op
, SDValue
&Lo
, SDValue
&Hi
) {
1199 if (Op
.getValueType().isInteger())
1200 GetExpandedInteger(Op
, Lo
, Hi
);
1202 GetExpandedFloat(Op
, Lo
, Hi
);
1206 /// This function will split the integer \p Op into \p NumElements
1207 /// operations of type \p EltVT and store them in \p Ops.
1208 void IntegerToVector(SDValue Op
, unsigned NumElements
,
1209 SmallVectorImpl
<SDValue
> &Ops
, EVT EltVT
);
1211 // Generic Result Expansion.
1212 void ExpandRes_MERGE_VALUES (SDNode
*N
, unsigned ResNo
,
1213 SDValue
&Lo
, SDValue
&Hi
);
1214 void ExpandRes_BITCAST (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1215 void ExpandRes_BUILD_PAIR (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1216 void ExpandRes_EXTRACT_ELEMENT (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1217 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1218 void ExpandRes_NormalLoad (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1219 void ExpandRes_VAARG (SDNode
*N
, SDValue
&Lo
, SDValue
&Hi
);
1221 // Generic Operand Expansion.
1222 SDValue
ExpandOp_BITCAST (SDNode
*N
);
1223 SDValue
ExpandOp_BUILD_VECTOR (SDNode
*N
);
1224 SDValue
ExpandOp_EXTRACT_ELEMENT (SDNode
*N
);
1225 SDValue
ExpandOp_FAKE_USE(SDNode
*N
);
1226 SDValue
ExpandOp_INSERT_VECTOR_ELT(SDNode
*N
);
1227 SDValue
ExpandOp_SCALAR_TO_VECTOR (SDNode
*N
);
1228 SDValue
ExpandOp_NormalStore (SDNode
*N
, unsigned OpNo
);
1231 } // end namespace llvm.