1 add_llvm_component_group(AArch64 HAS_JIT)
3 set(LLVM_TARGET_DEFINITIONS AArch64.td)
5 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
6 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
7 tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
8 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
9 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
10 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
11 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
12 tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
13 tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
14 -combiners="AArch64O0PreLegalizerCombiner")
15 tablegen(LLVM AArch64GenPreLegalizeGICombiner.inc -gen-global-isel-combiner
16 -combiners="AArch64PreLegalizerCombiner")
17 tablegen(LLVM AArch64GenPostLegalizeGICombiner.inc -gen-global-isel-combiner
18 -combiners="AArch64PostLegalizerCombiner")
19 tablegen(LLVM AArch64GenPostLegalizeGILowering.inc -gen-global-isel-combiner
20 -combiners="AArch64PostLegalizerLowering")
21 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
22 tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
23 tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
24 tablegen(LLVM AArch64GenRegisterBank.inc -gen-register-bank)
25 tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
26 tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
27 tablegen(LLVM AArch64GenSystemOperands.inc -gen-searchable-tables)
28 tablegen(LLVM AArch64GenExegesis.inc -gen-exegesis)
30 add_public_tablegen_target(AArch64CommonTableGen)
32 add_llvm_target(AArch64CodeGen
33 GISel/AArch64CallLowering.cpp
34 GISel/AArch64GlobalISelUtils.cpp
35 GISel/AArch64InstructionSelector.cpp
36 GISel/AArch64LegalizerInfo.cpp
37 GISel/AArch64O0PreLegalizerCombiner.cpp
38 GISel/AArch64PreLegalizerCombiner.cpp
39 GISel/AArch64PostLegalizerCombiner.cpp
40 GISel/AArch64PostLegalizerLowering.cpp
41 GISel/AArch64PostSelectOptimize.cpp
42 GISel/AArch64RegisterBankInfo.cpp
43 AArch64A57FPLoadBalancing.cpp
44 AArch64AdvSIMDScalarPass.cpp
45 AArch64Arm64ECCallLowering.cpp
47 AArch64BranchTargets.cpp
48 AArch64CallingConvention.cpp
49 AArch64CleanupLocalDynamicTLSPass.cpp
51 AArch64CondBrTuning.cpp
52 AArch64ConditionalCompares.cpp
53 AArch64DeadRegisterDefinitionsPass.cpp
55 AArch64ExpandPseudoInsts.cpp
56 AArch64FalkorHWPFFix.cpp
58 AArch64A53Fix835769.cpp
59 AArch64FrameLowering.cpp
60 AArch64CompressJumpTables.cpp
61 AArch64ConditionOptimizer.cpp
62 AArch64RedundantCopyElimination.cpp
63 AArch64ISelDAGToDAG.cpp
64 AArch64ISelLowering.cpp
66 AArch64LoadStoreOptimizer.cpp
67 AArch64LowerHomogeneousPrologEpilog.cpp
68 AArch64MachineFunctionInfo.cpp
69 AArch64MachineScheduler.cpp
70 AArch64MacroFusion.cpp
71 AArch64MIPeepholeOpt.cpp
72 AArch64MCInstLower.cpp
73 AArch64PointerAuth.cpp
74 AArch64PostCoalescerPass.cpp
75 AArch64PromoteConstant.cpp
76 AArch64PBQPRegAlloc.cpp
77 AArch64RegisterInfo.cpp
78 AArch64SLSHardening.cpp
79 AArch64SelectionDAGInfo.cpp
80 AArch64SpeculationHardening.cpp
81 AArch64StackTagging.cpp
82 AArch64StackTaggingPreRA.cpp
83 AArch64StorePairSuppress.cpp
85 AArch64TargetMachine.cpp
86 AArch64TargetObjectFile.cpp
87 AArch64TargetTransformInfo.cpp
91 AArch64SIMDInstrOpt.cpp
120 add_subdirectory(AsmParser)
121 add_subdirectory(Disassembler)
122 add_subdirectory(MCTargetDesc)
123 add_subdirectory(TargetInfo)
124 add_subdirectory(Utils)