llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp

   1 //===-- AArch64ELFObjectWriter.cpp - AArch64 ELF Writer -------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file handles ELF-specific object emission, converting LLVM's internal
  10 // fixups into the appropriate relocations.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "MCTargetDesc/AArch64FixupKinds.h"
  15 #include "MCTargetDesc/AArch64MCExpr.h"
  16 #include "MCTargetDesc/AArch64MCTargetDesc.h"
  17 #include "llvm/BinaryFormat/ELF.h"
  18 #include "llvm/MC/MCContext.h"
  19 #include "llvm/MC/MCELFObjectWriter.h"
  20 #include "llvm/MC/MCFixup.h"
  21 #include "llvm/MC/MCObjectWriter.h"
  22 #include "llvm/MC/MCValue.h"
  23 #include "llvm/Support/ErrorHandling.h"
  24 #include <cassert>
  25 #include <cstdint>
  26
  27 using namespace llvm;
  28
  29 namespace {
  30
  31 class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
  32 public:
  33   AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32);
  34
  35   ~AArch64ELFObjectWriter() override = default;
  36
  37 protected:
  38   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
  39                         const MCFixup &Fixup, bool IsPCRel) const override;
  40   bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym,
  41                                unsigned Type) const override;
  42   bool IsILP32;
  43 };
  44
  45 } // end anonymous namespace
  46
  47 AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)
  48     : MCELFObjectTargetWriter(/*Is64Bit*/ !IsILP32, OSABI, ELF::EM_AARCH64,
  49                               /*HasRelocationAddend*/ true),
  50       IsILP32(IsILP32) {}
  51
  52 #define R_CLS(rtype)                                                           \
  53   IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
  54 #define BAD_ILP32_MOV(lp64rtype)                                               \
  55   "ILP32 absolute MOV relocation not "                                         \
  56   "supported (LP64 eqv: " #lp64rtype ")"
  57
  58 // assumes IsILP32 is true
  59 static bool isNonILP32reloc(const MCFixup &Fixup,
  60                             AArch64MCExpr::VariantKind RefKind,
  61                             MCContext &Ctx) {
  62   if (Fixup.getTargetKind() != AArch64::fixup_aarch64_movw)
  63     return false;
  64   switch (RefKind) {
  65   case AArch64MCExpr::VK_ABS_G3:
  66     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G3));
  67     return true;
  68   case AArch64MCExpr::VK_ABS_G2:
  69     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2));
  70     return true;
  71   case AArch64MCExpr::VK_ABS_G2_S:
  72     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G2));
  73     return true;
  74   case AArch64MCExpr::VK_ABS_G2_NC:
  75     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2_NC));
  76     return true;
  77   case AArch64MCExpr::VK_ABS_G1_S:
  78     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G1));
  79     return true;
  80   case AArch64MCExpr::VK_ABS_G1_NC:
  81     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G1_NC));
  82     return true;
  83   case AArch64MCExpr::VK_DTPREL_G2:
  84     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G2));
  85     return true;
  86   case AArch64MCExpr::VK_DTPREL_G1_NC:
  87     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G1_NC));
  88     return true;
  89   case AArch64MCExpr::VK_TPREL_G2:
  90     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLE_MOVW_TPREL_G2));
  91     return true;
  92   case AArch64MCExpr::VK_TPREL_G1_NC:
  93     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLE_MOVW_TPREL_G1_NC));
  94     return true;
  95   case AArch64MCExpr::VK_GOTTPREL_G1:
  96     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSIE_MOVW_GOTTPREL_G1));
  97     return true;
  98   case AArch64MCExpr::VK_GOTTPREL_G0_NC:
  99     Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSIE_MOVW_GOTTPREL_G0_NC));
 100     return true;
 101   default:
 102     return false;
 103   }
 104   return false;
 105 }
 106
 107 unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
 108                                               const MCValue &Target,
 109                                               const MCFixup &Fixup,
 110                                               bool IsPCRel) const {
 111   unsigned Kind = Fixup.getTargetKind();
 112   if (Kind >= FirstLiteralRelocationKind)
 113     return Kind - FirstLiteralRelocationKind;
 114   AArch64MCExpr::VariantKind RefKind =
 115       static_cast<AArch64MCExpr::VariantKind>(Target.getRefKind());
 116   AArch64MCExpr::VariantKind SymLoc = AArch64MCExpr::getSymbolLoc(RefKind);
 117   bool IsNC = AArch64MCExpr::isNotChecked(RefKind);
 118
 119   assert((!Target.getSymA() ||
 120           Target.getSymA()->getKind() == MCSymbolRefExpr::VK_None ||
 121           Target.getSymA()->getKind() == MCSymbolRefExpr::VK_PLT ||
 122           Target.getSymA()->getKind() == MCSymbolRefExpr::VK_GOTPCREL) &&
 123          "Should only be expression-level modifiers here");
 124
 125   assert((!Target.getSymB() ||
 126           Target.getSymB()->getKind() == MCSymbolRefExpr::VK_None) &&
 127          "Should only be expression-level modifiers here");
 128
 129   if (IsPCRel) {
 130     switch (Kind) {
 131     case FK_Data_1:
 132       Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported");
 133       return ELF::R_AARCH64_NONE;
 134     case FK_Data_2:
 135       return R_CLS(PREL16);
 136     case FK_Data_4: {
 137       return Target.getAccessVariant() == MCSymbolRefExpr::VK_PLT
 138                  ? R_CLS(PLT32)
 139                  : R_CLS(PREL32);
 140     }
 141     case FK_Data_8:
 142       if (IsILP32) {
 143         Ctx.reportError(Fixup.getLoc(),
 144                         "ILP32 8 byte PC relative data "
 145                         "relocation not supported (LP64 eqv: PREL64)");
 146         return ELF::R_AARCH64_NONE;
 147       }
 148       return ELF::R_AARCH64_PREL64;
 149     case AArch64::fixup_aarch64_pcrel_adr_imm21:
 150       if (SymLoc != AArch64MCExpr::VK_ABS)
 151         Ctx.reportError(Fixup.getLoc(),
 152                         "invalid symbol kind for ADR relocation");
 153       return R_CLS(ADR_PREL_LO21);
 154     case AArch64::fixup_aarch64_pcrel_adrp_imm21:
 155       if (SymLoc == AArch64MCExpr::VK_ABS && !IsNC)
 156         return R_CLS(ADR_PREL_PG_HI21);
 157       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) {
 158         if (IsILP32) {
 159           Ctx.reportError(Fixup.getLoc(),
 160                           "invalid fixup for 32-bit pcrel ADRP instruction "
 161                           "VK_ABS VK_NC");
 162           return ELF::R_AARCH64_NONE;
 163         }
 164         return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
 165       }
 166       if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC)
 167         return R_CLS(ADR_GOT_PAGE);
 168       if (SymLoc == AArch64MCExpr::VK_GOT_AUTH && !IsNC) {
 169         if (IsILP32) {
 170           Ctx.reportError(Fixup.getLoc(),
 171                           "ILP32 ADRP AUTH relocation not supported "
 172                           "(LP64 eqv: AUTH_ADR_GOT_PAGE)");
 173           return ELF::R_AARCH64_NONE;
 174         }
 175         return ELF::R_AARCH64_AUTH_ADR_GOT_PAGE;
 176       }
 177       if (SymLoc == AArch64MCExpr::VK_GOTTPREL && !IsNC)
 178         return R_CLS(TLSIE_ADR_GOTTPREL_PAGE21);
 179       if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC)
 180         return R_CLS(TLSDESC_ADR_PAGE21);
 181       Ctx.reportError(Fixup.getLoc(),
 182                       "invalid symbol kind for ADRP relocation");
 183       return ELF::R_AARCH64_NONE;
 184     case AArch64::fixup_aarch64_pcrel_branch26:
 185       return R_CLS(JUMP26);
 186     case AArch64::fixup_aarch64_pcrel_call26:
 187       return R_CLS(CALL26);
 188     case AArch64::fixup_aarch64_ldr_pcrel_imm19:
 189       if (SymLoc == AArch64MCExpr::VK_GOTTPREL)
 190         return R_CLS(TLSIE_LD_GOTTPREL_PREL19);
 191       if (SymLoc == AArch64MCExpr::VK_GOT)
 192         return R_CLS(GOT_LD_PREL19);
 193       return R_CLS(LD_PREL_LO19);
 194     case AArch64::fixup_aarch64_pcrel_branch14:
 195       return R_CLS(TSTBR14);
 196     case AArch64::fixup_aarch64_pcrel_branch16:
 197       Ctx.reportError(Fixup.getLoc(),
 198                       "relocation of PAC/AUT instructions is not supported");
 199       return ELF::R_AARCH64_NONE;
 200     case AArch64::fixup_aarch64_pcrel_branch9:
 201       Ctx.reportError(
 202           Fixup.getLoc(),
 203           "relocation of compare-and-branch instructions not supported");
 204       return ELF::R_AARCH64_NONE;
 205     case AArch64::fixup_aarch64_pcrel_branch19:
 206       return R_CLS(CONDBR19);
 207     default:
 208       Ctx.reportError(Fixup.getLoc(), "Unsupported pc-relative fixup kind");
 209       return ELF::R_AARCH64_NONE;
 210     }
 211   } else {
 212     if (IsILP32 && isNonILP32reloc(Fixup, RefKind, Ctx))
 213       return ELF::R_AARCH64_NONE;
 214     switch (Fixup.getTargetKind()) {
 215     case FK_Data_1:
 216       Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported");
 217       return ELF::R_AARCH64_NONE;
 218     case FK_Data_2:
 219       return R_CLS(ABS16);
 220     case FK_Data_4:
 221       return (!IsILP32 &&
 222               Target.getAccessVariant() == MCSymbolRefExpr::VK_GOTPCREL)
 223                  ? ELF::R_AARCH64_GOTPCREL32
 224                  : R_CLS(ABS32);
 225     case FK_Data_8: {
 226       bool IsAuth = (RefKind == AArch64MCExpr::VK_AUTH ||
 227                      RefKind == AArch64MCExpr::VK_AUTHADDR);
 228       if (IsILP32) {
 229         Ctx.reportError(Fixup.getLoc(),
 230                         Twine("ILP32 8 byte absolute data "
 231                               "relocation not supported (LP64 eqv: ") +
 232                             (IsAuth ? "AUTH_ABS64" : "ABS64") + Twine(')'));
 233         return ELF::R_AARCH64_NONE;
 234       }
 235       return (IsAuth ? ELF::R_AARCH64_AUTH_ABS64 : ELF::R_AARCH64_ABS64);
 236     }
 237     case AArch64::fixup_aarch64_add_imm12:
 238       if (RefKind == AArch64MCExpr::VK_DTPREL_HI12)
 239         return R_CLS(TLSLD_ADD_DTPREL_HI12);
 240       if (RefKind == AArch64MCExpr::VK_TPREL_HI12)
 241         return R_CLS(TLSLE_ADD_TPREL_HI12);
 242       if (RefKind == AArch64MCExpr::VK_DTPREL_LO12_NC)
 243         return R_CLS(TLSLD_ADD_DTPREL_LO12_NC);
 244       if (RefKind == AArch64MCExpr::VK_DTPREL_LO12)
 245         return R_CLS(TLSLD_ADD_DTPREL_LO12);
 246       if (RefKind == AArch64MCExpr::VK_TPREL_LO12_NC)
 247         return R_CLS(TLSLE_ADD_TPREL_LO12_NC);
 248       if (RefKind == AArch64MCExpr::VK_TPREL_LO12)
 249         return R_CLS(TLSLE_ADD_TPREL_LO12);
 250       if (RefKind == AArch64MCExpr::VK_TLSDESC_LO12)
 251         return R_CLS(TLSDESC_ADD_LO12);
 252       if (RefKind == AArch64MCExpr::VK_GOT_AUTH_LO12 && IsNC) {
 253         if (IsILP32) {
 254           Ctx.reportError(Fixup.getLoc(),
 255                           "ILP32 ADD AUTH relocation not supported "
 256                           "(LP64 eqv: AUTH_GOT_ADD_LO12_NC)");
 257           return ELF::R_AARCH64_NONE;
 258         }
 259         return ELF::R_AARCH64_AUTH_GOT_ADD_LO12_NC;
 260       }
 261       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
 262         return R_CLS(ADD_ABS_LO12_NC);
 263
 264       Ctx.reportError(Fixup.getLoc(),
 265                       "invalid fixup for add (uimm12) instruction");
 266       return ELF::R_AARCH64_NONE;
 267     case AArch64::fixup_aarch64_ldst_imm12_scale1:
 268       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
 269         return R_CLS(LDST8_ABS_LO12_NC);
 270       if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
 271         return R_CLS(TLSLD_LDST8_DTPREL_LO12);
 272       if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
 273         return R_CLS(TLSLD_LDST8_DTPREL_LO12_NC);
 274       if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
 275         return R_CLS(TLSLE_LDST8_TPREL_LO12);
 276       if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
 277         return R_CLS(TLSLE_LDST8_TPREL_LO12_NC);
 278
 279       Ctx.reportError(Fixup.getLoc(),
 280                       "invalid fixup for 8-bit load/store instruction");
 281       return ELF::R_AARCH64_NONE;
 282     case AArch64::fixup_aarch64_ldst_imm12_scale2:
 283       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
 284         return R_CLS(LDST16_ABS_LO12_NC);
 285       if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
 286         return R_CLS(TLSLD_LDST16_DTPREL_LO12);
 287       if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
 288         return R_CLS(TLSLD_LDST16_DTPREL_LO12_NC);
 289       if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
 290         return R_CLS(TLSLE_LDST16_TPREL_LO12);
 291       if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
 292         return R_CLS(TLSLE_LDST16_TPREL_LO12_NC);
 293
 294       Ctx.reportError(Fixup.getLoc(),
 295                       "invalid fixup for 16-bit load/store instruction");
 296       return ELF::R_AARCH64_NONE;
 297     case AArch64::fixup_aarch64_ldst_imm12_scale4:
 298       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
 299         return R_CLS(LDST32_ABS_LO12_NC);
 300       if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
 301         return R_CLS(TLSLD_LDST32_DTPREL_LO12);
 302       if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
 303         return R_CLS(TLSLD_LDST32_DTPREL_LO12_NC);
 304       if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
 305         return R_CLS(TLSLE_LDST32_TPREL_LO12);
 306       if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
 307         return R_CLS(TLSLE_LDST32_TPREL_LO12_NC);
 308       if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) {
 309         if (IsILP32)
 310           return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
 311         Ctx.reportError(Fixup.getLoc(),
 312                         "LP64 4 byte unchecked GOT load/store relocation "
 313                         "not supported (ILP32 eqv: LD32_GOT_LO12_NC");
 314         return ELF::R_AARCH64_NONE;
 315       }
 316       if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC) {
 317         if (IsILP32) {
 318           Ctx.reportError(Fixup.getLoc(),
 319                           "ILP32 4 byte checked GOT load/store relocation "
 320                           "not supported (unchecked eqv: LD32_GOT_LO12_NC)");
 321         } else {
 322           Ctx.reportError(Fixup.getLoc(),
 323                           "LP64 4 byte checked GOT load/store relocation "
 324                           "not supported (unchecked/ILP32 eqv: "
 325                           "LD32_GOT_LO12_NC)");
 326         }
 327         return ELF::R_AARCH64_NONE;
 328       }
 329       if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
 330         if (IsILP32)
 331           return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
 332         Ctx.reportError(Fixup.getLoc(), "LP64 32-bit load/store "
 333                                         "relocation not supported (ILP32 eqv: "
 334                                         "TLSIE_LD32_GOTTPREL_LO12_NC)");
 335         return ELF::R_AARCH64_NONE;
 336       }
 337       if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC) {
 338         if (IsILP32)
 339           return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
 340         Ctx.reportError(Fixup.getLoc(),
 341                         "LP64 4 byte TLSDESC load/store relocation "
 342                         "not supported (ILP32 eqv: TLSDESC_LD64_LO12)");
 343         return ELF::R_AARCH64_NONE;
 344       }
 345
 346       Ctx.reportError(Fixup.getLoc(),
 347                       "invalid fixup for 32-bit load/store instruction "
 348                       "fixup_aarch64_ldst_imm12_scale4");
 349       return ELF::R_AARCH64_NONE;
 350     case AArch64::fixup_aarch64_ldst_imm12_scale8:
 351       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
 352         return R_CLS(LDST64_ABS_LO12_NC);
 353       if ((SymLoc == AArch64MCExpr::VK_GOT ||
 354            SymLoc == AArch64MCExpr::VK_GOT_AUTH) &&
 355           IsNC) {
 356         AArch64MCExpr::VariantKind AddressLoc =
 357             AArch64MCExpr::getAddressFrag(RefKind);
 358         bool IsAuth = (SymLoc == AArch64MCExpr::VK_GOT_AUTH);
 359         if (!IsILP32) {
 360           if (AddressLoc == AArch64MCExpr::VK_LO15)
 361             return ELF::R_AARCH64_LD64_GOTPAGE_LO15;
 362           return (IsAuth ? ELF::R_AARCH64_AUTH_LD64_GOT_LO12_NC
 363                          : ELF::R_AARCH64_LD64_GOT_LO12_NC);
 364         }
 365         Ctx.reportError(Fixup.getLoc(),
 366                         Twine("ILP32 64-bit load/store "
 367                               "relocation not supported (LP64 eqv: ") +
 368                             (IsAuth ? "AUTH_GOT_LO12_NC" : "LD64_GOT_LO12_NC") +
 369                             Twine(')'));
 370         return ELF::R_AARCH64_NONE;
 371       }
 372       if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
 373         return R_CLS(TLSLD_LDST64_DTPREL_LO12);
 374       if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
 375         return R_CLS(TLSLD_LDST64_DTPREL_LO12_NC);
 376       if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
 377         return R_CLS(TLSLE_LDST64_TPREL_LO12);
 378       if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
 379         return R_CLS(TLSLE_LDST64_TPREL_LO12_NC);
 380       if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
 381         if (!IsILP32)
 382           return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
 383         Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
 384                                         "relocation not supported (LP64 eqv: "
 385                                         "TLSIE_LD64_GOTTPREL_LO12_NC)");
 386         return ELF::R_AARCH64_NONE;
 387       }
 388       if (SymLoc == AArch64MCExpr::VK_TLSDESC) {
 389         if (!IsILP32)
 390           return ELF::R_AARCH64_TLSDESC_LD64_LO12;
 391         Ctx.reportError(Fixup.getLoc(), "ILP32 64-bit load/store "
 392                                         "relocation not supported (LP64 eqv: "
 393                                         "TLSDESC_LD64_LO12)");
 394         return ELF::R_AARCH64_NONE;
 395       }
 396       Ctx.reportError(Fixup.getLoc(),
 397                       "invalid fixup for 64-bit load/store instruction");
 398       return ELF::R_AARCH64_NONE;
 399     case AArch64::fixup_aarch64_ldst_imm12_scale16:
 400       if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
 401         return R_CLS(LDST128_ABS_LO12_NC);
 402       if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
 403         return R_CLS(TLSLD_LDST128_DTPREL_LO12);
 404       if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
 405         return R_CLS(TLSLD_LDST128_DTPREL_LO12_NC);
 406       if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
 407         return R_CLS(TLSLE_LDST128_TPREL_LO12);
 408       if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
 409         return R_CLS(TLSLE_LDST128_TPREL_LO12_NC);
 410
 411       Ctx.reportError(Fixup.getLoc(),
 412                       "invalid fixup for 128-bit load/store instruction");
 413       return ELF::R_AARCH64_NONE;
 414     // ILP32 case not reached here, tested with isNonILP32reloc
 415     case AArch64::fixup_aarch64_movw:
 416       if (RefKind == AArch64MCExpr::VK_ABS_G3)
 417         return ELF::R_AARCH64_MOVW_UABS_G3;
 418       if (RefKind == AArch64MCExpr::VK_ABS_G2)
 419         return ELF::R_AARCH64_MOVW_UABS_G2;
 420       if (RefKind == AArch64MCExpr::VK_ABS_G2_S)
 421         return ELF::R_AARCH64_MOVW_SABS_G2;
 422       if (RefKind == AArch64MCExpr::VK_ABS_G2_NC)
 423         return ELF::R_AARCH64_MOVW_UABS_G2_NC;
 424       if (RefKind == AArch64MCExpr::VK_ABS_G1)
 425         return R_CLS(MOVW_UABS_G1);
 426       if (RefKind == AArch64MCExpr::VK_ABS_G1_S)
 427         return ELF::R_AARCH64_MOVW_SABS_G1;
 428       if (RefKind == AArch64MCExpr::VK_ABS_G1_NC)
 429         return ELF::R_AARCH64_MOVW_UABS_G1_NC;
 430       if (RefKind == AArch64MCExpr::VK_ABS_G0)
 431         return R_CLS(MOVW_UABS_G0);
 432       if (RefKind == AArch64MCExpr::VK_ABS_G0_S)
 433         return R_CLS(MOVW_SABS_G0);
 434       if (RefKind == AArch64MCExpr::VK_ABS_G0_NC)
 435         return R_CLS(MOVW_UABS_G0_NC);
 436       if (RefKind == AArch64MCExpr::VK_PREL_G3)
 437         return ELF::R_AARCH64_MOVW_PREL_G3;
 438       if (RefKind == AArch64MCExpr::VK_PREL_G2)
 439         return ELF::R_AARCH64_MOVW_PREL_G2;
 440       if (RefKind == AArch64MCExpr::VK_PREL_G2_NC)
 441         return ELF::R_AARCH64_MOVW_PREL_G2_NC;
 442       if (RefKind == AArch64MCExpr::VK_PREL_G1)
 443         return R_CLS(MOVW_PREL_G1);
 444       if (RefKind == AArch64MCExpr::VK_PREL_G1_NC)
 445         return ELF::R_AARCH64_MOVW_PREL_G1_NC;
 446       if (RefKind == AArch64MCExpr::VK_PREL_G0)
 447         return R_CLS(MOVW_PREL_G0);
 448       if (RefKind == AArch64MCExpr::VK_PREL_G0_NC)
 449         return R_CLS(MOVW_PREL_G0_NC);
 450       if (RefKind == AArch64MCExpr::VK_DTPREL_G2)
 451         return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2;
 452       if (RefKind == AArch64MCExpr::VK_DTPREL_G1)
 453         return R_CLS(TLSLD_MOVW_DTPREL_G1);
 454       if (RefKind == AArch64MCExpr::VK_DTPREL_G1_NC)
 455         return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC;
 456       if (RefKind == AArch64MCExpr::VK_DTPREL_G0)
 457         return R_CLS(TLSLD_MOVW_DTPREL_G0);
 458       if (RefKind == AArch64MCExpr::VK_DTPREL_G0_NC)
 459         return R_CLS(TLSLD_MOVW_DTPREL_G0_NC);
 460       if (RefKind == AArch64MCExpr::VK_TPREL_G2)
 461         return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G2;
 462       if (RefKind == AArch64MCExpr::VK_TPREL_G1)
 463         return R_CLS(TLSLE_MOVW_TPREL_G1);
 464       if (RefKind == AArch64MCExpr::VK_TPREL_G1_NC)
 465         return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC;
 466       if (RefKind == AArch64MCExpr::VK_TPREL_G0)
 467         return R_CLS(TLSLE_MOVW_TPREL_G0);
 468       if (RefKind == AArch64MCExpr::VK_TPREL_G0_NC)
 469         return R_CLS(TLSLE_MOVW_TPREL_G0_NC);
 470       if (RefKind == AArch64MCExpr::VK_GOTTPREL_G1)
 471         return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
 472       if (RefKind == AArch64MCExpr::VK_GOTTPREL_G0_NC)
 473         return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
 474       Ctx.reportError(Fixup.getLoc(),
 475                       "invalid fixup for movz/movk instruction");
 476       return ELF::R_AARCH64_NONE;
 477     default:
 478       Ctx.reportError(Fixup.getLoc(), "Unknown ELF relocation type");
 479       return ELF::R_AARCH64_NONE;
 480     }
 481   }
 482
 483   llvm_unreachable("Unimplemented fixup -> relocation");
 484 }
 485
 486 bool AArch64ELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
 487                                                      const MCSymbol &,
 488                                                      unsigned) const {
 489   return (Val.getRefKind() & AArch64MCExpr::VK_GOT) == AArch64MCExpr::VK_GOT;
 490 }
 491
 492 std::unique_ptr<MCObjectTargetWriter>
 493 llvm::createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32) {
 494   return std::make_unique<AArch64ELFObjectWriter>(OSABI, IsILP32);
 495 }