llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h

   1 //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This class prints an AArch64 MCInst to a .s file.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
  14 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
  15
  16 #include "MCTargetDesc/AArch64MCTargetDesc.h"
  17 #include "llvm/ADT/StringRef.h"
  18 #include "llvm/MC/MCInstPrinter.h"
  19 #include "../Utils/AArch64BaseInfo.h"
  20
  21 namespace llvm {
  22
  23 class AArch64InstPrinter : public MCInstPrinter {
  24 public:
  25   AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
  26                      const MCRegisterInfo &MRI);
  27
  28   bool applyTargetSpecificCLOption(StringRef Opt) override;
  29
  30   void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
  31                  const MCSubtargetInfo &STI, raw_ostream &O) override;
  32   void printRegName(raw_ostream &OS, MCRegister Reg) override;
  33   void printRegName(raw_ostream &OS, MCRegister Reg, unsigned AltIdx);
  34
  35   // Autogenerated by tblgen.
  36   std::pair<const char *, uint64_t>
  37   getMnemonic(const MCInst &MI) const override;
  38   virtual void printInstruction(const MCInst *MI, uint64_t Address,
  39                                 const MCSubtargetInfo &STI, raw_ostream &O);
  40   virtual bool printAliasInstr(const MCInst *MI, uint64_t Address,
  41                                const MCSubtargetInfo &STI, raw_ostream &O);
  42   virtual void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
  43                                        unsigned OpIdx, unsigned PrintMethodIdx,
  44                                        const MCSubtargetInfo &STI,
  45                                        raw_ostream &O);
  46
  47   virtual StringRef getRegName(MCRegister Reg) const;
  48
  49   static const char *getRegisterName(MCRegister Reg,
  50                                      unsigned AltIdx = AArch64::NoRegAltName);
  51
  52 protected:
  53   bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
  54                      raw_ostream &O);
  55   bool printSyspAlias(const MCInst *MI, const MCSubtargetInfo &STI,
  56                       raw_ostream &O);
  57   bool printRangePrefetchAlias(const MCInst *MI, const MCSubtargetInfo &STI,
  58                                raw_ostream &O, StringRef Annot);
  59   // Operand printers
  60   void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
  61                     raw_ostream &O);
  62   void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
  63                 raw_ostream &O);
  64   void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
  65                    raw_ostream &O);
  66   template <int Size>
  67   void printSImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
  68                  raw_ostream &O);
  69   template <typename T> void printImmSVE(T Value, raw_ostream &O);
  70   void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
  71                            raw_ostream &O);
  72   template <int Amount>
  73   void printPostIncOperand(const MCInst *MI, unsigned OpNo,
  74                            const MCSubtargetInfo &STI, raw_ostream &O) {
  75     printPostIncOperand(MI, OpNo, Amount, O);
  76   }
  77
  78   void printVRegOperand(const MCInst *MI, unsigned OpNo,
  79                         const MCSubtargetInfo &STI, raw_ostream &O);
  80   void printSysCROperand(const MCInst *MI, unsigned OpNo,
  81                          const MCSubtargetInfo &STI, raw_ostream &O);
  82   void printAddSubImm(const MCInst *MI, unsigned OpNum,
  83                       const MCSubtargetInfo &STI, raw_ostream &O);
  84   template <typename T>
  85   void printLogicalImm(const MCInst *MI, unsigned OpNum,
  86                        const MCSubtargetInfo &STI, raw_ostream &O);
  87   void printShifter(const MCInst *MI, unsigned OpNum,
  88                     const MCSubtargetInfo &STI, raw_ostream &O);
  89   void printShiftedRegister(const MCInst *MI, unsigned OpNum,
  90                             const MCSubtargetInfo &STI, raw_ostream &O);
  91   void printExtendedRegister(const MCInst *MI, unsigned OpNum,
  92                              const MCSubtargetInfo &STI, raw_ostream &O);
  93   void printArithExtend(const MCInst *MI, unsigned OpNum,
  94                         const MCSubtargetInfo &STI, raw_ostream &O);
  95   void printMemExtendImpl(bool SignExtend, bool DoShift, unsigned Width,
  96                           char SrcRegKind, raw_ostream &O);
  97   void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
  98                       char SrcRegKind, unsigned Width);
  99   template <char SrcRegKind, unsigned Width>
 100   void printMemExtend(const MCInst *MI, unsigned OpNum,
 101                       const MCSubtargetInfo &STI, raw_ostream &O) {
 102     printMemExtend(MI, OpNum, O, SrcRegKind, Width);
 103   }
 104   template <bool SignedExtend, int ExtWidth, char SrcRegKind, char Suffix>
 105   void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum,
 106                                const MCSubtargetInfo &STI, raw_ostream &O);
 107   void printCondCode(const MCInst *MI, unsigned OpNum,
 108                      const MCSubtargetInfo &STI, raw_ostream &O);
 109   void printInverseCondCode(const MCInst *MI, unsigned OpNum,
 110                             const MCSubtargetInfo &STI, raw_ostream &O);
 111   void printAlignedLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
 112                          const MCSubtargetInfo &STI, raw_ostream &O);
 113   void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
 114                          raw_ostream &O);
 115   void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
 116                         raw_ostream &O);
 117
 118   template <int Scale>
 119   void printUImm12Offset(const MCInst *MI, unsigned OpNum,
 120                          const MCSubtargetInfo &STI, raw_ostream &O) {
 121     printUImm12Offset(MI, OpNum, Scale, O);
 122   }
 123
 124   template <int BitWidth>
 125   void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
 126                         const MCSubtargetInfo &STI, raw_ostream &O) {
 127     printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
 128   }
 129
 130   void printAMNoIndex(const MCInst *MI, unsigned OpNum,
 131                       const MCSubtargetInfo &STI, raw_ostream &O);
 132
 133   template <int Scale>
 134   void printImmScale(const MCInst *MI, unsigned OpNum,
 135                      const MCSubtargetInfo &STI, raw_ostream &O);
 136
 137   template <int Scale, int Offset>
 138   void printImmRangeScale(const MCInst *MI, unsigned OpNum,
 139                           const MCSubtargetInfo &STI, raw_ostream &O);
 140
 141   template <bool IsSVEPrefetch = false>
 142   void printPrefetchOp(const MCInst *MI, unsigned OpNum,
 143                        const MCSubtargetInfo &STI, raw_ostream &O);
 144
 145   void printRPRFMOperand(const MCInst *MI, unsigned OpNum,
 146                          const MCSubtargetInfo &STI, raw_ostream &O);
 147
 148   void printPSBHintOp(const MCInst *MI, unsigned OpNum,
 149                       const MCSubtargetInfo &STI, raw_ostream &O);
 150
 151   void printBTIHintOp(const MCInst *MI, unsigned OpNum,
 152                       const MCSubtargetInfo &STI, raw_ostream &O);
 153
 154   void printFPImmOperand(const MCInst *MI, unsigned OpNum,
 155                          const MCSubtargetInfo &STI, raw_ostream &O);
 156
 157   void printVectorList(const MCInst *MI, unsigned OpNum,
 158                        const MCSubtargetInfo &STI, raw_ostream &O,
 159                        StringRef LayoutSuffix);
 160
 161   void printMatrixTileList(const MCInst *MI, unsigned OpNum,
 162                            const MCSubtargetInfo &STI, raw_ostream &O);
 163
 164   /// Print a list of vector registers where the type suffix is implicit
 165   /// (i.e. attached to the instruction rather than the registers).
 166   void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
 167                                       const MCSubtargetInfo &STI,
 168                                       raw_ostream &O);
 169
 170   template <unsigned NumLanes, char LaneKind>
 171   void printTypedVectorList(const MCInst *MI, unsigned OpNum,
 172                             const MCSubtargetInfo &STI, raw_ostream &O);
 173
 174   template <unsigned Scale = 1>
 175   void printVectorIndex(const MCInst *MI, unsigned OpNum,
 176                         const MCSubtargetInfo &STI, raw_ostream &O);
 177   template <unsigned Scale = 1>
 178   void printMatrixIndex(const MCInst *MI, unsigned OpNum,
 179                         const MCSubtargetInfo &STI, raw_ostream &O);
 180   void printAdrAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
 181                          const MCSubtargetInfo &STI, raw_ostream &O);
 182   void printBarrierOption(const MCInst *MI, unsigned OpNum,
 183                           const MCSubtargetInfo &STI, raw_ostream &O);
 184   void printBarriernXSOption(const MCInst *MI, unsigned OpNum,
 185                              const MCSubtargetInfo &STI, raw_ostream &O);
 186   void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
 187                               const MCSubtargetInfo &STI, raw_ostream &O);
 188   void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
 189                               const MCSubtargetInfo &STI, raw_ostream &O);
 190   void printSystemPStateField(const MCInst *MI, unsigned OpNum,
 191                               const MCSubtargetInfo &STI, raw_ostream &O);
 192   void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
 193                               const MCSubtargetInfo &STI, raw_ostream &O);
 194   template <int EltSize>
 195   void printPredicateAsCounter(const MCInst *MI, unsigned OpNum,
 196                                const MCSubtargetInfo &STI, raw_ostream &O);
 197   template<int64_t Angle, int64_t Remainder>
 198   void printComplexRotationOp(const MCInst *MI, unsigned OpNo,
 199                             const MCSubtargetInfo &STI, raw_ostream &O);
 200   template<unsigned size>
 201   void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
 202                                     const MCSubtargetInfo &STI,
 203                                     raw_ostream &O);
 204   template <typename T>
 205   void printImm8OptLsl(const MCInst *MI, unsigned OpNum,
 206                        const MCSubtargetInfo &STI, raw_ostream &O);
 207   template <typename T>
 208   void printSVELogicalImm(const MCInst *MI, unsigned OpNum,
 209                           const MCSubtargetInfo &STI, raw_ostream &O);
 210   void printSVEPattern(const MCInst *MI, unsigned OpNum,
 211                        const MCSubtargetInfo &STI, raw_ostream &O);
 212   void printSVEVecLenSpecifier(const MCInst *MI, unsigned OpNum,
 213                                const MCSubtargetInfo &STI, raw_ostream &O);
 214
 215   template <bool IsVertical>
 216   void printMatrixTileVector(const MCInst *MI, unsigned OpNum,
 217                              const MCSubtargetInfo &STI, raw_ostream &O);
 218   void printMatrixTile(const MCInst *MI, unsigned OpNum,
 219                        const MCSubtargetInfo &STI, raw_ostream &O);
 220   template <int EltSize>
 221   void printMatrix(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
 222                    raw_ostream &O);
 223   void printSVCROp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
 224                    raw_ostream &O);
 225   template <char = 0>
 226   void printSVERegOp(const MCInst *MI, unsigned OpNum,
 227                     const MCSubtargetInfo &STI, raw_ostream &O);
 228   void printGPR64as32(const MCInst *MI, unsigned OpNum,
 229                       const MCSubtargetInfo &STI, raw_ostream &O);
 230   void printGPR64x8(const MCInst *MI, unsigned OpNum,
 231                     const MCSubtargetInfo &STI, raw_ostream &O);
 232   void printSyspXzrPair(const MCInst *MI, unsigned OpNum,
 233                         const MCSubtargetInfo &STI, raw_ostream &O);
 234   template <int Width>
 235   void printZPRasFPR(const MCInst *MI, unsigned OpNum,
 236                      const MCSubtargetInfo &STI, raw_ostream &O);
 237   template <unsigned ImmIs0, unsigned ImmIs1>
 238   void printExactFPImm(const MCInst *MI, unsigned OpNum,
 239                        const MCSubtargetInfo &STI, raw_ostream &O);
 240   void printPHintOp(const MCInst *MI, unsigned OpNum,
 241                     const MCSubtargetInfo &STI, raw_ostream &O);
 242 };
 243
 244 class AArch64AppleInstPrinter : public AArch64InstPrinter {
 245 public:
 246   AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
 247                           const MCRegisterInfo &MRI);
 248
 249   void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
 250                  const MCSubtargetInfo &STI, raw_ostream &O) override;
 251
 252   std::pair<const char *, uint64_t>
 253   getMnemonic(const MCInst &MI) const override;
 254   void printInstruction(const MCInst *MI, uint64_t Address,
 255                         const MCSubtargetInfo &STI, raw_ostream &O) override;
 256   bool printAliasInstr(const MCInst *MI, uint64_t Address,
 257                        const MCSubtargetInfo &STI, raw_ostream &O) override;
 258   void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
 259                                unsigned OpIdx, unsigned PrintMethodIdx,
 260                                const MCSubtargetInfo &STI,
 261                                raw_ostream &O) override;
 262
 263   StringRef getRegName(MCRegister Reg) const override;
 264
 265   static const char *getRegisterName(MCRegister Reg,
 266                                      unsigned AltIdx = AArch64::NoRegAltName);
 267 };
 268
 269 } // end namespace llvm
 270
 271 #endif // LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H