llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h

   1 //===-- AMDGPUInstrInfo.h - AMDGPU Instruction Information ------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 /// \file
  10 /// Contains the definition of a TargetInstrInfo class that is common
  11 /// to all AMD GPUs.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H
  16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H
  17
  18 #include "Utils/AMDGPUBaseInfo.h"
  19
  20 namespace llvm {
  21
  22 class GCNSubtarget;
  23 class MachineMemOperand;
  24 class MachineInstr;
  25
  26 class AMDGPUInstrInfo {
  27 public:
  28   explicit AMDGPUInstrInfo(const GCNSubtarget &st);
  29
  30   static bool isUniformMMO(const MachineMemOperand *MMO);
  31 };
  32
  33 namespace AMDGPU {
  34
  35 /// Return the intrinsic ID for opcodes with the G_AMDGPU_INTRIN_ prefix.
  36 ///
  37 /// These opcodes have an Intrinsic::ID operand similar to a GIntrinsic. But
  38 /// they are not actual instances of GIntrinsics, so we cannot use
  39 /// GIntrinsic::getIntrinsicID() on them.
  40 Intrinsic::ID getIntrinsicID(const MachineInstr &I);
  41
  42 struct RsrcIntrinsic {
  43   unsigned Intr;
  44   uint8_t RsrcArg;
  45   bool IsImage;
  46 };
  47 const RsrcIntrinsic *lookupRsrcIntrinsic(unsigned Intr);
  48
  49 struct D16ImageDimIntrinsic {
  50   unsigned Intr;
  51   unsigned D16HelperIntr;
  52 };
  53 const D16ImageDimIntrinsic *lookupD16ImageDimIntrinsic(unsigned Intr);
  54
  55 struct ImageDimIntrinsicInfo {
  56   unsigned Intr;
  57   unsigned BaseOpcode;
  58   MIMGDim Dim;
  59
  60   uint8_t NumOffsetArgs;
  61   uint8_t NumBiasArgs;
  62   uint8_t NumZCompareArgs;
  63   uint8_t NumGradients;
  64   uint8_t NumDmask;
  65   uint8_t NumData;
  66   uint8_t NumVAddrs;
  67   uint8_t NumArgs;
  68
  69   uint8_t DMaskIndex;
  70   uint8_t VAddrStart;
  71   uint8_t OffsetIndex;
  72   uint8_t BiasIndex;
  73   uint8_t ZCompareIndex;
  74   uint8_t GradientStart;
  75   uint8_t CoordStart;
  76   uint8_t LodIndex;
  77   uint8_t MipIndex;
  78   uint8_t VAddrEnd;
  79   uint8_t RsrcIndex;
  80   uint8_t SampIndex;
  81   uint8_t UnormIndex;
  82   uint8_t TexFailCtrlIndex;
  83   uint8_t CachePolicyIndex;
  84
  85   uint8_t BiasTyArg;
  86   uint8_t GradientTyArg;
  87   uint8_t CoordTyArg;
  88 };
  89 const ImageDimIntrinsicInfo *getImageDimIntrinsicInfo(unsigned Intr);
  90
  91 const ImageDimIntrinsicInfo *
  92 getImageDimIntrinsicByBaseOpcode(unsigned BaseOpcode, unsigned Dim);
  93
  94 } // end AMDGPU namespace
  95 } // End llvm namespace
  96
  97 #endif