1 class ProcNoItin<string Name, list<SubtargetFeature> Features>
2 : Processor<Name, NoItineraries, Features>;
4 //===----------------------------------------------------------------------===//
5 // ARM Processor subtarget features.
8 def ProcA5 : SubtargetFeature<"a5", "ARMProcFamily", "CortexA5",
9 "Cortex-A5 ARM processors", []>;
10 def ProcA7 : SubtargetFeature<"a7", "ARMProcFamily", "CortexA7",
11 "Cortex-A7 ARM processors", []>;
12 def ProcA8 : SubtargetFeature<"a8", "ARMProcFamily", "CortexA8",
13 "Cortex-A8 ARM processors", []>;
14 def ProcA9 : SubtargetFeature<"a9", "ARMProcFamily", "CortexA9",
15 "Cortex-A9 ARM processors", []>;
16 def ProcA12 : SubtargetFeature<"a12", "ARMProcFamily", "CortexA12",
17 "Cortex-A12 ARM processors", []>;
18 def ProcA15 : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
19 "Cortex-A15 ARM processors", []>;
20 def ProcA17 : SubtargetFeature<"a17", "ARMProcFamily", "CortexA17",
21 "Cortex-A17 ARM processors", []>;
22 def ProcA32 : SubtargetFeature<"a32", "ARMProcFamily", "CortexA32",
23 "Cortex-A32 ARM processors", []>;
24 def ProcA35 : SubtargetFeature<"a35", "ARMProcFamily", "CortexA35",
25 "Cortex-A35 ARM processors", []>;
26 def ProcA53 : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
27 "Cortex-A53 ARM processors", []>;
28 def ProcA55 : SubtargetFeature<"a55", "ARMProcFamily", "CortexA55",
29 "Cortex-A55 ARM processors", []>;
30 def ProcA57 : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
31 "Cortex-A57 ARM processors", []>;
32 def ProcA72 : SubtargetFeature<"a72", "ARMProcFamily", "CortexA72",
33 "Cortex-A72 ARM processors", []>;
34 def ProcA73 : SubtargetFeature<"a73", "ARMProcFamily", "CortexA73",
35 "Cortex-A73 ARM processors", []>;
36 def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75",
37 "Cortex-A75 ARM processors", []>;
38 def ProcA76 : SubtargetFeature<"a76", "ARMProcFamily", "CortexA76",
39 "Cortex-A76 ARM processors", []>;
40 def ProcA77 : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
41 "Cortex-A77 ARM processors", []>;
42 def ProcA78 : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
43 "Cortex-A78 ARM processors", []>;
44 def ProcA78AE : SubtargetFeature<"cortex-a78ae", "ARMProcFamily", "CortexA78AE",
45 "Cortex-A78AE ARM processors", []>;
46 def ProcA78C : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
47 "Cortex-A78C ARM processors", []>;
48 def ProcA510 : SubtargetFeature<"cortex-a510", "ARMProcFamily",
49 "CortexA510", "Cortex-A510 ARM processors", []>;
50 def ProcA710 : SubtargetFeature<"cortex-a710", "ARMProcFamily",
51 "CortexA710", "Cortex-A710 ARM processors", []>;
52 def ProcX1 : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
53 "Cortex-X1 ARM processors", []>;
54 def ProcX1C : SubtargetFeature<"cortex-x1c", "ARMProcFamily", "CortexX1C",
55 "Cortex-X1C ARM processors", []>;
57 def ProcV1 : SubtargetFeature<"neoverse-v1", "ARMProcFamily",
58 "NeoverseV1", "Neoverse-V1 ARM processors", []>;
60 def ProcKrait : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
61 "Qualcomm Krait processors", []>;
62 def ProcKryo : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
63 "Qualcomm Kryo processors", []>;
64 def ProcSwift : SubtargetFeature<"swift", "ARMProcFamily", "Swift",
65 "Swift ARM processors", []>;
67 def ProcExynos : SubtargetFeature<"exynos", "ARMProcFamily", "Exynos",
68 "Samsung Exynos processors",
70 FeatureUseWideStrideVFP,
71 FeatureSplatVFPToNeon,
75 FeatureProfUnpredicate,
80 FeatureHasRetAddrStack,
87 def ProcR4 : SubtargetFeature<"r4", "ARMProcFamily", "CortexR4",
88 "Cortex-R4 ARM processors", []>;
89 def ProcR5 : SubtargetFeature<"r5", "ARMProcFamily", "CortexR5",
90 "Cortex-R5 ARM processors", []>;
91 def ProcR7 : SubtargetFeature<"r7", "ARMProcFamily", "CortexR7",
92 "Cortex-R7 ARM processors", []>;
93 def ProcR52 : SubtargetFeature<"r52", "ARMProcFamily", "CortexR52",
94 "Cortex-R52 ARM processors", []>;
95 def ProcR52plus : SubtargetFeature<"r52plus", "ARMProcFamily", "CortexR52plus",
96 "Cortex-R52plus ARM processors", []>;
98 def ProcM3 : SubtargetFeature<"m3", "ARMProcFamily", "CortexM3",
99 "Cortex-M3 ARM processors", []>;
100 def ProcM55 : SubtargetFeature<"m55", "ARMProcFamily", "CortexM55",
101 "Cortex-M55 ARM processors", []>;
102 def ProcM7 : SubtargetFeature<"m7", "ARMProcFamily", "CortexM7",
103 "Cortex-M7 ARM processors", []>;
104 def ProcM85 : SubtargetFeature<"m85", "ARMProcFamily", "CortexM85",
105 "Cortex-M85 ARM processors", []>;
107 //===----------------------------------------------------------------------===//
110 // Dummy CPU, used to target architectures
111 def : ProcessorModel<"generic", CortexA8Model, []>;
113 // FIXME: Several processors below are not using their own scheduler
114 // model, but one of similar/previous processor. These should be fixed.
116 def : ProcNoItin<"arm8", [ARMv4]>;
117 def : ProcNoItin<"arm810", [ARMv4]>;
118 def : ProcNoItin<"strongarm", [ARMv4]>;
119 def : ProcNoItin<"strongarm110", [ARMv4]>;
120 def : ProcNoItin<"strongarm1100", [ARMv4]>;
121 def : ProcNoItin<"strongarm1110", [ARMv4]>;
123 def : ProcNoItin<"arm7tdmi", [ARMv4t]>;
124 def : ProcNoItin<"arm7tdmi-s", [ARMv4t]>;
125 def : ProcNoItin<"arm710t", [ARMv4t]>;
126 def : ProcNoItin<"arm720t", [ARMv4t]>;
127 def : ProcNoItin<"arm9", [ARMv4t]>;
128 def : ProcNoItin<"arm9tdmi", [ARMv4t]>;
129 def : ProcNoItin<"arm920", [ARMv4t]>;
130 def : ProcNoItin<"arm920t", [ARMv4t]>;
131 def : ProcNoItin<"arm922t", [ARMv4t]>;
132 def : ProcNoItin<"arm940t", [ARMv4t]>;
133 def : ProcNoItin<"ep9312", [ARMv4t]>;
135 def : ProcNoItin<"arm10tdmi", [ARMv5t]>;
136 def : ProcNoItin<"arm1020t", [ARMv5t]>;
138 def : ProcNoItin<"arm9e", [ARMv5te]>;
139 def : ProcNoItin<"arm926ej-s", [ARMv5te]>;
140 def : ProcNoItin<"arm946e-s", [ARMv5te]>;
141 def : ProcNoItin<"arm966e-s", [ARMv5te]>;
142 def : ProcNoItin<"arm968e-s", [ARMv5te]>;
143 def : ProcNoItin<"arm10e", [ARMv5te]>;
144 def : ProcNoItin<"arm1020e", [ARMv5te]>;
145 def : ProcNoItin<"arm1022e", [ARMv5te]>;
146 def : ProcNoItin<"xscale", [ARMv5te]>;
147 def : ProcNoItin<"iwmmxt", [ARMv5te]>;
149 def : Processor<"arm1136j-s", ARMV6Itineraries, [ARMv6]>;
150 def : Processor<"arm1136jf-s", ARMV6Itineraries, [ARMv6,
152 FeatureHasSlowFPVMLx]>;
154 def : Processor<"cortex-m0", ARMV6Itineraries, [ARMv6m,
155 FeatureHasNoBranchPredictor]>;
156 def : Processor<"cortex-m0plus", ARMV6Itineraries, [ARMv6m,
157 FeatureHasNoBranchPredictor]>;
158 def : Processor<"cortex-m1", ARMV6Itineraries, [ARMv6m,
159 FeatureHasNoBranchPredictor]>;
160 def : Processor<"sc000", ARMV6Itineraries, [ARMv6m,
161 FeatureHasNoBranchPredictor]>;
163 def : Processor<"arm1176jz-s", ARMV6Itineraries, [ARMv6kz]>;
164 def : Processor<"arm1176jzf-s", ARMV6Itineraries, [ARMv6kz,
166 FeatureHasSlowFPVMLx]>;
168 def : Processor<"mpcorenovfp", ARMV6Itineraries, [ARMv6k]>;
169 def : Processor<"mpcore", ARMV6Itineraries, [ARMv6k,
171 FeatureHasSlowFPVMLx]>;
173 def : Processor<"arm1156t2-s", ARMV6Itineraries, [ARMv6t2]>;
174 def : Processor<"arm1156t2f-s", ARMV6Itineraries, [ARMv6t2,
176 FeatureHasSlowFPVMLx]>;
178 def : ProcessorModel<"cortex-a5", CortexA8Model, [ARMv7a, ProcA5,
179 FeatureHasRetAddrStack,
182 FeatureHasSlowFPVMLx,
183 FeatureHasSlowFPVFMx,
184 FeatureVMLxForwarding,
188 def : ProcessorModel<"cortex-a7", CortexA8Model, [ARMv7a, ProcA7,
189 FeatureHasRetAddrStack,
192 FeatureHasVMLxHazards,
193 FeatureHasSlowFPVMLx,
194 FeatureHasSlowFPVFMx,
195 FeatureVMLxForwarding,
198 FeatureVirtualization]>;
200 def : ProcessorModel<"cortex-a8", CortexA8Model, [ARMv7a, ProcA8,
201 FeatureHasRetAddrStack,
202 FeatureNonpipelinedVFP,
205 FeatureHasVMLxHazards,
206 FeatureHasSlowFPVMLx,
207 FeatureHasSlowFPVFMx,
208 FeatureVMLxForwarding]>;
210 def : ProcessorModel<"cortex-a9", CortexA9Model, [ARMv7a, ProcA9,
211 FeatureHasRetAddrStack,
213 FeatureHasVMLxHazards,
214 FeatureVMLxForwarding,
216 FeatureAvoidPartialCPSR,
220 FeatureNEONForFPMovs,
221 FeatureCheckVLDnAlign,
224 def : ProcessorModel<"cortex-a12", CortexA9Model, [ARMv7a, ProcA12,
225 FeatureHasRetAddrStack,
227 FeatureVMLxForwarding,
229 FeatureAvoidPartialCPSR,
230 FeatureVirtualization,
233 def : ProcessorModel<"cortex-a15", CortexA9Model, [ARMv7a, ProcA15,
234 FeatureDontWidenVMOVS,
235 FeatureSplatVFPToNeon,
236 FeatureHasRetAddrStack,
241 FeatureCheckVLDnAlign,
242 FeatureAvoidPartialCPSR,
243 FeatureVirtualization]>;
245 def : ProcessorModel<"cortex-a17", CortexA9Model, [ARMv7a, ProcA17,
246 FeatureHasRetAddrStack,
249 FeatureVMLxForwarding,
251 FeatureAvoidPartialCPSR,
252 FeatureVirtualization]>;
254 // FIXME: krait has currently the same features as A9 plus VFP4 and HWDiv
255 def : ProcessorModel<"krait", CortexA9Model, [ARMv7a, ProcKrait,
256 FeatureHasRetAddrStack,
258 FeatureCheckVLDnAlign,
259 FeatureVMLxForwarding,
261 FeatureAvoidPartialCPSR,
266 def : ProcessorModel<"swift", SwiftModel, [ARMv7a, ProcSwift,
267 FeatureHasRetAddrStack,
270 FeatureUseWideStrideVFP,
274 FeatureAvoidPartialCPSR,
275 FeatureAvoidMOVsShOp,
276 FeatureHasSlowFPVMLx,
277 FeatureHasSlowFPVFMx,
278 FeatureHasVMLxHazards,
279 FeatureProfUnpredicate,
280 FeaturePrefISHSTBarrier,
281 FeatureSlowOddRegister,
282 FeatureSlowLoadDSubreg,
283 FeatureSlowVGETLNi32,
286 FeatureNoPostRASched]>;
288 def : ProcessorModel<"cortex-r4", CortexA8Model, [ARMv7r, ProcR4,
289 FeatureHasRetAddrStack,
290 FeatureAvoidPartialCPSR]>;
292 def : ProcessorModel<"cortex-r4f", CortexA8Model, [ARMv7r, ProcR4,
293 FeatureHasRetAddrStack,
295 FeatureHasSlowFPVMLx,
296 FeatureHasSlowFPVFMx,
298 FeatureAvoidPartialCPSR]>;
300 def : ProcessorModel<"cortex-r5", CortexA8Model, [ARMv7r, ProcR5,
301 FeatureHasRetAddrStack,
305 FeatureHasSlowFPVMLx,
306 FeatureHasSlowFPVFMx,
307 FeatureAvoidPartialCPSR]>;
309 def : ProcessorModel<"cortex-r7", CortexA8Model, [ARMv7r, ProcR7,
310 FeatureHasRetAddrStack,
316 FeatureHasSlowFPVMLx,
317 FeatureHasSlowFPVFMx,
318 FeatureAvoidPartialCPSR]>;
320 def : ProcessorModel<"cortex-r8", CortexA8Model, [ARMv7r,
321 FeatureHasRetAddrStack,
327 FeatureHasSlowFPVMLx,
328 FeatureHasSlowFPVFMx,
329 FeatureAvoidPartialCPSR]>;
331 def : ProcessorModel<"cortex-m3", CortexM4Model, [ARMv7m,
333 FeaturePreferBranchAlign32,
335 FeatureHasNoBranchPredictor]>;
337 def : ProcessorModel<"sc300", CortexM4Model, [ARMv7m,
340 FeatureHasNoBranchPredictor]>;
342 def : ProcessorModel<"cortex-m4", CortexM4Model, [ARMv7em,
344 FeaturePreferBranchAlign32,
345 FeatureHasSlowFPVMLx,
346 FeatureHasSlowFPVFMx,
348 FeatureHasNoBranchPredictor]>;
350 def : ProcessorModel<"cortex-m7", CortexM7Model, [ARMv7em,
353 FeaturePreferBranchAlign64,
354 FeatureUseMIPipeliner,
357 def : ProcNoItin<"cortex-m23", [ARMv8mBaseline,
359 FeatureHasNoBranchPredictor]>;
361 def : ProcessorModel<"cortex-m33", CortexM4Model, [ARMv8mMainline,
363 FeatureFPARMv8_D16_SP,
364 FeaturePreferBranchAlign32,
365 FeatureHasSlowFPVMLx,
366 FeatureHasSlowFPVFMx,
368 FeatureHasNoBranchPredictor,
370 FeatureFixCMSE_CVE_2021_35465]>;
372 def : ProcessorModel<"star-mc1", CortexM4Model, [ARMv8mMainline,
374 FeatureFPARMv8_D16_SP,
375 FeaturePreferBranchAlign32,
376 FeatureHasSlowFPVMLx,
377 FeatureHasSlowFPVFMx,
379 FeatureHasNoBranchPredictor,
380 FeatureFixCMSE_CVE_2021_35465]>;
382 def : ProcessorModel<"cortex-m35p", CortexM4Model, [ARMv8mMainline,
384 FeatureFPARMv8_D16_SP,
385 FeaturePreferBranchAlign32,
386 FeatureHasSlowFPVMLx,
387 FeatureHasSlowFPVFMx,
389 FeatureHasNoBranchPredictor,
390 FeatureFixCMSE_CVE_2021_35465]>;
392 def : ProcessorModel<"cortex-m55", CortexM55Model, [ARMv81mMainline,
397 FeatureHasNoBranchPredictor,
398 FeaturePreferBranchAlign32,
399 FeatureHasSlowFPVMLx,
401 FeatureFixCMSE_CVE_2021_35465]>;
403 def : ProcessorModel<"cortex-m85", CortexM85Model, [ARMv81mMainline,
408 FeaturePreferBranchAlign64,
412 def : ProcessorModel<"cortex-m52", CortexM55Model, [ARMv81mMainline,
415 FeatureHasNoBranchPredictor,
418 FeaturePreferBranchAlign32,
419 FeatureHasSlowFPVMLx,
420 FeatureMVEVectorCostFactor1,
423 def : ProcNoItin<"cortex-a32", [ARMv8a,
429 def : ProcNoItin<"cortex-a35", [ARMv8a, ProcA35,
435 def : ProcNoItin<"cortex-a53", [ARMv8a, ProcA53,
442 def : ProcNoItin<"cortex-a55", [ARMv82a, ProcA55,
447 def : ProcessorModel<"cortex-a57", CortexA57Model, [ARMv8a, ProcA57,
453 FeatureAvoidPartialCPSR,
454 FeatureCheapPredicableCPSR,
455 FeatureFixCortexA57AES1742098]>;
457 def : ProcessorModel<"cortex-a72", CortexA57Model, [ARMv8a, ProcA72,
462 FeatureFixCortexA57AES1742098]>;
464 def : ProcNoItin<"cortex-a73", [ARMv8a, ProcA73,
470 def : ProcNoItin<"cortex-a75", [ARMv82a, ProcA75,
475 def : ProcNoItin<"cortex-a76", [ARMv82a, ProcA76,
483 def : ProcNoItin<"cortex-a76ae", [ARMv82a, ProcA76,
491 def : ProcNoItin<"cortex-a77", [ARMv82a, ProcA77,
499 def : ProcNoItin<"cortex-a78", [ARMv82a, ProcA78,
507 def : ProcNoItin<"cortex-a78ae", [ARMv82a, ProcA78AE,
515 def : ProcNoItin<"cortex-a78c", [ARMv82a, ProcA78C,
523 def : ProcNoItin<"cortex-a510", [ARMv9a, ProcA710,
531 def : ProcNoItin<"cortex-a710", [ARMv9a, ProcA710,
539 def : ProcNoItin<"cortex-x1", [ARMv82a, ProcX1,
547 def : ProcNoItin<"cortex-x1c", [ARMv82a, ProcX1C,
555 def : ProcNoItin<"neoverse-v1", [ARMv84a,
564 def : ProcNoItin<"neoverse-n1", [ARMv82a,
571 def : ProcNoItin<"neoverse-n2", [ARMv9a,
576 def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift,
577 FeatureHasRetAddrStack,
583 FeatureAvoidPartialCPSR,
584 FeatureAvoidMOVsShOp,
585 FeatureHasSlowFPVMLx,
586 FeatureHasSlowFPVFMx,
590 FeatureNoPostRASched]>;
592 def : ProcNoItin<"exynos-m3", [ARMv8a, ProcExynos]>;
593 def : ProcNoItin<"exynos-m4", [ARMv82a, ProcExynos,
596 def : ProcNoItin<"exynos-m5", [ARMv82a, ProcExynos,
600 def : ProcNoItin<"kryo", [ARMv8a, ProcKryo,
606 def : ProcessorModel<"cortex-r52", CortexR52Model, [ARMv8r, ProcR52,
612 def : ProcessorModel<"cortex-r52plus", CortexR52Model, [ARMv8r, ProcR52plus,