llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp

   1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements the BPFMCCodeEmitter class.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "MCTargetDesc/BPFMCFixups.h"
  14 #include "MCTargetDesc/BPFMCTargetDesc.h"
  15 #include "llvm/ADT/SmallVector.h"
  16 #include "llvm/MC/MCCodeEmitter.h"
  17 #include "llvm/MC/MCExpr.h"
  18 #include "llvm/MC/MCFixup.h"
  19 #include "llvm/MC/MCInst.h"
  20 #include "llvm/MC/MCInstrInfo.h"
  21 #include "llvm/MC/MCRegisterInfo.h"
  22 #include "llvm/MC/MCSubtargetInfo.h"
  23 #include "llvm/Support/EndianStream.h"
  24 #include <cassert>
  25 #include <cstdint>
  26
  27 using namespace llvm;
  28
  29 #define DEBUG_TYPE "mccodeemitter"
  30
  31 namespace {
  32
  33 class BPFMCCodeEmitter : public MCCodeEmitter {
  34   const MCRegisterInfo &MRI;
  35   bool IsLittleEndian;
  36
  37 public:
  38   BPFMCCodeEmitter(const MCInstrInfo &, const MCRegisterInfo &mri,
  39                    bool IsLittleEndian)
  40       : MRI(mri), IsLittleEndian(IsLittleEndian) { }
  41   BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete;
  42   void operator=(const BPFMCCodeEmitter &) = delete;
  43   ~BPFMCCodeEmitter() override = default;
  44
  45   // getBinaryCodeForInstr - TableGen'erated function for getting the
  46   // binary encoding for an instruction.
  47   uint64_t getBinaryCodeForInstr(const MCInst &MI,
  48                                  SmallVectorImpl<MCFixup> &Fixups,
  49                                  const MCSubtargetInfo &STI) const;
  50
  51   // getMachineOpValue - Return binary encoding of operand. If the machin
  52   // operand requires relocation, record the relocation and return zero.
  53   unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
  54                              SmallVectorImpl<MCFixup> &Fixups,
  55                              const MCSubtargetInfo &STI) const;
  56
  57   uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op,
  58                             SmallVectorImpl<MCFixup> &Fixups,
  59                             const MCSubtargetInfo &STI) const;
  60
  61   void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
  62                          SmallVectorImpl<MCFixup> &Fixups,
  63                          const MCSubtargetInfo &STI) const override;
  64 };
  65
  66 } // end anonymous namespace
  67
  68 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII,
  69                                             MCContext &Ctx) {
  70   return new BPFMCCodeEmitter(MCII, *Ctx.getRegisterInfo(), true);
  71 }
  72
  73 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII,
  74                                               MCContext &Ctx) {
  75   return new BPFMCCodeEmitter(MCII, *Ctx.getRegisterInfo(), false);
  76 }
  77
  78 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
  79                                              const MCOperand &MO,
  80                                              SmallVectorImpl<MCFixup> &Fixups,
  81                                              const MCSubtargetInfo &STI) const {
  82   if (MO.isReg())
  83     return MRI.getEncodingValue(MO.getReg());
  84   if (MO.isImm())
  85     return static_cast<unsigned>(MO.getImm());
  86
  87   assert(MO.isExpr());
  88
  89   const MCExpr *Expr = MO.getExpr();
  90
  91   assert(Expr->getKind() == MCExpr::SymbolRef);
  92
  93   if (MI.getOpcode() == BPF::JAL)
  94     // func call name
  95     Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_4));
  96   else if (MI.getOpcode() == BPF::LD_imm64)
  97     Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8));
  98   else if (MI.getOpcode() == BPF::JMPL)
  99     Fixups.push_back(MCFixup::create(0, Expr, (MCFixupKind)BPF::FK_BPF_PCRel_4));
 100   else
 101     // bb label
 102     Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2));
 103
 104   return 0;
 105 }
 106
 107 static uint8_t SwapBits(uint8_t Val)
 108 {
 109   return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4;
 110 }
 111
 112 void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI,
 113                                          SmallVectorImpl<char> &CB,
 114                                          SmallVectorImpl<MCFixup> &Fixups,
 115                                          const MCSubtargetInfo &STI) const {
 116   unsigned Opcode = MI.getOpcode();
 117   raw_svector_ostream OS(CB);
 118   support::endian::Writer OSE(OS, IsLittleEndian ? llvm::endianness::little
 119                                                  : llvm::endianness::big);
 120
 121   if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
 122     uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
 123     CB.push_back(Value >> 56);
 124     if (IsLittleEndian)
 125       CB.push_back((Value >> 48) & 0xff);
 126     else
 127       CB.push_back(SwapBits((Value >> 48) & 0xff));
 128     OSE.write<uint16_t>(0);
 129     OSE.write<uint32_t>(Value & 0xffffFFFF);
 130
 131     const MCOperand &MO = MI.getOperand(1);
 132     uint64_t Imm = MO.isImm() ? MO.getImm() : 0;
 133     OSE.write<uint8_t>(0);
 134     OSE.write<uint8_t>(0);
 135     OSE.write<uint16_t>(0);
 136     OSE.write<uint32_t>(Imm >> 32);
 137   } else {
 138     // Get instruction encoding and emit it
 139     uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
 140     CB.push_back(Value >> 56);
 141     if (IsLittleEndian)
 142       CB.push_back(char((Value >> 48) & 0xff));
 143     else
 144       CB.push_back(SwapBits((Value >> 48) & 0xff));
 145     OSE.write<uint16_t>((Value >> 32) & 0xffff);
 146     OSE.write<uint32_t>(Value & 0xffffFFFF);
 147   }
 148 }
 149
 150 // Encode BPF Memory Operand
 151 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op,
 152                                             SmallVectorImpl<MCFixup> &Fixups,
 153                                             const MCSubtargetInfo &STI) const {
 154   // For CMPXCHG instructions, output is implicitly in R0/W0,
 155   // so memory operand starts from operand 0.
 156   int MemOpStartIndex = 1, Opcode = MI.getOpcode();
 157   if (Opcode == BPF::CMPXCHGW32 || Opcode == BPF::CMPXCHGD)
 158     MemOpStartIndex = 0;
 159
 160   uint64_t Encoding;
 161   const MCOperand Op1 = MI.getOperand(MemOpStartIndex);
 162   assert(Op1.isReg() && "First operand is not register.");
 163   Encoding = MRI.getEncodingValue(Op1.getReg());
 164   Encoding <<= 16;
 165   MCOperand Op2 = MI.getOperand(MemOpStartIndex + 1);
 166   assert(Op2.isImm() && "Second operand is not immediate.");
 167   Encoding |= Op2.getImm() & 0xffff;
 168   return Encoding;
 169 }
 170
 171 #include "BPFGenMCCodeEmitter.inc"