1 //===- HexagonBlockRanges.h -------------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H
10 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H
12 #include "llvm/ADT/BitVector.h"
13 #include "llvm/CodeGen/Register.h"
22 class HexagonSubtarget
;
23 class MachineBasicBlock
;
24 class MachineFunction
;
26 class MachineRegisterInfo
;
28 class TargetInstrInfo
;
29 class TargetRegisterInfo
;
31 struct HexagonBlockRanges
{
32 HexagonBlockRanges(MachineFunction
&MF
);
34 // FIXME: Consolidate duplicate definitions of RegisterRef
39 bool operator<(RegisterRef R
) const {
40 return Reg
< R
.Reg
|| (Reg
== R
.Reg
&& Sub
< R
.Sub
);
43 using RegisterSet
= std::set
<RegisterRef
>;
45 // This is to represent an "index", which is an abstraction of a position
46 // of an instruction within a basic block.
53 First
= 11 // 10th + 1st
57 IndexType(unsigned Idx
) : Index(Idx
) {}
59 static bool isInstr(IndexType X
) { return X
.Index
>= First
; }
61 operator unsigned() const;
62 bool operator== (unsigned x
) const;
63 bool operator== (IndexType Idx
) const;
64 bool operator!= (unsigned x
) const;
65 bool operator!= (IndexType Idx
) const;
66 IndexType
operator++ ();
67 bool operator< (unsigned Idx
) const;
68 bool operator< (IndexType Idx
) const;
69 bool operator<= (IndexType Idx
) const;
72 bool operator> (IndexType Idx
) const;
73 bool operator>= (IndexType Idx
) const;
75 unsigned Index
= None
;
78 // A range of indices, essentially a representation of a live range.
79 // This is also used to represent "dead ranges", i.e. ranges where a
81 class IndexRange
: public std::pair
<IndexType
,IndexType
> {
83 IndexRange() = default;
84 IndexRange(IndexType Start
, IndexType End
, bool F
= false, bool T
= false)
85 : std::pair
<IndexType
,IndexType
>(Start
, End
), Fixed(F
), TiedEnd(T
) {}
87 IndexType
start() const { return first
; }
88 IndexType
end() const { return second
; }
90 bool operator< (const IndexRange
&A
) const {
91 return start() < A
.start();
94 bool overlaps(const IndexRange
&A
) const;
95 bool contains(const IndexRange
&A
) const;
96 void merge(const IndexRange
&A
);
98 bool Fixed
= false; // Can be renamed? "Fixed" means "no".
99 bool TiedEnd
= false; // The end is not a use, but a dead def tied to a use.
102 void setStart(const IndexType
&S
) { first
= S
; }
103 void setEnd(const IndexType
&E
) { second
= E
; }
106 // A list of index ranges. This represents liveness of a register
108 class RangeList
: public std::vector
<IndexRange
> {
110 void add(IndexType Start
, IndexType End
, bool Fixed
, bool TiedEnd
) {
111 push_back(IndexRange(Start
, End
, Fixed
, TiedEnd
));
113 void add(const IndexRange
&Range
) {
117 void include(const RangeList
&RL
);
118 void unionize(bool MergeAdjacent
= false);
119 void subtract(const IndexRange
&Range
);
122 void addsub(const IndexRange
&A
, const IndexRange
&B
);
125 class InstrIndexMap
{
127 InstrIndexMap(MachineBasicBlock
&B
);
129 MachineInstr
*getInstr(IndexType Idx
) const;
130 IndexType
getIndex(MachineInstr
*MI
) const;
131 MachineBasicBlock
&getBlock() const { return Block
; }
132 IndexType
getPrevIndex(IndexType Idx
) const;
133 IndexType
getNextIndex(IndexType Idx
) const;
134 void replaceInstr(MachineInstr
*OldMI
, MachineInstr
*NewMI
);
136 friend raw_ostream
&operator<< (raw_ostream
&OS
, const InstrIndexMap
&Map
);
138 IndexType First
, Last
;
141 MachineBasicBlock
&Block
;
142 std::map
<IndexType
,MachineInstr
*> Map
;
145 using RegToRangeMap
= std::map
<RegisterRef
, RangeList
>;
147 RegToRangeMap
computeLiveMap(InstrIndexMap
&IndexMap
);
148 RegToRangeMap
computeDeadMap(InstrIndexMap
&IndexMap
, RegToRangeMap
&LiveMap
);
149 static RegisterSet
expandToSubRegs(RegisterRef R
,
150 const MachineRegisterInfo
&MRI
, const TargetRegisterInfo
&TRI
);
152 struct PrintRangeMap
{
153 PrintRangeMap(const RegToRangeMap
&M
, const TargetRegisterInfo
&I
)
156 friend raw_ostream
&operator<< (raw_ostream
&OS
, const PrintRangeMap
&P
);
159 const RegToRangeMap
&Map
;
160 const TargetRegisterInfo
&TRI
;
164 RegisterSet
getLiveIns(const MachineBasicBlock
&B
,
165 const MachineRegisterInfo
&MRI
, const TargetRegisterInfo
&TRI
);
167 void computeInitialLiveRanges(InstrIndexMap
&IndexMap
,
168 RegToRangeMap
&LiveMap
);
171 const HexagonSubtarget
&HST
;
172 const TargetInstrInfo
&TII
;
173 const TargetRegisterInfo
&TRI
;
177 inline HexagonBlockRanges::IndexType::operator unsigned() const {
178 assert(Index
>= First
);
182 inline bool HexagonBlockRanges::IndexType::operator== (unsigned x
) const {
186 inline bool HexagonBlockRanges::IndexType::operator== (IndexType Idx
) const {
187 return Index
== Idx
.Index
;
190 inline bool HexagonBlockRanges::IndexType::operator!= (unsigned x
) const {
194 inline bool HexagonBlockRanges::IndexType::operator!= (IndexType Idx
) const {
195 return Index
!= Idx
.Index
;
199 HexagonBlockRanges::IndexType
HexagonBlockRanges::IndexType::operator++ () {
200 assert(Index
!= None
);
201 assert(Index
!= Exit
);
209 inline bool HexagonBlockRanges::IndexType::operator< (unsigned Idx
) const {
210 return operator< (IndexType(Idx
));
213 inline bool HexagonBlockRanges::IndexType::operator< (IndexType Idx
) const {
215 if (Index
== Idx
.Index
)
217 // !(None < x) for all x.
218 // !(x < None) for all x.
219 if (Index
== None
|| Idx
.Index
== None
)
221 // !(Exit < x) for all x.
222 // !(x < Entry) for all x.
223 if (Index
== Exit
|| Idx
.Index
== Entry
)
225 // Entry < x for all x != Entry.
226 // x < Exit for all x != Exit.
227 if (Index
== Entry
|| Idx
.Index
== Exit
)
230 return Index
< Idx
.Index
;
233 inline bool HexagonBlockRanges::IndexType::operator<= (IndexType Idx
) const {
234 return operator==(Idx
) || operator<(Idx
);
237 raw_ostream
&operator<< (raw_ostream
&OS
, HexagonBlockRanges::IndexType Idx
);
238 raw_ostream
&operator<< (raw_ostream
&OS
,
239 const HexagonBlockRanges::IndexRange
&IR
);
240 raw_ostream
&operator<< (raw_ostream
&OS
,
241 const HexagonBlockRanges::RangeList
&RL
);
242 raw_ostream
&operator<< (raw_ostream
&OS
,
243 const HexagonBlockRanges::InstrIndexMap
&M
);
244 raw_ostream
&operator<< (raw_ostream
&OS
,
245 const HexagonBlockRanges::PrintRangeMap
&P
);
247 } // end namespace llvm
249 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBLOCKRANGES_H