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[llvm-project.git] / llvm / lib / Target / Mips / MCTargetDesc / MipsELFObjectWriter.cpp
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1 //===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "MCTargetDesc/MipsFixupKinds.h"
10 #include "MCTargetDesc/MipsMCTargetDesc.h"
11 #include "llvm/ADT/STLExtras.h"
12 #include "llvm/BinaryFormat/ELF.h"
13 #include "llvm/MC/MCContext.h"
14 #include "llvm/MC/MCELFObjectWriter.h"
15 #include "llvm/MC/MCFixup.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCSymbolELF.h"
18 #include "llvm/Support/Casting.h"
19 #include "llvm/Support/Compiler.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/MathExtras.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include <cassert>
25 #include <cstdint>
26 #include <iterator>
27 #include <list>
28 #include <utility>
30 #define DEBUG_TYPE "mips-elf-object-writer"
32 using namespace llvm;
34 namespace {
36 /// Holds additional information needed by the relocation ordering algorithm.
37 struct MipsRelocationEntry {
38 const ELFRelocationEntry R; ///< The relocation.
39 bool Matched = false; ///< Is this relocation part of a match.
41 MipsRelocationEntry(const ELFRelocationEntry &R) : R(R) {}
44 class MipsELFObjectWriter : public MCELFObjectTargetWriter {
45 public:
46 MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64);
48 ~MipsELFObjectWriter() override = default;
50 unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
51 const MCFixup &Fixup, bool IsPCRel) const override;
52 bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym,
53 unsigned Type) const override;
54 void sortRelocs(const MCAssembler &Asm,
55 std::vector<ELFRelocationEntry> &Relocs) override;
58 /// The possible results of the Predicate function used by find_best.
59 enum FindBestPredicateResult {
60 FindBest_NoMatch = 0, ///< The current element is not a match.
61 FindBest_Match, ///< The current element is a match but better ones are
62 /// possible.
63 FindBest_PerfectMatch, ///< The current element is an unbeatable match.
66 } // end anonymous namespace
68 /// Copy elements in the range [First, Last) to d1 when the predicate is true or
69 /// d2 when the predicate is false. This is essentially both std::copy_if and
70 /// std::remove_copy_if combined into a single pass.
71 template <class InputIt, class OutputIt1, class OutputIt2, class UnaryPredicate>
72 static std::pair<OutputIt1, OutputIt2> copy_if_else(InputIt First, InputIt Last,
73 OutputIt1 d1, OutputIt2 d2,
74 UnaryPredicate Predicate) {
75 for (InputIt I = First; I != Last; ++I) {
76 if (Predicate(*I)) {
77 *d1 = *I;
78 d1++;
79 } else {
80 *d2 = *I;
81 d2++;
85 return std::make_pair(d1, d2);
88 /// Find the best match in the range [First, Last).
89 ///
90 /// An element matches when Predicate(X) returns FindBest_Match or
91 /// FindBest_PerfectMatch. A value of FindBest_PerfectMatch also terminates
92 /// the search. BetterThan(A, B) is a comparator that returns true when A is a
93 /// better match than B. The return value is the position of the best match.
94 ///
95 /// This is similar to std::find_if but finds the best of multiple possible
96 /// matches.
97 template <class InputIt, class UnaryPredicate, class Comparator>
98 static InputIt find_best(InputIt First, InputIt Last, UnaryPredicate Predicate,
99 Comparator BetterThan) {
100 InputIt Best = Last;
102 for (InputIt I = First; I != Last; ++I) {
103 unsigned Matched = Predicate(*I);
104 if (Matched != FindBest_NoMatch) {
105 if (Best == Last || BetterThan(*I, *Best))
106 Best = I;
108 if (Matched == FindBest_PerfectMatch)
109 break;
112 return Best;
115 /// Determine the low relocation that matches the given relocation.
116 /// If the relocation does not need a low relocation then the return value
117 /// is ELF::R_MIPS_NONE.
119 /// The relocations that need a matching low part are
120 /// R_(MIPS|MICROMIPS|MIPS16)_HI16 for all symbols and
121 /// R_(MIPS|MICROMIPS|MIPS16)_GOT16 for local symbols only.
122 static unsigned getMatchingLoType(const ELFRelocationEntry &Reloc) {
123 unsigned Type = Reloc.Type;
124 if (Type == ELF::R_MIPS_HI16)
125 return ELF::R_MIPS_LO16;
126 if (Type == ELF::R_MICROMIPS_HI16)
127 return ELF::R_MICROMIPS_LO16;
128 if (Type == ELF::R_MIPS16_HI16)
129 return ELF::R_MIPS16_LO16;
131 if (Reloc.Symbol && Reloc.Symbol->getBinding() != ELF::STB_LOCAL)
132 return ELF::R_MIPS_NONE;
134 if (Type == ELF::R_MIPS_GOT16)
135 return ELF::R_MIPS_LO16;
136 if (Type == ELF::R_MICROMIPS_GOT16)
137 return ELF::R_MICROMIPS_LO16;
138 if (Type == ELF::R_MIPS16_GOT16)
139 return ELF::R_MIPS16_LO16;
141 return ELF::R_MIPS_NONE;
144 // Determine whether a relocation X is a low-part and matches the high-part R
145 // perfectly by symbol and addend.
146 static bool isMatchingReloc(unsigned MatchingType, const ELFRelocationEntry &R,
147 const ELFRelocationEntry &X) {
148 return X.Type == MatchingType && X.Symbol == R.Symbol && X.Addend == R.Addend;
151 MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI,
152 bool HasRelocationAddend, bool Is64)
153 : MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {}
155 unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
156 const MCValue &Target,
157 const MCFixup &Fixup,
158 bool IsPCRel) const {
159 // Determine the type of the relocation.
160 unsigned Kind = Fixup.getTargetKind();
161 if (Kind >= FirstLiteralRelocationKind)
162 return Kind - FirstLiteralRelocationKind;
164 switch (Kind) {
165 case FK_NONE:
166 return ELF::R_MIPS_NONE;
167 case FK_Data_1:
168 Ctx.reportError(Fixup.getLoc(),
169 "MIPS does not support one byte relocations");
170 return ELF::R_MIPS_NONE;
171 case Mips::fixup_Mips_16:
172 case FK_Data_2:
173 return IsPCRel ? ELF::R_MIPS_PC16 : ELF::R_MIPS_16;
174 case Mips::fixup_Mips_32:
175 case FK_Data_4:
176 return IsPCRel ? ELF::R_MIPS_PC32 : ELF::R_MIPS_32;
177 case Mips::fixup_Mips_64:
178 case FK_Data_8:
179 return IsPCRel
180 ? setRTypes(ELF::R_MIPS_PC32, ELF::R_MIPS_64, ELF::R_MIPS_NONE)
181 : (unsigned)ELF::R_MIPS_64;
184 if (IsPCRel) {
185 switch (Kind) {
186 case Mips::fixup_Mips_Branch_PCRel:
187 case Mips::fixup_Mips_PC16:
188 return ELF::R_MIPS_PC16;
189 case Mips::fixup_MICROMIPS_PC7_S1:
190 return ELF::R_MICROMIPS_PC7_S1;
191 case Mips::fixup_MICROMIPS_PC10_S1:
192 return ELF::R_MICROMIPS_PC10_S1;
193 case Mips::fixup_MICROMIPS_PC16_S1:
194 return ELF::R_MICROMIPS_PC16_S1;
195 case Mips::fixup_MICROMIPS_PC26_S1:
196 return ELF::R_MICROMIPS_PC26_S1;
197 case Mips::fixup_MICROMIPS_PC19_S2:
198 return ELF::R_MICROMIPS_PC19_S2;
199 case Mips::fixup_MICROMIPS_PC18_S3:
200 return ELF::R_MICROMIPS_PC18_S3;
201 case Mips::fixup_MICROMIPS_PC21_S1:
202 return ELF::R_MICROMIPS_PC21_S1;
203 case Mips::fixup_MIPS_PC19_S2:
204 return ELF::R_MIPS_PC19_S2;
205 case Mips::fixup_MIPS_PC18_S3:
206 return ELF::R_MIPS_PC18_S3;
207 case Mips::fixup_MIPS_PC21_S2:
208 return ELF::R_MIPS_PC21_S2;
209 case Mips::fixup_MIPS_PC26_S2:
210 return ELF::R_MIPS_PC26_S2;
211 case Mips::fixup_MIPS_PCHI16:
212 return ELF::R_MIPS_PCHI16;
213 case Mips::fixup_MIPS_PCLO16:
214 return ELF::R_MIPS_PCLO16;
217 llvm_unreachable("invalid PC-relative fixup kind!");
220 switch (Kind) {
221 case FK_DTPRel_4:
222 return ELF::R_MIPS_TLS_DTPREL32;
223 case FK_DTPRel_8:
224 return ELF::R_MIPS_TLS_DTPREL64;
225 case FK_TPRel_4:
226 return ELF::R_MIPS_TLS_TPREL32;
227 case FK_TPRel_8:
228 return ELF::R_MIPS_TLS_TPREL64;
229 case FK_GPRel_4:
230 return setRTypes(ELF::R_MIPS_GPREL32,
231 is64Bit() ? ELF::R_MIPS_64 : ELF::R_MIPS_NONE,
232 ELF::R_MIPS_NONE);
233 case Mips::fixup_Mips_GPREL16:
234 return ELF::R_MIPS_GPREL16;
235 case Mips::fixup_Mips_26:
236 return ELF::R_MIPS_26;
237 case Mips::fixup_Mips_CALL16:
238 return ELF::R_MIPS_CALL16;
239 case Mips::fixup_Mips_GOT:
240 return ELF::R_MIPS_GOT16;
241 case Mips::fixup_Mips_HI16:
242 return ELF::R_MIPS_HI16;
243 case Mips::fixup_Mips_LO16:
244 return ELF::R_MIPS_LO16;
245 case Mips::fixup_Mips_TLSGD:
246 return ELF::R_MIPS_TLS_GD;
247 case Mips::fixup_Mips_GOTTPREL:
248 return ELF::R_MIPS_TLS_GOTTPREL;
249 case Mips::fixup_Mips_TPREL_HI:
250 return ELF::R_MIPS_TLS_TPREL_HI16;
251 case Mips::fixup_Mips_TPREL_LO:
252 return ELF::R_MIPS_TLS_TPREL_LO16;
253 case Mips::fixup_Mips_TLSLDM:
254 return ELF::R_MIPS_TLS_LDM;
255 case Mips::fixup_Mips_DTPREL_HI:
256 return ELF::R_MIPS_TLS_DTPREL_HI16;
257 case Mips::fixup_Mips_DTPREL_LO:
258 return ELF::R_MIPS_TLS_DTPREL_LO16;
259 case Mips::fixup_Mips_GOT_PAGE:
260 return ELF::R_MIPS_GOT_PAGE;
261 case Mips::fixup_Mips_GOT_OFST:
262 return ELF::R_MIPS_GOT_OFST;
263 case Mips::fixup_Mips_GOT_DISP:
264 return ELF::R_MIPS_GOT_DISP;
265 case Mips::fixup_Mips_GPOFF_HI:
266 return setRTypes(ELF::R_MIPS_GPREL16, ELF::R_MIPS_SUB, ELF::R_MIPS_HI16);
267 case Mips::fixup_MICROMIPS_GPOFF_HI:
268 return setRTypes(ELF::R_MICROMIPS_GPREL16, ELF::R_MICROMIPS_SUB,
269 ELF::R_MICROMIPS_HI16);
270 case Mips::fixup_Mips_GPOFF_LO:
271 return setRTypes(ELF::R_MIPS_GPREL16, ELF::R_MIPS_SUB, ELF::R_MIPS_LO16);
272 case Mips::fixup_MICROMIPS_GPOFF_LO:
273 return setRTypes(ELF::R_MICROMIPS_GPREL16, ELF::R_MICROMIPS_SUB,
274 ELF::R_MICROMIPS_LO16);
275 case Mips::fixup_Mips_HIGHER:
276 return ELF::R_MIPS_HIGHER;
277 case Mips::fixup_Mips_HIGHEST:
278 return ELF::R_MIPS_HIGHEST;
279 case Mips::fixup_Mips_SUB:
280 return ELF::R_MIPS_SUB;
281 case Mips::fixup_Mips_GOT_HI16:
282 return ELF::R_MIPS_GOT_HI16;
283 case Mips::fixup_Mips_GOT_LO16:
284 return ELF::R_MIPS_GOT_LO16;
285 case Mips::fixup_Mips_CALL_HI16:
286 return ELF::R_MIPS_CALL_HI16;
287 case Mips::fixup_Mips_CALL_LO16:
288 return ELF::R_MIPS_CALL_LO16;
289 case Mips::fixup_MICROMIPS_26_S1:
290 return ELF::R_MICROMIPS_26_S1;
291 case Mips::fixup_MICROMIPS_HI16:
292 return ELF::R_MICROMIPS_HI16;
293 case Mips::fixup_MICROMIPS_LO16:
294 return ELF::R_MICROMIPS_LO16;
295 case Mips::fixup_MICROMIPS_GOT16:
296 return ELF::R_MICROMIPS_GOT16;
297 case Mips::fixup_MICROMIPS_CALL16:
298 return ELF::R_MICROMIPS_CALL16;
299 case Mips::fixup_MICROMIPS_GOT_DISP:
300 return ELF::R_MICROMIPS_GOT_DISP;
301 case Mips::fixup_MICROMIPS_GOT_PAGE:
302 return ELF::R_MICROMIPS_GOT_PAGE;
303 case Mips::fixup_MICROMIPS_GOT_OFST:
304 return ELF::R_MICROMIPS_GOT_OFST;
305 case Mips::fixup_MICROMIPS_TLS_GD:
306 return ELF::R_MICROMIPS_TLS_GD;
307 case Mips::fixup_MICROMIPS_TLS_LDM:
308 return ELF::R_MICROMIPS_TLS_LDM;
309 case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16:
310 return ELF::R_MICROMIPS_TLS_DTPREL_HI16;
311 case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16:
312 return ELF::R_MICROMIPS_TLS_DTPREL_LO16;
313 case Mips::fixup_MICROMIPS_GOTTPREL:
314 return ELF::R_MICROMIPS_TLS_GOTTPREL;
315 case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
316 return ELF::R_MICROMIPS_TLS_TPREL_HI16;
317 case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
318 return ELF::R_MICROMIPS_TLS_TPREL_LO16;
319 case Mips::fixup_MICROMIPS_SUB:
320 return ELF::R_MICROMIPS_SUB;
321 case Mips::fixup_MICROMIPS_HIGHER:
322 return ELF::R_MICROMIPS_HIGHER;
323 case Mips::fixup_MICROMIPS_HIGHEST:
324 return ELF::R_MICROMIPS_HIGHEST;
325 case Mips::fixup_Mips_JALR:
326 return ELF::R_MIPS_JALR;
327 case Mips::fixup_MICROMIPS_JALR:
328 return ELF::R_MICROMIPS_JALR;
331 llvm_unreachable("invalid fixup kind!");
334 /// Sort relocation table entries by offset except where another order is
335 /// required by the MIPS ABI.
337 /// MIPS has a few relocations that have an AHL component in the expression used
338 /// to evaluate them. This AHL component is an addend with the same number of
339 /// bits as a symbol value but not all of our ABI's are able to supply a
340 /// sufficiently sized addend in a single relocation.
342 /// The O32 ABI for example, uses REL relocations which store the addend in the
343 /// section data. All the relocations with AHL components affect 16-bit fields
344 /// so the addend for a single relocation is limited to 16-bit. This ABI
345 /// resolves the limitation by linking relocations (e.g. R_MIPS_HI16 and
346 /// R_MIPS_LO16) and distributing the addend between the linked relocations. The
347 /// ABI mandates that such relocations must be next to each other in a
348 /// particular order (e.g. R_MIPS_HI16 must be immediately followed by a
349 /// matching R_MIPS_LO16) but the rule is less strict in practice.
351 /// The de facto standard is lenient in the following ways:
352 /// - 'Immediately following' does not refer to the next relocation entry but
353 /// the next matching relocation.
354 /// - There may be multiple high parts relocations for one low part relocation.
355 /// - There may be multiple low part relocations for one high part relocation.
356 /// - The AHL addend in each part does not have to be exactly equal as long as
357 /// the difference does not affect the carry bit from bit 15 into 16. This is
358 /// to allow, for example, the use of %lo(foo) and %lo(foo+4) when loading
359 /// both halves of a long long.
361 /// See getMatchingLoType() for a description of which high part relocations
362 /// match which low part relocations. One particular thing to note is that
363 /// R_MIPS_GOT16 and similar only have AHL addends if they refer to local
364 /// symbols.
366 /// It should also be noted that this function is not affected by whether
367 /// the symbol was kept or rewritten into a section-relative equivalent. We
368 /// always match using the expressions from the source.
369 void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm,
370 std::vector<ELFRelocationEntry> &Relocs) {
371 // We do not need to sort the relocation table for RELA relocations which
372 // N32/N64 uses as the relocation addend contains the value we require,
373 // rather than it being split across a pair of relocations.
374 if (hasRelocationAddend())
375 return;
377 // Sort relocations by the address they are applied to.
378 llvm::sort(Relocs,
379 [](const ELFRelocationEntry &A, const ELFRelocationEntry &B) {
380 return A.Offset < B.Offset;
383 // Place relocations in a list for reorder convenience. Hi16 contains the
384 // iterators of high-part relocations.
385 std::list<MipsRelocationEntry> Sorted;
386 SmallVector<std::list<MipsRelocationEntry>::iterator, 0> Hi16;
387 for (auto &R : Relocs) {
388 Sorted.push_back(R);
389 if (getMatchingLoType(R) != ELF::R_MIPS_NONE)
390 Hi16.push_back(std::prev(Sorted.end()));
393 for (auto I : Hi16) {
394 auto &R = I->R;
395 unsigned MatchingType = getMatchingLoType(R);
396 // If the next relocation is a perfect match, continue;
397 if (std::next(I) != Sorted.end() &&
398 isMatchingReloc(MatchingType, R, std::next(I)->R))
399 continue;
400 // Otherwise, find the best matching low-part relocation with the following
401 // criteria. It must have the same symbol and its addend is no lower than
402 // that of the current high-part.
404 // (1) %lo with a smaller offset is preferred.
405 // (2) %lo with the same offset that is unmatched is preferred.
406 // (3) later %lo is preferred.
407 auto Best = Sorted.end();
408 for (auto J = Sorted.begin(); J != Sorted.end(); ++J) {
409 auto &R1 = J->R;
410 if (R1.Type == MatchingType && R.Symbol == R1.Symbol &&
411 R.Addend <= R1.Addend &&
412 (Best == Sorted.end() || R1.Addend < Best->R.Addend ||
413 (!Best->Matched && R1.Addend == Best->R.Addend)))
414 Best = J;
416 if (Best != Sorted.end() && R.Addend == Best->R.Addend)
417 Best->Matched = true;
419 // Move the high-part before the low-part, or if not found, the end of the
420 // list. The unmatched high-part will lead to a linker warning/error.
421 Sorted.splice(Best, Sorted, I);
424 assert(Relocs.size() == Sorted.size() && "Some relocs were not consumed");
426 // Overwrite the original vector with the sorted elements.
427 unsigned CopyTo = 0;
428 for (const auto &R : Sorted)
429 Relocs[CopyTo++] = R.R;
432 bool MipsELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
433 const MCSymbol &Sym,
434 unsigned Type) const {
435 // If it's a compound relocation for N64 then we need the relocation if any
436 // sub-relocation needs it.
437 if (!isUInt<8>(Type))
438 return needsRelocateWithSymbol(Val, Sym, Type & 0xff) ||
439 needsRelocateWithSymbol(Val, Sym, (Type >> 8) & 0xff) ||
440 needsRelocateWithSymbol(Val, Sym, (Type >> 16) & 0xff);
442 switch (Type) {
443 default:
444 errs() << Type << "\n";
445 llvm_unreachable("Unexpected relocation");
446 return true;
448 // This relocation doesn't affect the section data.
449 case ELF::R_MIPS_NONE:
450 return false;
452 // On REL ABI's (e.g. O32), these relocations form pairs. The pairing is done
453 // by the static linker by matching the symbol and offset.
454 // We only see one relocation at a time but it's still safe to relocate with
455 // the section so long as both relocations make the same decision.
457 // Some older linkers may require the symbol for particular cases. Such cases
458 // are not supported yet but can be added as required.
459 case ELF::R_MIPS_GOT16:
460 case ELF::R_MIPS16_GOT16:
461 case ELF::R_MICROMIPS_GOT16:
462 case ELF::R_MIPS_HIGHER:
463 case ELF::R_MIPS_HIGHEST:
464 case ELF::R_MIPS_HI16:
465 case ELF::R_MIPS16_HI16:
466 case ELF::R_MICROMIPS_HI16:
467 case ELF::R_MIPS_LO16:
468 case ELF::R_MIPS16_LO16:
469 case ELF::R_MICROMIPS_LO16:
470 // FIXME: It should be safe to return false for the STO_MIPS_MICROMIPS but
471 // we neglect to handle the adjustment to the LSB of the addend that
472 // it causes in applyFixup() and similar.
473 if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS)
474 return true;
475 return false;
477 case ELF::R_MIPS_GOT_PAGE:
478 case ELF::R_MICROMIPS_GOT_PAGE:
479 case ELF::R_MIPS_GOT_OFST:
480 case ELF::R_MICROMIPS_GOT_OFST:
481 case ELF::R_MIPS_16:
482 case ELF::R_MIPS_32:
483 case ELF::R_MIPS_GPREL32:
484 if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS)
485 return true;
486 [[fallthrough]];
487 case ELF::R_MIPS_26:
488 case ELF::R_MIPS_64:
489 case ELF::R_MIPS_GPREL16:
490 case ELF::R_MIPS_PC16:
491 case ELF::R_MIPS_SUB:
492 return false;
494 // FIXME: Many of these relocations should probably return false but this
495 // hasn't been confirmed to be safe yet.
496 case ELF::R_MIPS_REL32:
497 case ELF::R_MIPS_LITERAL:
498 case ELF::R_MIPS_CALL16:
499 case ELF::R_MIPS_SHIFT5:
500 case ELF::R_MIPS_SHIFT6:
501 case ELF::R_MIPS_GOT_DISP:
502 case ELF::R_MIPS_GOT_HI16:
503 case ELF::R_MIPS_GOT_LO16:
504 case ELF::R_MIPS_INSERT_A:
505 case ELF::R_MIPS_INSERT_B:
506 case ELF::R_MIPS_DELETE:
507 case ELF::R_MIPS_CALL_HI16:
508 case ELF::R_MIPS_CALL_LO16:
509 case ELF::R_MIPS_SCN_DISP:
510 case ELF::R_MIPS_REL16:
511 case ELF::R_MIPS_ADD_IMMEDIATE:
512 case ELF::R_MIPS_PJUMP:
513 case ELF::R_MIPS_RELGOT:
514 case ELF::R_MIPS_JALR:
515 case ELF::R_MIPS_TLS_DTPMOD32:
516 case ELF::R_MIPS_TLS_DTPREL32:
517 case ELF::R_MIPS_TLS_DTPMOD64:
518 case ELF::R_MIPS_TLS_DTPREL64:
519 case ELF::R_MIPS_TLS_GD:
520 case ELF::R_MIPS_TLS_LDM:
521 case ELF::R_MIPS_TLS_DTPREL_HI16:
522 case ELF::R_MIPS_TLS_DTPREL_LO16:
523 case ELF::R_MIPS_TLS_GOTTPREL:
524 case ELF::R_MIPS_TLS_TPREL32:
525 case ELF::R_MIPS_TLS_TPREL64:
526 case ELF::R_MIPS_TLS_TPREL_HI16:
527 case ELF::R_MIPS_TLS_TPREL_LO16:
528 case ELF::R_MIPS_GLOB_DAT:
529 case ELF::R_MIPS_PC21_S2:
530 case ELF::R_MIPS_PC26_S2:
531 case ELF::R_MIPS_PC18_S3:
532 case ELF::R_MIPS_PC19_S2:
533 case ELF::R_MIPS_PCHI16:
534 case ELF::R_MIPS_PCLO16:
535 case ELF::R_MIPS_COPY:
536 case ELF::R_MIPS_JUMP_SLOT:
537 case ELF::R_MIPS_NUM:
538 case ELF::R_MIPS_PC32:
539 case ELF::R_MIPS_EH:
540 case ELF::R_MICROMIPS_26_S1:
541 case ELF::R_MICROMIPS_GPREL16:
542 case ELF::R_MICROMIPS_LITERAL:
543 case ELF::R_MICROMIPS_PC7_S1:
544 case ELF::R_MICROMIPS_PC10_S1:
545 case ELF::R_MICROMIPS_PC16_S1:
546 case ELF::R_MICROMIPS_CALL16:
547 case ELF::R_MICROMIPS_GOT_DISP:
548 case ELF::R_MICROMIPS_GOT_HI16:
549 case ELF::R_MICROMIPS_GOT_LO16:
550 case ELF::R_MICROMIPS_SUB:
551 case ELF::R_MICROMIPS_HIGHER:
552 case ELF::R_MICROMIPS_HIGHEST:
553 case ELF::R_MICROMIPS_CALL_HI16:
554 case ELF::R_MICROMIPS_CALL_LO16:
555 case ELF::R_MICROMIPS_SCN_DISP:
556 case ELF::R_MICROMIPS_JALR:
557 case ELF::R_MICROMIPS_HI0_LO16:
558 case ELF::R_MICROMIPS_TLS_GD:
559 case ELF::R_MICROMIPS_TLS_LDM:
560 case ELF::R_MICROMIPS_TLS_DTPREL_HI16:
561 case ELF::R_MICROMIPS_TLS_DTPREL_LO16:
562 case ELF::R_MICROMIPS_TLS_GOTTPREL:
563 case ELF::R_MICROMIPS_TLS_TPREL_HI16:
564 case ELF::R_MICROMIPS_TLS_TPREL_LO16:
565 case ELF::R_MICROMIPS_GPREL7_S2:
566 case ELF::R_MICROMIPS_PC23_S2:
567 case ELF::R_MICROMIPS_PC21_S1:
568 case ELF::R_MICROMIPS_PC26_S1:
569 case ELF::R_MICROMIPS_PC18_S3:
570 case ELF::R_MICROMIPS_PC19_S2:
571 return true;
573 // FIXME: Many of these should probably return false but MIPS16 isn't
574 // supported by the integrated assembler.
575 case ELF::R_MIPS16_26:
576 case ELF::R_MIPS16_GPREL:
577 case ELF::R_MIPS16_CALL16:
578 case ELF::R_MIPS16_TLS_GD:
579 case ELF::R_MIPS16_TLS_LDM:
580 case ELF::R_MIPS16_TLS_DTPREL_HI16:
581 case ELF::R_MIPS16_TLS_DTPREL_LO16:
582 case ELF::R_MIPS16_TLS_GOTTPREL:
583 case ELF::R_MIPS16_TLS_TPREL_HI16:
584 case ELF::R_MIPS16_TLS_TPREL_LO16:
585 llvm_unreachable("Unsupported MIPS16 relocation");
586 return true;
590 std::unique_ptr<MCObjectTargetWriter>
591 llvm::createMipsELFObjectWriter(const Triple &TT, bool IsN32) {
592 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
593 bool IsN64 = TT.isArch64Bit() && !IsN32;
594 bool HasRelocationAddend = TT.isArch64Bit();
595 return std::make_unique<MipsELFObjectWriter>(OSABI, HasRelocationAddend,
596 IsN64);