1 //=- Mips32r6InstrFormats.td - Mips32r6 Instruction Formats -*- tablegen -*-==//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file describes Mips32r6 instruction formats.
11 //===----------------------------------------------------------------------===//
15 def MipsR62MicroMipsR6 : InstrMapping {
16 let FilterClass = "R6MMR6Rel";
17 // Instructions with the same BaseOpcode and isNVStore values form a row.
18 let RowFields = ["BaseOpcode"];
19 // Instructions with the same predicate sense form a column.
20 let ColFields = ["Arch"];
21 // The key column is the unpredicated instructions.
22 let KeyCol = ["mipsr6"];
23 // Value columns are PredSense=true and PredSense=false
24 let ValueCols = [["mipsr6"], ["micromipsr6"]];
27 class MipsR6Arch<string opstr> {
28 string Arch = "mipsr6";
29 string BaseOpcode = opstr;
32 class MipsR6Inst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
33 let DecoderNamespace = "Mips32r6_64r6";
34 let EncodingPredicates = [HasStdEnc];
37 //===----------------------------------------------------------------------===//
41 //===----------------------------------------------------------------------===//
43 class OPGROUP<bits<6> Val> {
46 def OPGROUP_COP0 : OPGROUP<0b010000>;
47 def OPGROUP_COP1 : OPGROUP<0b010001>;
48 def OPGROUP_COP2 : OPGROUP<0b010010>;
49 def OPGROUP_ADDI : OPGROUP<0b001000>;
50 def OPGROUP_AUI : OPGROUP<0b001111>;
51 def OPGROUP_BLEZ : OPGROUP<0b000110>;
52 def OPGROUP_BGTZ : OPGROUP<0b000111>;
53 def OPGROUP_BLEZL : OPGROUP<0b010110>;
54 def OPGROUP_BGTZL : OPGROUP<0b010111>;
55 def OPGROUP_DADDI : OPGROUP<0b011000>;
56 def OPGROUP_DAUI : OPGROUP<0b011101>;
57 def OPGROUP_PCREL : OPGROUP<0b111011>;
58 def OPGROUP_REGIMM : OPGROUP<0b000001>;
59 def OPGROUP_SPECIAL : OPGROUP<0b000000>;
60 // The spec occasionally names this value LL, LLD, SC, or SCD.
61 def OPGROUP_SPECIAL3 : OPGROUP<0b011111>;
62 // The spec names this constant LWC2, LDC2, SWC2, and SDC2 in different places.
63 def OPGROUP_COP2LDST : OPGROUP<0b010010>;
65 class OPCODE2<bits<2> Val> {
68 def OPCODE2_ADDIUPC : OPCODE2<0b00>;
69 def OPCODE2_LWPC : OPCODE2<0b01>;
70 def OPCODE2_LWUPC : OPCODE2<0b10>;
72 class OPCODE3<bits<3> Val> {
75 def OPCODE3_LDPC : OPCODE3<0b110>;
77 class OPCODE5<bits<5> Val> {
80 def OPCODE5_ALUIPC : OPCODE5<0b11111>;
81 def OPCODE5_AUIPC : OPCODE5<0b11110>;
82 def OPCODE5_DAHI : OPCODE5<0b00110>;
83 def OPCODE5_DATI : OPCODE5<0b11110>;
84 def OPCODE5_BC1EQZ : OPCODE5<0b01001>;
85 def OPCODE5_BC1NEZ : OPCODE5<0b01101>;
86 def OPCODE5_BC2EQZ : OPCODE5<0b01001>;
87 def OPCODE5_BC2NEZ : OPCODE5<0b01101>;
88 def OPCODE5_BGEZAL : OPCODE5<0b10001>;
89 def OPCODE5_NAL : OPCODE5<0b10000>;
90 def OPCODE5_SIGRIE : OPCODE5<0b10111>;
91 // The next four constants are unnamed in the spec. These names are taken from
92 // the OPGROUP names they are used with.
93 def OPCODE5_LDC2 : OPCODE5<0b01110>;
94 def OPCODE5_LWC2 : OPCODE5<0b01010>;
95 def OPCODE5_SDC2 : OPCODE5<0b01111>;
96 def OPCODE5_SWC2 : OPCODE5<0b01011>;
98 class OPCODE6<bits<6> Val> {
101 def OPCODE6_ALIGN : OPCODE6<0b100000>;
102 def OPCODE6_DALIGN : OPCODE6<0b100100>;
103 def OPCODE6_BITSWAP : OPCODE6<0b100000>;
104 def OPCODE6_DBITSWAP : OPCODE6<0b100100>;
105 def OPCODE6_JALR : OPCODE6<0b001001>;
106 def OPCODE6_CACHE : OPCODE6<0b100101>;
107 def OPCODE6_PREF : OPCODE6<0b110101>;
108 // The next four constants are unnamed in the spec. These names are taken from
109 // the OPGROUP names they are used with.
110 def OPCODE6_LL : OPCODE6<0b110110>;
111 def OPCODE6_LLD : OPCODE6<0b110111>;
112 def OPCODE6_SC : OPCODE6<0b100110>;
113 def OPCODE6_SCD : OPCODE6<0b100111>;
114 def OPCODE6_CLO : OPCODE6<0b010001>;
115 def OPCODE6_CLZ : OPCODE6<0b010000>;
116 def OPCODE6_DCLO : OPCODE6<0b010011>;
117 def OPCODE6_DCLZ : OPCODE6<0b010010>;
118 def OPCODE6_LSA : OPCODE6<0b000101>;
119 def OPCODE6_DLSA : OPCODE6<0b010101>;
120 def OPCODE6_SDBBP : OPCODE6<0b001110>;
122 class FIELD_FMT<bits<5> Val> {
125 def FIELD_FMT_S : FIELD_FMT<0b10000>;
126 def FIELD_FMT_D : FIELD_FMT<0b10001>;
128 class FIELD_CMP_COND<bits<5> Val> {
131 // Note: The CMP_COND_FMT names differ from the C_COND_FMT names.
132 def FIELD_CMP_COND_AF : FIELD_CMP_COND<0b00000>;
133 def FIELD_CMP_COND_UN : FIELD_CMP_COND<0b00001>;
134 def FIELD_CMP_COND_EQ : FIELD_CMP_COND<0b00010>;
135 def FIELD_CMP_COND_UEQ : FIELD_CMP_COND<0b00011>;
136 def FIELD_CMP_COND_LT : FIELD_CMP_COND<0b00100>;
137 def FIELD_CMP_COND_ULT : FIELD_CMP_COND<0b00101>;
138 def FIELD_CMP_COND_LE : FIELD_CMP_COND<0b00110>;
139 def FIELD_CMP_COND_ULE : FIELD_CMP_COND<0b00111>;
140 def FIELD_CMP_COND_SAF : FIELD_CMP_COND<0b01000>;
141 def FIELD_CMP_COND_SUN : FIELD_CMP_COND<0b01001>;
142 def FIELD_CMP_COND_SEQ : FIELD_CMP_COND<0b01010>;
143 def FIELD_CMP_COND_SUEQ : FIELD_CMP_COND<0b01011>;
144 def FIELD_CMP_COND_SLT : FIELD_CMP_COND<0b01100>;
145 def FIELD_CMP_COND_SULT : FIELD_CMP_COND<0b01101>;
146 def FIELD_CMP_COND_SLE : FIELD_CMP_COND<0b01110>;
147 def FIELD_CMP_COND_SULE : FIELD_CMP_COND<0b01111>;
149 class FIELD_CMP_FORMAT<bits<5> Val> {
152 def FIELD_CMP_FORMAT_S : FIELD_CMP_FORMAT<0b10100>;
153 def FIELD_CMP_FORMAT_D : FIELD_CMP_FORMAT<0b10101>;
155 //===----------------------------------------------------------------------===//
159 //===----------------------------------------------------------------------===//
161 // Some encodings are ambiguous except by comparing field values.
163 class DecodeDisambiguates<string Name> {
164 string DecoderMethod = !strconcat("Decode", Name);
167 class DecodeDisambiguatedBy<string Name> : DecodeDisambiguates<Name> {
168 string DecoderNamespace = "Mips32r6_64r6_Ambiguous";
171 //===----------------------------------------------------------------------===//
175 //===----------------------------------------------------------------------===//
177 class AUI_FM : MipsR6Inst {
184 let Inst{31-26} = OPGROUP_AUI.Value;
185 let Inst{25-21} = rs;
186 let Inst{20-16} = rt;
187 let Inst{15-0} = imm;
190 class DAUI_FM : AUI_FM {
191 let Inst{31-26} = OPGROUP_DAUI.Value;
194 class BAL_FM : MipsR6Inst {
199 let Inst{31-26} = OPGROUP_REGIMM.Value;
200 let Inst{25-21} = 0b00000;
201 let Inst{20-16} = OPCODE5_BGEZAL.Value;
202 let Inst{15-0} = offset;
206 class NAL_FM : MipsR6Inst {
209 let Inst{31-26} = OPGROUP_REGIMM.Value;
210 let Inst{25-21} = 0b00000;
211 let Inst{20-16} = OPCODE5_NAL.Value;
212 let Inst{15-0} = 0x00;
215 class COP0_EVP_DVP_FM<bits<1> sc> : MipsR6Inst {
220 let Inst{31-26} = OPGROUP_COP0.Value;
221 let Inst{25-21} = 0b01011;
222 let Inst{20-16} = rt;
223 let Inst{15-11} = 0b00000;
224 let Inst{10-6} = 0b00000;
226 let Inst{4-3} = 0b00;
227 let Inst{2-0} = 0b100;
230 class COP1_2R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
236 let Inst{31-26} = OPGROUP_COP1.Value;
237 let Inst{25-21} = Format.Value;
238 let Inst{20-16} = 0b00000;
239 let Inst{15-11} = fs;
241 let Inst{5-0} = funct;
244 class COP1_3R_FM<bits<6> funct, FIELD_FMT Format> : MipsR6Inst {
251 let Inst{31-26} = OPGROUP_COP1.Value;
252 let Inst{25-21} = Format.Value;
253 let Inst{20-16} = ft;
254 let Inst{15-11} = fs;
256 let Inst{5-0} = funct;
259 class COP1_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
265 let Inst{31-26} = OPGROUP_COP1.Value;
266 let Inst{25-21} = Operation.Value;
267 let Inst{20-16} = ft;
268 let Inst{15-0} = offset;
271 class COP2_BCCZ_FM<OPCODE5 Operation> : MipsR6Inst {
277 let Inst{31-26} = OPGROUP_COP2.Value;
278 let Inst{25-21} = Operation.Value;
279 let Inst{20-16} = ct;
280 let Inst{15-0} = offset;
283 class PCREL16_FM<OPCODE5 Operation> : MipsR6Inst {
289 let Inst{31-26} = OPGROUP_PCREL.Value;
290 let Inst{25-21} = rs;
291 let Inst{20-16} = Operation.Value;
292 let Inst{15-0} = imm;
295 class PCREL19_FM<OPCODE2 Operation> : MipsR6Inst {
301 let Inst{31-26} = OPGROUP_PCREL.Value;
302 let Inst{25-21} = rs;
303 let Inst{20-19} = Operation.Value;
304 let Inst{18-0} = imm;
307 class PCREL18_FM<OPCODE3 Operation> : MipsR6Inst {
313 let Inst{31-26} = OPGROUP_PCREL.Value;
314 let Inst{25-21} = rs;
315 let Inst{20-18} = Operation.Value;
316 let Inst{17-0} = imm;
319 class SPECIAL3_2R_FM<OPCODE6 Operation> : MipsR6Inst {
325 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
326 let Inst{25-21} = 0b00000;
327 let Inst{20-16} = rt;
328 let Inst{15-11} = rd;
329 let Inst{10-6} = 0b00000;
330 let Inst{5-0} = Operation.Value;
333 class SPECIAL3_MEM_FM<OPCODE6 Operation> : MipsR6Inst {
336 bits<5> base = addr{20-16};
337 bits<9> offset = addr{8-0};
341 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
342 let Inst{25-21} = base;
343 let Inst{20-16} = hint;
344 let Inst{15-7} = offset;
346 let Inst{5-0} = Operation.Value;
349 class SPECIAL_2R_FM<OPCODE6 Operation> : MipsR6Inst {
355 let Inst{31-26} = OPGROUP_SPECIAL.Value;
356 let Inst{25-21} = rs;
357 let Inst{20-16} = 0b00000;
358 let Inst{15-11} = rd;
359 let Inst{10-6} = 0b00001;
360 let Inst{5-0} = Operation.Value;
363 class SPECIAL_3R_FM<bits<5> mulop, bits<6> funct> : MipsR6Inst {
370 let Inst{31-26} = OPGROUP_SPECIAL.Value;
371 let Inst{25-21} = rs;
372 let Inst{20-16} = rt;
373 let Inst{15-11} = rd;
374 let Inst{10-6} = mulop;
375 let Inst{5-0} = funct;
378 class SPECIAL_SDBBP_FM : MipsR6Inst {
383 let Inst{31-26} = OPGROUP_SPECIAL.Value;
384 let Inst{25-6} = code_;
385 let Inst{5-0} = OPCODE6_SDBBP.Value;
388 // This class is ambiguous with other branches:
389 // BEQC/BNEC require that rs < rt && rs != 0
390 class CMP_BRANCH_2R_OFF16_FM<OPGROUP funct> : MipsR6Inst {
397 let Inst{31-26} = funct.Value;
398 let Inst{25-21} = rs;
399 let Inst{20-16} = rt;
400 let Inst{15-0} = offset;
403 // This class is ambiguous with other branches:
404 // BLEZC/BGEZC/BEQZALC/BNEZALC/BGTZALC require that rs == 0 && rt != 0
405 // The '1R_RT' in the name means 1 register in the rt field.
406 class CMP_BRANCH_1R_RT_OFF16_FM<OPGROUP funct> : MipsR6Inst {
412 let Inst{31-26} = funct.Value;
413 let Inst{25-21} = 0b00000;
414 let Inst{20-16} = rt;
415 let Inst{15-0} = offset;
418 // This class is ambiguous with other branches:
419 // BLTZC/BGTZC/BLTZALC/BGEZALC require that rs == rt && rt != 0
420 // The '1R_BOTH' in the name means 1 register in both the rs and rt fields.
421 class CMP_BRANCH_1R_BOTH_OFF16_FM<OPGROUP funct> : MipsR6Inst {
427 let Inst{31-26} = funct.Value;
428 let Inst{25-21} = rt;
429 let Inst{20-16} = rt;
430 let Inst{15-0} = offset;
433 class CMP_BRANCH_OFF21_FM<bits<6> funct> : MipsR6Inst {
434 bits<5> rs; // rs != 0
439 let Inst{31-26} = funct;
440 let Inst{25-21} = rs;
441 let Inst{20-0} = offset;
444 class JMP_IDX_COMPACT_FM<bits<6> funct> : MipsR6Inst {
450 let Inst{31-26} = funct;
451 let Inst{25-21} = 0b00000;
452 let Inst{20-16} = rt;
453 let Inst{15-0} = offset;
456 class BRANCH_OFF26_FM<bits<6> funct> : MipsR6Inst {
460 let Inst{31-26} = funct;
461 let Inst{25-0} = offset;
464 class SPECIAL3_ALIGN_FM<OPCODE6 Operation> : MipsR6Inst {
472 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
473 let Inst{25-21} = rs;
474 let Inst{20-16} = rt;
475 let Inst{15-11} = rd;
476 let Inst{10-8} = 0b010;
478 let Inst{5-0} = Operation.Value;
481 class SPECIAL3_DALIGN_FM<OPCODE6 Operation> : MipsR6Inst {
489 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
490 let Inst{25-21} = rs;
491 let Inst{20-16} = rt;
492 let Inst{15-11} = rd;
493 let Inst{10-9} = 0b01;
495 let Inst{5-0} = Operation.Value;
498 class SPECIAL3_LL_SC_FM<OPCODE6 Operation> : MipsR6Inst {
501 bits<5> base = addr{20-16};
502 bits<9> offset = addr{8-0};
506 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
507 let Inst{25-21} = base;
508 let Inst{20-16} = rt;
509 let Inst{15-7} = offset;
510 let Inst{5-0} = Operation.Value;
512 string DecoderMethod = "DecodeSpecial3LlSc";
515 class SPECIAL_LSA_FM<OPCODE6 Operation> : MipsR6Inst {
523 let Inst{31-26} = OPGROUP_SPECIAL.Value;
524 let Inst{25-21} = rs;
525 let Inst{20-16} = rt;
526 let Inst{15-11} = rd;
527 let Inst{10-8} = 0b000;
528 let Inst{7-6} = imm2;
529 let Inst{5-0} = Operation.Value;
532 class REGIMM_FM<OPCODE5 Operation> : MipsR6Inst {
538 let Inst{31-26} = OPGROUP_REGIMM.Value;
539 let Inst{25-21} = rs;
540 let Inst{20-16} = Operation.Value;
541 let Inst{15-0} = imm;
544 class COP1_CMP_CONDN_FM<FIELD_CMP_FORMAT Format,
545 FIELD_CMP_COND Cond> : MipsR6Inst {
552 let Inst{31-26} = OPGROUP_COP1.Value;
553 let Inst{25-21} = Format.Value;
554 let Inst{20-16} = ft;
555 let Inst{15-11} = fs;
558 let Inst{4-0} = Cond.Value;
561 class JR_HB_R6_FM<OPCODE6 Operation> : MipsR6Inst {
566 let Inst{31-26} = OPGROUP_SPECIAL.Value;
567 let Inst{25-21} = rs;
572 let Inst{5-0} = Operation.Value;
575 class COP2LDST_FM<OPCODE5 Operation> : MipsR6Inst {
578 bits<5> base = addr{20-16};
579 bits<11> offset = addr{10-0};
583 let Inst{31-26} = OPGROUP_COP2LDST.Value;
584 let Inst{25-21} = Operation.Value;
585 let Inst{20-16} = rt;
586 let Inst{15-11} = base;
587 let Inst{10-0} = offset;
590 class SPECIAL3_2R_SZ_CRC<bits<2> sz, bits<3> direction> : MipsR6Inst {
594 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
595 let Inst{25-21} = rs;
596 let Inst{20-16} = rt;
597 let Inst{15-11} = 0b00000;
598 let Inst{10-8} = direction;
600 let Inst{5-0} = 0b001111;
602 string DecoderMethod = "DecodeCRC";
605 class SPECIAL3_GINV<bits<2> ginv> : MipsR6Inst {
609 let Inst{31-26} = OPGROUP_SPECIAL3.Value;
610 let Inst{25-21} = rs;
611 let Inst{20-10} = 0x0;
612 let Inst{9-8} = type_;
613 let Inst{7-6} = ginv;
614 let Inst{5-0} = 0b111101;
617 class SIGRIE_FM : MipsR6Inst {
620 let Inst{31-26} = OPGROUP_REGIMM.Value;
622 let Inst{20-16} = OPCODE5_SIGRIE.Value;
623 let Inst{15-0} = code_;